學(xué)習(xí)筆記-fpga設(shè)計(jì)電子時(shí)鐘(12864顯示).doc_第1頁
學(xué)習(xí)筆記-fpga設(shè)計(jì)電子時(shí)鐘(12864顯示).doc_第2頁
學(xué)習(xí)筆記-fpga設(shè)計(jì)電子時(shí)鐘(12864顯示).doc_第3頁
學(xué)習(xí)筆記-fpga設(shè)計(jì)電子時(shí)鐘(12864顯示).doc_第4頁
學(xué)習(xí)筆記-fpga設(shè)計(jì)電子時(shí)鐘(12864顯示).doc_第5頁
已閱讀5頁,還剩10頁未讀, 繼續(xù)免費(fèi)閱讀

下載本文檔

版權(quán)說明:本文檔由用戶提供并上傳,收益歸屬內(nèi)容提供方,若內(nèi)容存在侵權(quán),請進(jìn)行舉報(bào)或認(rèn)領(lǐng)

文檔簡介

fpga設(shè)計(jì)電子時(shí)鐘(12864顯示)設(shè)計(jì)心得:1,進(jìn)行分塊設(shè)計(jì),類似調(diào)用函數(shù),脈沖使能2,充分了解fpga的并行特性(c程序的串行特性,不能并行處理,線性:只有完成了當(dāng)前任務(wù),才能進(jìn)行下一個(gè)任務(wù))設(shè)計(jì)問題:1,似乎讀有問題,在char_lr=1時(shí),寫的數(shù)據(jù)為漢字(程序中時(shí)間沒有更改,主要為了調(diào)試看波形)實(shí)際板子驗(yàn)證時(shí),將lcd_clk模塊中的分頻調(diào)為50到100khz左右整體架構(gòu)控制時(shí)序功能模塊時(shí)序處理功能模塊初始化寫漢字寫字符繪圖1,液晶上電初始化2,清屏1,采用繪圖模式2,一次一個(gè)漢字3,位置,編碼編號(hào)1,采用cdram模式2,一次一個(gè)字符3,位置1,采用繪圖模式2,大小可變(庫編碼內(nèi)存不變)3,位置,長寬非忙應(yīng)答液晶初始化時(shí)序parameter idle=8b0000_0001,basic_com=8b0000_0010,/basic instruction:0x30disp_set=8b0000_0100,/set show curse blingddram_clear=8b0000_1000,/colunm address xwait_clear=8b0001_0000,point_set=8b0010_0000,show_on=8b0100_0000,stop=8b1000_0000;寫字符的時(shí)序由于字符屬于半寬字形,且ddram形式下,每行只有8個(gè)地址,而字符可以寫16個(gè),因此用下面三個(gè)來表示寫的地址:input 1:0 y,/row 0-3input 2:0x,/clunm 0-7input lr,/0/1因此當(dāng)lr=0時(shí),直接寫地址,然后寫一個(gè)字符編碼即可 lr=1時(shí),先寫地址,讀出高位數(shù)據(jù),然后寫入兩個(gè)字節(jié)(讀出的數(shù)據(jù),要寫的數(shù)據(jù))parameter idle=8b0000_0001,ddram=8b0000_0010,/drawing modew_addr=8b0000_0100,/row address ydummy=8b0000_1000,/ not really readingr_data=8b0001_0000,/reading high byte dataw0_data=8b0010_0000,w1_data=8b0100_0000,stop=8b1000_0000;# t1: 0 t2: 2305, t: 10,n_init: 38# t1: 2305 t2: 2665, t: 10,n_char: 6# t1: 2665 t2: 3265, t: 10,n_char: 10完成了上述工作,就可以設(shè)計(jì)一個(gè)簡單的電子時(shí)鐘,其要求如下:在屏幕上顯示時(shí)間 00:00:00要?jiǎng)討B(tài)走(主要就是控制脈沖信號(hào)的產(chǎn)生)設(shè)計(jì)思路:1,按下復(fù)位鍵,系統(tǒng)復(fù)位,時(shí)間變?yōu)?0:00:002,每一秒中時(shí)分秒數(shù)據(jù)更改3,一秒鐘時(shí)間到,產(chǎn)生8個(gè)字符寫的脈沖,lcd更新數(shù)據(jù)顯示00:00:0100:01:591代碼/*sign.v/creat the control sign clock h:m:s*/module sign(/module led(input lcd_clk,/100khzinput sys_rst,output reg lcd_char_en,output reg lcd_init_en,output reg 7:0char_data,output reg 2:0char_x,output reg 1:0char_y,output reg char_lr);parameter t_w_char = 5, t_lcd_init = 40;reg 47:0 time_out;/* 1s */reg 16:0 cnt_s;reg 5:0 cnt0_clk;reg 3:0 cnt1_clk;reg 2:0 cnt_char;reg 5:0 sec,min;reg 4:0 hour;reg flag_s,flag_init;always (posedge lcd_clk or negedge sys_rst)begin /100khzif(!sys_rst)begincnt_s =0;cnt0_clk=0;cnt1_clk=0;cnt_char=0;sec =0;min =0;hour =0;flag_s =0;flag_init =1b1; char_y = 2b10; endelsebeginif(cnt_s = (40-1)begincnt_s =0;flag_s=1b1;data_deal;/taskendelsecnt_s =cnt_s+1b1;if(flag_init) begincnt0_clk = cnt0_clk +1b1;case(cnt0_clk)1: begin lcd_init_en =1b0;end2: begin lcd_init_en =1b1;end3: begin lcd_init_en =1b1;end4: begin lcd_init_en =1b0;endt_lcd_init: begin flag_init =0;cnt0_clk =0;enddefault: lcd_init_en =0;endcase endelseif(flag_s)begincnt1_clk = cnt1_clk +1b1;case(cnt1_clk)1: begin lcd_char_en =1b0;end2: begin lcd_char_en =1b1;end3: begin lcd_char_en =1b1;end4: begin lcd_char_en =1b0;endt_w_char: begin if(cnt_char = 3b111)begin cnt_char=0; flag_s =0; endelsecnt_char =cnt_char+1b1;cnt1_clk =0;enddefault: lcd_char_en =0;endcasecase(cnt_char)/2 3 4 50: begin char_x =3b000; char_lr =0; char_data =time_out47:40; end/x0:00:001: begin char_x =3b001; char_lr =0; char_data =time_out39:32; end /0x:00:002: begin char_x =3b010; char_lr =0; char_data =8h3a; end /: ascii 0583: begin char_x =3b011; char_lr =0; char_data =time_out31:24; end /00:x0:004: begin char_x =3b100; char_lr =0; char_data =time_out23:16; end /00:0x:005: begin char_x =3b101; char_lr =0; char_data =8h3a; end /: ascii 0586: begin char_x =3b110; char_lr =0; char_data =time_out15: 8; end /00:00:x07: begin char_x =3b111; char_lr =0; char_data =time_out7 : 0; endendcaseendendendtask data_deal;beginif(sec = 59)if(min =59) if(hour = 23)beginhour=0;min=0;sec=0; endelsebegin hour=hour + 1b1; min =0; sec=0; endelsebegin min = min+1b1; sec =0; endelsesec = sec +1b1;time_out47:40 = 8h30+(hour/10);time_out39:32 = 8h30+(hour%10);time_out31:24 = 8h30+(min /10);time_out23:16 = 8h30+(min %10);time_out15: 8 = 8h30+(sec /10);time_out 7: 0 = 8h30+(sec %10);endendtaskendmodule2代碼module lcd_init(/module led(input lcd_clk,input sys_clk,input lcd_en,/1 is activedoutput reglcd_rs,outputreglcd_rw,output reglcd_en,inout 7:0 lcd_data,output regack);reg flag;reg 7:0 lcd_data;reg 7:0state;reg link_rs;reg link_data;parameter idle=8b0000_0001,basic_com=8b0000_0010,/basic instruction:0x30disp_set=8b0000_0100,/set show curse blingddram_clear=8b0000_1000,/colunm address xwait_clear=8b0001_0000,point_set=8b0010_0000,show_on=8b0100_0000,stop=8b1000_0000;reg 9:0cnt;/16*2*32=210 byte(8bits)/* lcd_rw lcd_data*/assign lcd_data = link_data ? lcd_data: 8hzz;/* lcd_rw lcd_en */always (posedge sys_clk) beginif(flag)beginlcd_rw =0;lcd_en = lcd_clk;endelsebeginlcd_rw =1bz;lcd_en =1bz;endend/* lcd_rs */always (posedge lcd_clk) beginif(link_rs)lcd_rs =1b0;elselcd_rs =1bz;end/*-main state transter-*/always (posedge lcd_clk) begincase (state)idle: beginif(lcd_en)begin link_rs=1; state= basic_com; endelsestate= idle; ack =0; flag=1b0;lcd_data= 8hzz;cnt= 0;endbasic_com: beginflag=1b1;link_data =1b1;cnt = cnt +1b1;if(cnt = 1)state= disp_set;elsestate= basic_com;lcd_data= 8h30;enddisp_set: beginstate= ddram_clear;lcd_data= 8h0c;/show curse blink is offendddram_clear: beginstate= wait_clear;lcd_data= 8h01;endwait_clear: begincnt =cnt +1b1;link_data = 1b0;flag =0;lcd_data= 8hzz;if(cnt = 30)state = point_set;elsestate = wait_clear;endpoint_set: begin flag =1b1; link_data =1b1;state= show_on;lcd_data= 8h06;/point +1 automatically,screen move offendshow_on: beginstate= stop;lcd_data= 8h0c;endstop: beginstate= idle;flag=1b0;link_data =1b0;ack=1b1;lcd_data= 8hzz;cnt= 0;link_rs =0;enddefault:begin ack =0;state = idle;endendcaseendendmodule3代碼/module lcd_top(module led(input sys_clk,input sys_rst,output lcd_rs,output lcd_rw,output lcd_en,inout 7:0lcd_data,output busy);wire 7:0 char_data;wire 2:0 char_x;wire 1:0 char_y;sign singb(.lcd_clk(lcd_clk),/100khz.sys_rst(sys_rst),.lcd_char_en(lcd_char_en),.lcd_init_en(lcd_init_en),.char_data(char_data),.char_x(char_x),.char_y(char_y),.char_lr(char_lr);lcd_init lcd_init(.lcd_clk(lcd_clk),.sys_clk(sys_clk),.lcd_en(lcd_init_en),/1 is actived.lcd_rs(lcd_rs),.lcd_rw(lcd_rw),.lcd_en(lcd_en),.lcd_data(lcd_data),.ack(init_ack);lcd_charac a(.lcd_clk(lcd_clk),.sys_clk(sys_clk),.lcd_en(lcd_char_en),/1 is actived.y(char_y),/row 0-3.x(char_x),/clunm 0-7.lr(char_lr),/0/1.data_disp(char_data),.lcd_rs(lcd_rs),.lcd_rw(lcd_rw),.lcd_en(lcd_en),.lcd_data(lcd_data),.ack(init_ack);lcd_clk clk1(.sys_clk(sys_clk),.lcd_clk(lcd_clk);endmodule4代碼module lcd_clk(/module led(input sys_clk,output reg lcd_clk);/*-creat the 25khz clock-*/reg 11:0 lcd_cnt;always (posedge sys_clk) beginif(lcd_cnt = 2)/100khzbeginlcd_cnt =0;lcd_clk = lcd_clk;endelselcd_cnt = lcd_cnt +1b1;endinitial begin lcd_clk =0; lcd_cnt =0; endendmodule5代碼/* to display character */module lcd_charac(/module led(input lcd_clk,input sys_clk,input lcd_en,/1 is activedinput 1:0 y,/row 0-3input 2:0 x,/clunm 0-7input lr,/0/1input 7:0 data_disp,output reg lcd_rs,output reg lcd_rw,output reg lcd_en,inout 7:0 lcd_data,output regack);reg 7:0 lcd_data;reg 7:0r_buff;reg 7:0state;parameter idle=8b0000_0001,ddram=8b0000_0010,/drawing modew_addr=8b0000_0100,/row address ydummy=8b0000_1000,/ not really readingr_data=8b0001_0000,/reading high byte dataw0_data=8b0010_0000,w1_data=8b0100_0000,stop=8b1000_0000;reg flag,cnt;reg link_data;reg flag0;/* lcd_data */assign lcd_data = link_data ? lcd_data :8hzz;/* lcd_en */always (posedge sys_clk) beginif(flag = 1b1)lcd_en = lcd_clk;elselcd_en =1bz;end/* lcd_rw */always (posedge lcd_clk) beginif(flag0)if(state = dummy | state = r_data)lcd_rw =1b1;elselcd_rw =1b0;elselcd_rw =1bz;end/* lcd_rs */always (posedge lcd_clk) beginif(flag0)if(state = w0_data | state = w1_data | state = dummy | state = r_data)lcd_rs =1b1;elselcd_rs =1b0;elselcd_rs =1bz;end/*-main state transter-*/always (posedge lcd_clk) begincase (state)idle: beginif(lcd_en)begin state= ddram; link_data =1; flag0=1b1; endelsebegin s

溫馨提示

  • 1. 本站所有資源如無特殊說明,都需要本地電腦安裝OFFICE2007和PDF閱讀器。圖紙軟件為CAD,CAXA,PROE,UG,SolidWorks等.壓縮文件請下載最新的WinRAR軟件解壓。
  • 2. 本站的文檔不包含任何第三方提供的附件圖紙等,如果需要附件,請聯(lián)系上傳者。文件的所有權(quán)益歸上傳用戶所有。
  • 3. 本站RAR壓縮包中若帶圖紙,網(wǎng)頁內(nèi)容里面會(huì)有圖紙預(yù)覽,若沒有圖紙預(yù)覽就沒有圖紙。
  • 4. 未經(jīng)權(quán)益所有人同意不得將文件中的內(nèi)容挪作商業(yè)或盈利用途。
  • 5. 人人文庫網(wǎng)僅提供信息存儲(chǔ)空間,僅對用戶上傳內(nèi)容的表現(xiàn)方式做保護(hù)處理,對用戶上傳分享的文檔內(nèi)容本身不做任何修改或編輯,并不能對任何下載內(nèi)容負(fù)責(zé)。
  • 6. 下載文件中如有侵權(quán)或不適當(dāng)內(nèi)容,請與我們聯(lián)系,我們立即糾正。
  • 7. 本站不保證下載資源的準(zhǔn)確性、安全性和完整性, 同時(shí)也不承擔(dān)用戶因使用這些下載資源對自己和他人造成任何形式的傷害或損失。

評論

0/150

提交評論