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1、51系列單片機的功能和結(jié)構(gòu)結(jié)構(gòu)和功能的監(jiān)控監(jiān)-51系列之一-計算機芯片監(jiān)控監(jiān)-51名是一幅一個電腦晶片,英特爾公司生產(chǎn)系列. 這家公司推出8級一個計算機芯片監(jiān)控監(jiān)-51系列之后,于1980年8引入一個計算機芯片監(jiān)控監(jiān),于1976年48系列.。它屬于這一類型很多行一個芯片的電腦芯片都如8051、8031、8751、80c51bh,80c31bh等,其基本組成、性能和基本教學制度,都是一樣的. 8051每日代表-51系列之一-電腦晶片 有一個芯片的計算機系統(tǒng)是由以下幾個方面: (1)18微處理器(cpu). (2)在切片數(shù)據(jù)存儲羊(128b/256b),使用可以不讀書不數(shù)據(jù)寫如因經(jīng)營不中,最后結(jié)果
2、要和數(shù)據(jù)顯示等. (3)存儲器存儲程序/可擦寫可編程只讀存儲器(4kb/8kb),用于保存程序和數(shù)據(jù),初步形成片. 但并不存儲器/可擦寫可編程只讀存儲器在一些人的電腦芯片,如8031、8032、80c等. (4)經(jīng)營的84并肩一/四op0p3接口,每口可以用作介紹,也可以用作輸出. (5)兩個定時/柜臺,每個計時器/柜臺可設立和計算的方法,用來計算的外部事件,可以建立成一個時間的方式也可以和根據(jù)計算結(jié)果或時間實現(xiàn)控制的計算(六)五切斷切斷源頭上控制系統(tǒng). (七)各一序i/o口uart(異步接收世界/發(fā)送(uart),它是實現(xiàn)一個計算機芯片和一個計算機芯片和通訊系列電腦上使用. (8)強、時鐘振
3、蕩器電路生產(chǎn)、水晶石英細調(diào)需要外部電容. 為使振動頻率目前最. 每上述地區(qū)內(nèi)的數(shù)據(jù)是通過加入單片機.其中,cpu的核心是一個電腦芯片,它是計算機和指揮控制中心等部分組成,運算器和控制等. 運算器的可攜帶8人計算a經(jīng)營單位的經(jīng)營邏輯,其中,1temporarilies存儲裝置8、暫時貯存器2、8的行政協(xié)調(diào)會累積裝置、b、注冊登記程序國有psw等. 累積計200人,行政協(xié)調(diào)委員會結(jié)束對進入檢查. 暫時運作往往是來自一店經(jīng)營者,這是經(jīng)營下去,使計暫時經(jīng)營成果和行政協(xié)調(diào)會. 此外,行政協(xié)調(diào)會經(jīng)常被視為轉(zhuǎn)運站,在8051年的數(shù)據(jù)傳輸. 一般微處理器一樣,是繁忙登記. 幫助大家,表示了贊同的命令. 控制程
4、序包括柜臺命令詳解,振蕩器電路和時間等. 程序相當于16. 這是一個字節(jié)地址位的程序,其實,內(nèi)容是未來ia將進行pc. 修改的內(nèi)容,它可以改變方向,進行程序. 在8051電路動搖一個電腦芯片、石英晶體外,只需要相當頻繁調(diào)整電容,其范圍是12mhz的頻率1.2mhz. 這一脈沖信號,作為8051年工作的基本節(jié)拍,即單位時間內(nèi)的最低. 8051年是計算機一樣,在和諧的工作基本控制打,就像打了一個樂團,按照發(fā)揮,指揮. 有存儲器(程序存儲器,只能讀),8051年在羊片(存儲數(shù)據(jù),是可以寫出)二讀,他們每個獨立存儲空間處理,處理方式是一樣的,一般的電腦記憶. 8051年和8751年撥款程序存儲程序存貯
5、器4kb,從0000h地址,用于保存程序和方式不變. 數(shù)據(jù)8051-87518031128b記憶存儲數(shù)據(jù),00fh假地址,用于存放操作結(jié)果中,暫時儲存數(shù)據(jù)和資料等無人。在這種羊128b,有32個單位字節(jié)可以出任就業(yè)登記,這是與一般不同的微處理器、8051切片和就業(yè)登記成立一個級別相同的地點安排. 這是很不相同的記憶監(jiān)控監(jiān)-51系列之一-計算機芯片,除了一般電腦的方式處置. 一般電腦先向空間、存儲器和ram,可安排在不同的空間范圍內(nèi)解決這一意愿,即存儲器的地址和ram,地址分配不同的空間形成. 同時來訪的記憶,相應的存儲器,只有一個地址,可以存儲,也可以撞擊,并以同樣的訪問. 這種記憶結(jié)構(gòu)稱為普
6、林斯頓結(jié)構(gòu). 8051記憶分為程序存儲空間和數(shù)據(jù)存儲空間的物理結(jié)構(gòu),有四個存儲空間:我們的程序儲存在一個數(shù)據(jù)存儲空間之外的數(shù)據(jù)存儲和一個程序存儲空間、外一、結(jié)構(gòu)形式的這種程序裝置和數(shù)據(jù)存儲與形式的數(shù)據(jù)存儲,稱為哈佛結(jié)構(gòu). 但用用戶的角度,討論8051年的記憶空間分為三類:(1)在時代安排ffffh座,0000h地點、從容外片(地址用十六). (二)處理數(shù)據(jù)存儲空間之外64kb之一,被安排從地址0000hffffh64kb(地址16),地點太. 三)處理數(shù)據(jù)存儲空間256b(地址8使用). 上述三個存儲空間地址重疊,鑒別設計,象征不同的數(shù)據(jù)傳輸?shù)恼Z言系統(tǒng)8051:cpu訪問片,以存儲器,阻止訪問
7、命令ra用途外用一張旅游片。8051年1-48芯片計算機與我走/澳港,要求p0、p1、p2和p3. 每個港口8準確雙向口,共占32別針. 每一個我/o線可作為引進和輸出獨立. 每個港口有門閂(即登記特殊功能)、駕駛?cè)?、出口實行緩沖. 可當門閂使outputting數(shù)據(jù),數(shù)據(jù)可以緩沖時推出,但這些四個功能自我同一. 在擴大對外開放具有時代記憶系統(tǒng),這四個港口可準確雙向口一/o共同使用。在擴大對外開放具有時代記憶系統(tǒng),高8p2口地址見客. p0口是一個雙向車采用8送數(shù)據(jù)低地址/出口timesharing 在8051年的巡回一個計算機芯片和四個一/o港口很巧妙的設計. 熟悉我/港澳邏輯電路,不僅有利
8、于正確、合理地使用港口、激勵周邊邏輯電路設計的一個計算機芯片有所提高. 負載能力和接口港口有一定的要求,因為產(chǎn)量等,p0和p1口的最終產(chǎn)量、p3口的結(jié)構(gòu),在不同的年級,所以,負載能力和接口要求其門南轅北轍相處. 不同于其他p0口口,其產(chǎn)量即將年級抵抗.。在使用它的嘴巴,用共同使用,是生產(chǎn)事故等級亮起電路,它是利用nmos呼吁采取抵制外,應同時輸入,走出失敗. 當被用作介紹,應該寫一的門閂頭. 每一個有能駕駛8p0口輸出模式lsttl載荷. p1口是一個正確的雙向口也作為我/海外廣泛使用. p0口不同產(chǎn)量的電路,請聯(lián)系電力負荷就在有阻力. 事實上,反抗是兩種影響,同時負責操作:1配量負責,定期阻
9、力. 另一種可能是導致這兩個國家與接近,使總經(jīng)理改變阻值近似零或一組值兩形勢十分沉重. 0時,大約是反抗,可以寄以很高的速度; 如果阻值很大,p1口,以妨礙國家引進高. p1口高產(chǎn)量的電力平時,它是利用電流負載提供庇護,以此抵制和不必回答. 在這里介紹的是用作碼頭,必須寫1到相應的門閂頭也使操作結(jié)束。相對約20,000ohms因負載阻力,因為在現(xiàn)場40,000ohms,不會產(chǎn)生影響的數(shù)據(jù),輸入. p2口的結(jié)構(gòu)有些類似于p0口有開關. 這是促使口腔類似,但有些不是嘴巴大轉(zhuǎn)換控制p1. p3口人的多功能港口,嘴也越來越多,p1比、3和4緩沖門. 這兩個部分,使她除了精確的雙向功能與p1口僅,也可以
10、使用第二功能每針. 、一門三轉(zhuǎn)功能實際上 它決定將產(chǎn)量數(shù)據(jù)信號門閂第二產(chǎn)出功能. 在擔任w=1時,問到生產(chǎn)信號; 作為在q=1時,信號線可以生產(chǎn)w. 節(jié)目時,它是第一個功能,但仍是第二個功能不用軟件p3口提前成立. 這不是硬件是在自動有兩個功能outputted當cpu進行社會主義和尋求地點(所在地或字節(jié))訪p3口/不是在持久排隊,有在硬件門閂促使=1.the經(jīng)營原則p3口類似于p1口.生產(chǎn)級的p3口,p1,p1,內(nèi)有連接負載阻力劃,每個人可以帶動4產(chǎn)出模型lsttl載荷. 而作為輸入口,任何nmos電路可驅(qū)動ttl或p1的8051一個電腦芯片p3口的正常發(fā)展. 由于產(chǎn)量等作出抵抗的人,也可以
11、公開方式收藏或流失的根源就是反抗的方式,要求公開,不須具備抵抗繪畫. 別人都準確雙向口也. 當行為投入,要寫出一首相應的港口與門閂. 以80c51一個計算機芯片,只能提供港口毫安的電流電產(chǎn)出,它是生產(chǎn)口去要求一個普通的計算是將晶體管、接觸的阻力應該在港口及半導體基地 同時為了抑制高電力輸出p1p3級是恢復王位是一個著手運作一個計算機芯片. 其主要功能是將電腦變成0000h開始,使一個開始進行計算機芯片進行程序0000h單位. 除了那些進入正常initialized系統(tǒng),因為它的程序操作失誤或操作失誤不多,為了擺脫困境,必須按國家和恢復王位,恢復太重要了. 這是一項投入恢復王位,結(jié)束了在8051
12、年中國信息表寄. 恢復王位高有效信號,應保持24震撼周期(機器周期,2)有效時間段. 6如果使用頻率前去輝煌,恢復王位信號完成期限不得超過4微妙的王位,恢復營業(yè). 邏輯電路生產(chǎn)情況,恢復王位的信號:恢復王位的電路兩部分組成,包括外部的芯片完全. 外界產(chǎn)生電路恢復王位信號(表)交給史密特的啟動,恢復王位樣品電路產(chǎn)量,史密特觸發(fā)不斷每一s5p2、機器周期有一次,光有與恢復王位和經(jīng)營所需insidly信號. 恢復王位抵抗一般線路、電容參數(shù)適合6精彩震撼,是否能恢復王位高信號機會大于2周期保證. 正在恢復王位是簡單的電路,其作用是非常重要的. 張一電腦芯片系統(tǒng)可正常運作,應先檢查一下,才能恢復王位沒有
13、成功. 檢測可以流行頭和監(jiān)督寄與初步示波器,并把恢復王位的關鍵,波的形式,并認為有足夠的距離輸出(瞬間),也就是通過它來恢復電路值進行實現(xiàn)改變。structure and function of the mcs-51 series structure and function of the mcs-51 series one-chip computer mcs-51 is a name of a piece of one-chip computer series which intel company produces. this company introduced 8 top-grade
14、one-chip computers of mcs-51 series in 1980 after introducing 8 one-chip computers of mcs-48 series in 1976. it belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80c51bh, 80c31bh,etc., their basic composition, basic performance and instruction system ar
15、e all the same. 8051 daily representatives- 51 serial one-chip computers . an one-chip computer system is made up of several following parts: ( 1) one microprocessor of 8 (cpu). ( 2) at slice data memory ram (128b/256b),it use not depositting not can reading /data that write, such as result not midd
16、le of operation, final result and data wanted to show, etc. ( 3) procedure memory rom/eprom (4kb/8kb ), is used to preserve the procedure , some initial data and form in slice. but does not take rom/eprom within some one-chip computers, such as 8031 , 8032, 80c ,etc. ( 4) four 8 run side by side i/o
17、 interface p0 four p3, each mouth can use as introduction , may use as exporting too. ( 5) two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the c
18、ontrol of the computer. ( 6) five cut off cutting off the control system of the source . ( 7) one all duplexing serial i/o mouth of uart (universal asynchronous receiver/transmitter (uart) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. ( 8) s
19、tretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. allow oscillation frequency as 12 megahertas now at most. every the above-mentioned part was joined through the inside data bus .among them, cpu is a core of the one-chip computer, it is the control
20、 of the computer and command centre, made up of such parts as arithmetic unit and controller , etc. the arithmetic unit can carry on 8 persons of arithmetic operation and unit alu of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8s accumu
21、lation device acc, register b and procedure state register psw, etc. person who accumulate acc count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loo
22、pback acc with another one. in addition, acc is often regarded as the transfer station of data transmission on 8051 inside . the same as general microprocessor, it is the busiest register. help remembering that agreeing with a expresses in the order. the controller includes the procedure counter , t
23、he order is depositted, the order decipher, the oscillator and timing circuit, etc. the procedure counter is made up of counter of 8 for two, amounts to 16. it is a byte address counter of the procedure in fact, the content is the next ia that will carried out in pc. the content which changes it can
24、 change the direction that the procedure carries out . shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12mhz of 1.2mhz. this pulse signal, as 8051 basic beats of working, namely the minimum un
25、it of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded. there are rom (procedure memory , can only read ) and ram in 8051 slices (data memory, can is it can write ) two to read, the
26、y have each independent memory address space, dispose way to be the same with general memory of computer. procedure 8051 memory and 8751 slice procedure memory capacity 4kb, address begin from 0000h, used for preserving the procedure and form constant. data 8051- 8751 8031 of memory data memory 128b
27、, address false 00fh, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc. in ram of this 128b, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice ram and job register r
28、ank one formation the same to arrange the location. it is not very the same that the memory of mcs-51 series one-chip computer and general computer disposes the way in addition. general computer for first address space, rom and ram can arrange in different space within the range of this address at w
29、ill, namely the addresses of rom and ram, with distributing different address space in a formation. while visiting the memory, corresponding and only an address memory unit, can rom, it can be ram too, and by visiting the order similarly. this kind of memory structure is called the structure of prin
30、ceton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: the procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this k
31、ind of procedure device and data memory separated form data memory, called harvard structure. but use the angle from users, 8051 memory address space is divided into three kinds: (1) in the slice, arrange blocks of ffffh , 0000h of location , in unison outside the slice (use 16 addresses). (2) the d
32、ata memory address space outside one of 64kb, the address is arranged from 0000h 64kb ffffh (with 16 addresses ) too to the location. (3) data memory address space of 256b (use 8 addresses). three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of di
33、fferent data transmission in the instruction system of 8051: cpu visit slice, rom order spend movc , visit block ram order uses movx outside the slice, ram order uses mov to visit in slice. 8051 one-chip computer have four 8 walk abreast i/o port, call p0, p1, p2 and p3. each port is 8 accurate two-
34、way mouths, accounts for 32 pins altogether. every one i/o line can be used as introduction and exported independently. each port includes a latch (namely special function register ), one exports the driver and a introduction buffer . make data can latch when outputting, data can buffer when making
35、introduction , but four function of passway these self-same. expand among the system of memory outside having slice, four port these may serve as accurate two-way mouth of i/o in common use. expand among the system of memory outside having slice, p2 mouth see high 8 address off; p0 mouth is a two-wa
36、y bus, send the introduction of 8 low addresses and data / export in timesharing 待添加的隱藏文字內(nèi)容3the circuit of 8051 one-chip computers and four i/o ports is very ingenious in design. familiar with i/o port logical circuit, not only help to use ports correctly and rationally, and will inspire to designin
37、g the peripheral logical circuit of one-chip computer to some extent. load ability and interface of port have certain requirement, because output grade, p0 of mouth and p1 end output, p3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in c
38、ommon with each other. p0 mouth is different from other mouths, its output grade draws the resistance supremly. when using it as the mouth in common use to use, output grade is it leak circuit to turn on, is it is it urge nmos draw the resistance on taking to be outer with it while inputting to go o
39、ut to fail. when being used as introduction, should write 1 to a latch first. every one with p0 mouth can drive 8 model ls ttl load to export. p1 mouth is an accurate two-way mouth too, used as i/o in common use. different from p0 mouth output of circuit its, draw load resistance link with power on
40、inside have. in fact, the resistance is that two effects are in charge of fet and together: one fet is in charge of load, its resistance is regular. another one can is it lead to work with close at two state, make its president resistance value change approximate 0 or group value heavy two situation
41、 very. when it is 0 that the resistance is approximate , can draw the pin to the high level fast ; when resistance value is very large, p1 mouth, in order to hinder the introduction state high. output as p1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwa
42、rds, draw the resistance on neednt answer and thenning. here when the port is used as introduction, must write into 1 to the corresponding latch first too, make fet end. relatively about 20,000 ohms because of the load resistance in scene and because 40,000 ohms, will not exert an influence on the d
43、ata that are input. the structure of p2 some mouth is similar to p0 mouth, there are mux switches. is it similar to mouth partly to urge, but mouth large a conversion controls some than p1. p3 mouth one multi-functional port, mouth getting many than p1 it have and 3 door and 4 buffer. two part these
44、, make her besides accurate two-way function with p1 mouth just, can also use the second function of every pin, and door 3 function one switch in fact, it determines to be to output data of latch to output second signal of function. act as w =at 1 oclock, output q end signal; act as q =at 1 oclock,
45、can output w line signal . at the time of programming, it is that the first function is still the second function but neednt have software that set up p3 mouth in advance . it hardware not inside is the automatic to have two function outputted when cpu carries on sfr and seeks the location (the loca
46、tion or the byte ) to visit to p3 mouth /at not lasting lining, there are inside hardware latch qs =1.the operation principle of p3 mouth is similar to p1 mouth. output grade , p3 of mouth , p1 of p1 , connect with inside have load resistance of drawing , every one of they can drive 4 model ls ttl l
47、oad to output. as while inputting the mouth, any ttl or nmos circuit can drive p1 of 8051 one-chip computers as p3 mouth in a normal way . because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the r
48、esistance of drawing outerly . mouths are all accurate two-way mouths too. when the conduct is input, must write the corresponding port latch with 1 first . as to 80c51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basi
49、ng of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting p1p3 being restored to the throne is the operation of initializing of an one-chip computer. its main function is to turn pc into
50、 0000h initially , make the one-chip computer begin to hold the conduct procedure from unit 0000h. except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there arent mistake, in order to extricate oneself from a predicament , need to be press
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