第2章 微型計(jì)算機(jī)基礎(chǔ)知識(shí)

1、微機(jī)原理及接口技術(shù)微機(jī)原理及接口技術(shù)chapter 3 the hardware structure of the iap15w4k58s4 microcontrollermicrocomputer principle and interface technologyteacher: liu zhongguoteaching material: chen guiyou. single microcomputer principles and interface technology (2nd edition), higher education press, 2017website of sh

2、anda curriculum center microcomputer principles and microcontroller interface technology : http:/ technology http:/ books: stc15series mcu data sheet.2015.10 stc15w4k32s4 series mcu data sheet.2015.22chapter 3 the hardware structure of the iap15w4k58s4 microcontroller learning objectives of this cha

3、pter3.1 3.1 understand the structure and working process of the model machine 3.2 master the internal structure of the iap15w4k58s4 microcontroller3.3 master iap15w4k58s4 microcontroller memory3.4 master the pins of the microcontroller (use of i/o port)3.5 master the typical composition of microcont

4、roller application systems310:143.1the structure and working process of the model machine3.1.1 introduction to the structure of the model machinea structural model of a microcomputer (referred to as a model machine).the main components of the model machine are:three buses (address bus, data bus and

5、control bus)central processing unit (cpu)memoryi/o interface10:1443.1.1 the structure of the model machinefigure 3-1 the structure of model machine10:145i/o interfaceoperator controllermov a, #07hmachine codeb0h 07h8086 assembly language存儲(chǔ)器后cpu后busregister groupregister aprogram counteraddress regis

6、terdata registerinstruction registerinstruction decoder microoperation signal generatorcontrol circuit flag registeraddress busdata buscontrol busmemoryaddress decoder programdata instruction1instruction2instruction3instruction4data 1data 2data 33.1.1 introduction to the structure of the model machi

7、ne1, the composition of the central processorthe central processing unit (cpu) consists of an operator and a controller.(1) operatordefinition: an operator is a functional part of a computer that processes and processes data.function: processing data, including arithmetic and logic operations, such

8、as addition, subtraction, multiplication, and, or non-computing, etc. data and intermediate results that participate in the operation are also temporarily stored.10:146function: controller is used to control and direct the coordination of the various functions within the computer, and to complete th

9、e function of the computer program.controller composition:program counter pc: it is used to store the instruction address to be taken out. after the instruction address is taken out, its content will be automatically increased by 1.address register ar: store the address of operand memory unitdata re

10、gister dr: used to store operands. instruction register ir: stores instruction opcodes.instruction decoder id: translate operation code of an instruction into a command signal that can be recognized by the machine.10:147micro-operational signal generator mosg: used to generate a series of micro-oper

11、ational control signals.3.1.1 introduction to the structure of the model machine2, the structure of the memoryfunction: primarily used to save programs and data.components: contains address decoders, storage units, and control logic.memory access process:(1) read operation the cpu first puts the con

12、tents of the address register ar on the address bus ab, the contents of the address bus enter the address decoder, decoded by the address decoder, and selects the corresponding storage unit. the contents of the selected storage unit appear on the data bus, and under the influence of the control sign

13、al, the cpu reads the data from the data bus to the data register dr, thus completing the memory reading operation.10:148存儲(chǔ)器后memory access process:(2) write action the cpu sends the contents of the address register ar to the address bus ab, and the contents of the address bus enter the address decod

14、er, which is decoded by the address decoder in order to select the corresponding storage unit. under the influence of the control signal, the data to be written by the cpu is written to the selected storage unit via the data bus, completing the write operation of the memory.10:149執(zhí)行過(guò)程執(zhí)行過(guò)程:讀取指令讀取指令分析

15、指令分析指令執(zhí)行指令執(zhí)行指令保存結(jié)果保存結(jié)果在讓計(jì)算機(jī)進(jìn)行計(jì)算之前，應(yīng)做如下工作：在讓計(jì)算機(jī)進(jìn)行計(jì)算之前，應(yīng)做如下工作：用助記符號(hào)指令用助記符號(hào)指令( (匯編語(yǔ)言匯編語(yǔ)言) )編寫(xiě)源程序）；編寫(xiě)源程序）；用匯編軟件（匯編程序）將源程序匯編成計(jì)算機(jī)能用匯編軟件（匯編程序）將源程序匯編成計(jì)算機(jī)能識(shí)別的機(jī)器語(yǔ)言程序；識(shí)別的機(jī)器語(yǔ)言程序；將數(shù)據(jù)和程序通過(guò)輸入設(shè)備送入將數(shù)據(jù)和程序通過(guò)輸入設(shè)備送入存儲(chǔ)器存儲(chǔ)器中存放。中存放。匯編語(yǔ)言語(yǔ)句匯編語(yǔ)言語(yǔ)句注釋注釋mov a, #07h ;07送入累加器送入累加器aadd a, #0ah;10與與a中中內(nèi)容相加內(nèi)容相加, 結(jié)果結(jié)果在在a中中hlt；暫停；暫停機(jī)器碼

16、機(jī)器碼b0h 07h04h 0ahf4h例如，計(jì)算例如，計(jì)算7+10=?7+10=?，結(jié)果在，結(jié)果在a a中。中。10:14:通過(guò)執(zhí)行指令完成計(jì)算控制功能通過(guò)執(zhí)行指令完成計(jì)算控制功能3.1.2模型機(jī)的工作過(guò)程模型機(jī)的工作過(guò)程10微機(jī)微機(jī)8086匯編語(yǔ)言匯編語(yǔ)言例如例如, 計(jì)算計(jì)算7+10=?, 結(jié)果在結(jié)果在a中。中。假設(shè)程序在存儲(chǔ)器中的假設(shè)程序在存儲(chǔ)器中的存儲(chǔ)格式存儲(chǔ)格式(設(shè)程序從設(shè)程序從00h開(kāi)始存放開(kāi)始存放)如圖示。如圖示。地址地址存儲(chǔ)內(nèi)容存儲(chǔ)內(nèi)容00hb0h01h07h02h04h03h0ah04hf4h機(jī)器碼機(jī)器碼b0h 07h04h 0ahf4h讀取指令階段讀取指令階段的執(zhí)行過(guò)程如下

17、：的執(zhí)行過(guò)程如下：cpucpu將將程序計(jì)數(shù)器程序計(jì)數(shù)器pcpc的內(nèi)容的內(nèi)容00h00h送送地址寄存器地址寄存器arar。程序計(jì)數(shù)器程序計(jì)數(shù)器pcpc的內(nèi)容自動(dòng)加的內(nèi)容自動(dòng)加1 1變?yōu)樽優(yōu)?1h01h，為取下一條指，為取下一條指令作好準(zhǔn)備。令作好準(zhǔn)備。地址寄存器地址寄存器arar將將00h00h通過(guò)地址總線通過(guò)地址總線abab送至存儲(chǔ)器送至存儲(chǔ)器地址地址譯碼器譯碼器譯碼譯碼，選中選中00h00h單元單元。cpucpu發(fā)出發(fā)出“讀讀”命令命令。所選中所選中0000單元的單元的內(nèi)容內(nèi)容b0hb0h由存儲(chǔ)器送至數(shù)據(jù)總線由存儲(chǔ)器送至數(shù)據(jù)總線dbdb上。上。經(jīng)經(jīng)數(shù)據(jù)總線數(shù)據(jù)總線db, cpu將將讀出內(nèi)容讀

18、出內(nèi)容b0h送送數(shù)據(jù)寄存器數(shù)據(jù)寄存器dr。10:1411工作過(guò)程工作過(guò)程:讀取指令讀取指令分析指令分析指令執(zhí)行指令執(zhí)行指令保存結(jié)果保存結(jié)果數(shù)據(jù)寄存器數(shù)據(jù)寄存器dr將其內(nèi)容送將其內(nèi)容送指令寄存器指令寄存器ir中中, 經(jīng)過(guò)經(jīng)過(guò)譯譯碼碼, cpu“識(shí)別識(shí)別”出此操作碼為出此操作碼為兩字節(jié)指令的第一個(gè)字節(jié)兩字節(jié)指令的第一個(gè)字節(jié),再再取出下一個(gè)字節(jié)取出下一個(gè)字節(jié)(機(jī)器碼機(jī)器碼)后得知是后得知是“mov a, #07h”指令指令, 于是控制器發(fā)出于是控制器發(fā)出執(zhí)行這條指令執(zhí)行這條指令的控制命令。的控制命令。圖圖3-4 讀取第一讀取第一條指令第一個(gè)條指令第一個(gè)字節(jié)的示意圖字節(jié)的示意圖10:1412加加1地址

19、地址譯碼譯碼需重復(fù)上述取需重復(fù)上述取指譯碼過(guò)程指譯碼過(guò)程譯碼譯碼產(chǎn)生產(chǎn)生微控微控制命制命令令讀立即數(shù)讀立即數(shù)(下下個(gè)機(jī)器碼個(gè)機(jī)器碼)到到a“mov a, #07h” 機(jī)器碼:b0h 07h讀讀第一條指令第一條指令第二個(gè)字節(jié)第二個(gè)字節(jié)(即執(zhí)行該指令即執(zhí)行該指令)的示意圖的示意圖再取出下一個(gè)字節(jié)再取出下一個(gè)字節(jié)圖圖3-5 執(zhí)行執(zhí)行第一條指令示意圖第一條指令示意圖“mov a, #07h” (機(jī)器碼:b0h 07h),10:1413加加1地址地址譯碼譯碼即取機(jī)器碼即取機(jī)器碼07h的過(guò)程的過(guò)程:執(zhí)行第二條指令的取指過(guò)程與第一執(zhí)行第二條指令的取指過(guò)程與第一條相同條相同, 只是只是指令碼指令碼地址不同。地

20、址不同。經(jīng)過(guò)對(duì)第二條經(jīng)過(guò)對(duì)第二條指令操作碼指令操作碼(第第1字節(jié)字節(jié)04h)的分析的分析(譯碼譯碼)得得知該指知該指令為加法令為加法指令指令,執(zhí)行執(zhí)行第第2字節(jié)字節(jié)過(guò)過(guò)程如下：程如下：程序計(jì)數(shù)器程序計(jì)數(shù)器pcpc的內(nèi)容的內(nèi)容(03h)(03h)送送arar。程程序計(jì)數(shù)器序計(jì)數(shù)器pcpc的內(nèi)容自動(dòng)加的內(nèi)容自動(dòng)加1 1并回送并回送pcpc。地址地址寄存器寄存器arar的內(nèi)容經(jīng)地址總線的內(nèi)容經(jīng)地址總線abab送到存儲(chǔ)器地址送到存儲(chǔ)器地址譯碼器。譯碼器。執(zhí)行執(zhí)行第二條指令第二條指令 “add a, #0ah”(機(jī)器碼機(jī)器碼: 04h 0ah)cpucpu發(fā)出發(fā)出“讀讀”命令。命令。所選中的所選中的03

21、h03h單元的內(nèi)容單元的內(nèi)容0ah0ah送到數(shù)據(jù)總線送到數(shù)據(jù)總線dbdb。數(shù)據(jù)總線數(shù)據(jù)總線dbdb上的內(nèi)容送數(shù)據(jù)寄存器上的內(nèi)容送數(shù)據(jù)寄存器drdr。10:141400hb0h01h07h02h04h03h0ah04hf4h執(zhí)行第二條指令執(zhí)行第二條指令 “add a, #0ah”(機(jī)器碼機(jī)器碼: 04h 0ah)圖圖3-6 執(zhí)行第二條執(zhí)行第二條指令操作示意圖指令操作示意圖數(shù)據(jù)寄存器數(shù)據(jù)寄存器drdr內(nèi)容內(nèi)容送送b b寄存器寄存器, ,再送算術(shù)邏輯單元再送算術(shù)邏輯單元alualu一端一端。累加器累加器a a的內(nèi)容送的內(nèi)容送alualu的另一端的另一端, , 完成加法運(yùn)算完成加法運(yùn)算。alualu相

22、加的結(jié)果輸出到相加的結(jié)果輸出到a a。10:1415 the microcomputer (c, uc, mcu) integrates the functional structure of the aforementioned microcomputer on a single chip.some microcontrollers not only integrate cpu, storage program and data memory, system bus, i/o interface, timing/counter and other conventional resources

23、, but also integrate the industrial measurement and control system commonly used analog collection module. 3.2 the internal structure of the iap15w4k58s4 microcontroller10:1416iap15w4k58s4 operating voltage： 2.5v - 5.5vstc15f2k60s2 operating voltage: 5.5v - 3.8v( 5vc)stc15l2k60s2 operating voltage:

24、3.6v - 2.4v( 3v c)the 8051 core is the basic standard for intel 8051 series microcontrollers, which are referred to in many reference books as mcs-51 series microcontrollers.the typical product of the mcs-51 series microcontroller is 8051, with 4k 8-bit roms, 128 bytes of ram, 2 16-bit timing/counte

25、rs, 4 8-bit i/o mouths, one serial port, and 111 instructions.in the 1980s, intel sold the 8051 kernel to several well-known ic vendors such as philips and atmel. in this way, the 8051 microcontroller has become the support of many manufacturers, the development of hundreds of products into a large

26、family.most commonly used are acer stc series microcontrollers, atmel at89 series and other 51 series. as long as it is an 8051 core microcontroller, their basic structure is the same, and the command system is fully compatible with the standard 8051 microcontroller.10:1417單片機(jī)產(chǎn)品單片機(jī)產(chǎn)品3.2 the internal

27、 structure of the iap15w4k58s4 microcontrollerthe course takes the enhanced 8051 core microcontroller iap15w4k58s4 as an example to illustrate the internal structure of the microcontroller. see figure 3-6the iap15w4k58s4 contains almost all the unit modules required for data acquisition and control.

28、 - can be called a system on-chip (soc)183.2 the internal structure of the iap15w4k58s4 microcontroller圖圖3-6 iap15w4k58s4單片機(jī)的內(nèi)部結(jié)構(gòu)框圖單片機(jī)的內(nèi)部結(jié)構(gòu)框圖19figure 3-6 iap15w4k58s4 microcontroller internal structure block diagramiap15w4k58s4 mcu integrates the following typical resources：enhanced 8051 core, singl

29、e clock machine cycle, 8 to 12 times faster than conventional 8051 core microcontrollers.58kb flash program memory, which can be used to store user programs. for iap-type microcontrollers, flash does not have a portion of the program memory that can be used as a data flash to save parameters that ar

30、e not lost after power is lost. flash memory can be erased more than 100,000 times.4096b of sram, equivalent to the memory of a computer, can be used to hold variables used in a program.5 of 16-bit automatically reloadable timing/counters (t0, t1, t2, t3 and t4) with programmable clock output. 20stc

31、15w4k58s4 up to 62 (64 pin package) i / o (input / output) port lines to realize parallel input and output of data. four full duplex asynchronous serial ports (uart) can realize serial data transmission between mcu and other devices. 1 high speed synchronous communication port (spi), which can commu

32、nicate with devices with spi. interrupt control system. it has 5 external interrupts, falling edge interrupts or bilateral edge (rising edge and falling edge) trigger circuits. in power down mode, it can be awakened by external interrupt low-level trigger interrupt mode21iap15w4k58s4 mcu integrates

33、the following typical resources：cpu consists of an operator and a controllerthe central processor (cpu) of a microcontroller consists of an operator and a controller. 1. operator10:14with the 8-bit arithmetic/logic operation component alu as the core, plus the temporary memory tmp1, tmp2, accumulato

34、r acc, register b, program status flag register psw and boolean processing unit hanging around it through the internal bus became the logic circuit of the whole operator.22program status word (psw) also known as status registerprogram status flag register psw (8-bit)the state of some bits in psw is

35、automatically formed during instruction execution, and some bits can be changed by user execution instructions.the definitions of psw are as follows:10:14位號(hào)位號(hào)d7d6d5d4d3d2d1d0符號(hào)符號(hào) cyacf0rs1 rs0ovf1pcy (psw.7): carry flagwhen the addition / subtraction command is executed, if the highest bit d7 of the

36、 operation result has a carry / borrow bit, cy is set to 1, otherwise it is cleared to 0. after performing multiplication and division, cy is cleared. in addition, the cpu will also affect this flag bit during shift operation.cy23it is also the accumulator for bit operation of boolean processor.prog

37、ram status flag register psw (8-bit)ac（psw.6）：）：auxiliary carry when the add / subtract instruction is executed, if the low four digits generate a carry / borrow bit to the high four digits, the ac is set to 1, otherwise it is cleared.10:14位號(hào)位號(hào)d7d6d5d4d3d2d1d0符號(hào)符號(hào) cyacf0rs1 rs0ovf1pacf0（psw.5）：）：the

38、 user flag bit 0。is a status flag defined by the user. the software can be used to set it to 1 or clear 0, or the software can test f0 to control the flow direction of the program. f1（psw.1）：）： the user flag bit 1 。 is a status flag defined by the user. the software can be used to set it to 1 or cle

39、ar 0, or the software can test f1 to control the flow direction of the program.f0f124program status flag register psw (8-bit)rs1,rs0（psw.4psw.3）：）：working register group selection control bit.ov（psw.2）：）：overflow flag bit. indicates whether overflow occurs during operation, which is automatically fo

40、rmed during instruction execution.10:14bitd7d6d5d4d3d2d1d0namecyacf0rs1 rs0ovf1prs1 rs0ovp（psw.0）：）：parity flag bit. the number of 1 in accumulator acc is even, p = 0; otherwise, p = 1. each instruction cycle is set to 1 or cleared to 0 by hardware.in the serial communication with parity, the parity

41、 bit can be set according to p.p252. controllerthe controller is the brain center of cpu, including timing control logic, instruction register, decoder, (data) address pointer dptr, program counter pc, stack pointer sp, ram address register, etc。10:14program counter pcit is a 16 bit program address

42、register, which is specially used to store the memory address of the next instruction to be executed. it can automatically add 1.when the cpu executes instructions, it takes the instruction code from the memory according to the address given in the pc, and then executes it after decoding and analysi

43、s by the controller.every time the instruction code is taken, the pc will automatically add 1. in this way, the program counter pc adds 1 again and again, and the instructions are executed one by one.262. controller - stackprimarily used to hold temporary data, local variables, interrupts, or the re

44、turn addresses of subroutip programs.the stack of the iap15w4k58s4 microcontroller is located in internal ram and is an area where data is stored according to the advanced back-out rule.stack pointer sp is an 8-bit register that automatically adds 1 or minus 1.sp points to the top of the stack: when

45、 the data is pressed into the stack, sp automatically adds 1, and the data is then added to the stack; when you get out of the stack, the data pops out of the stack and the sp automatically subtracts 1.after resetting, the register sp default is 07h, so that the stack area starts in the area at 08h.

46、 the user can usually use instructions to set the stack locale between 80h and ffh of internal ram.10:14272. controller - data pointer dptr (also known as address pointer)it is a 16-bit dedicated register consisting of a dpl (low 8-bit) and a dph (high 8-bit).the dptr can be operated directly in 16

47、bits, or by bytes for dpl and dph, respectively.the iap15w4k58s4 microcontroller has two 16-bit data pointers, dctr0 and dptr1, which share the same address (82h, 83h).you can choose which data pointer to use by setting the dps (auxr1.0) bit in the secondary register auxr1 (dps=0, select dptr0; dps=

48、1, select dptr1). 10:1428位號(hào)位號(hào)d7d6d5d4d3d2d1 d0位名稱位名稱 s1_s1 s1_s0 ccp_s1 ccp_s0 spi_s1 spi_s00 dpsauxr12910:14resources integrated on iap15w4k58s4 microcontrollers have ()58kb flash program memorysram for 4096b5 of 16-bit timing/counters that can be automatically reloadedup to 62 (64 pin package) i /

49、 o (input / output) port linesabcd提交a/d convertere多選題1分3010:14the accumulator used in bit operation of boolean processor of single chip microcomputer is（）accumulator a。cy bit of program status register psw。program status register psw。abc提交單選題1分3110:14if the complement operation result of signed numb

50、er exceeds the representation range of complement number, then（）cy bit of program status register psw is set 1.ov bit of program status register psw is set 1. ov and cy bit of program status register psw are set 1. abc提交單選題1分structural features: the addressing space of program memory and data memory

51、 is separated.structure division: three physically independent memory spaces are integrated in the chip: program flash memory, internal data memory and extended data memory.3.3 memory of the iap15w4k58s4 microcontroller32figure 3-7 iap15w4k58s4 microcontroller memory configuration diagramprogram fla

52、sh memoryprogram flash memoryinternal data memoryextended data memoryhigher 128 byte internal ramlower 128 byte internal ram3840 byte extended ramspecial function registers1. program flash memoryfunction: store user programs, data, tables and other information. space size: 58kb program flash memory

53、is integrated in iap15w4k58s4 microcomputer, and the addresses are 0000h e7ffh. after the mcu is reset, the content of the program counter pc is 0000h, and the program is executed from the 0000h unit.33iap15w4k58s4 cannot access the external program memory because there is no bus to access the exter

54、nal program memory. flash memory not used as program memory can be used as eeprom. the number of erasures of flash program is more than 100000, which greatly improves the chip utilization and reduces the development gram flash memoryprogram flash memoryspecial units: some special units in th

55、e program flash memory are the entry address (interrupt vector) of 21 interrupt service programs：0003h external interrupt 0 entry address of interrupt service program000bh timing / counter 0 entry address of interrupt service program0013h entry address of external interrupt 1 interrupt service progr

56、am001bh timing / counter 1 interrupt service program entry address0023h serial communication port 1 interrupt service program entry address002entry address of bh adc interrupt service program0033h low voltage detection interrupt service program entry address003entry address of bh pca interrupt servi

57、ce program0043h entry address of serial communication port 2 interrupt service program004bh entry address of spi interrupt service program0053h entry address of external interrupt 2 interrupt service program005bh external interrupt 3 entry address of interrupt service program0063h timing / counter 2

58、 entry address of interrupt service program0083h entry address of external interrupt 4 interrupt service program341. program flash memoryentry address of interrupt service program008bh:entry address of serial communication port 3 interrupt service program0093h:entry address of serial communication p

59、ort 4 interrupt service program009bh: entry address of timer / counter 3 interrupt service program00a3h: entry address of timer / counter 4 interrupt service program00abh: entry address of comparator interrupt service program00b3h: entry address of pwm interrupt service program00bbh: entry address o

60、f pwm anomaly detection interrupt service programafter the mcu is reset, the content of the program counter pc is 0000h, and the program is executed from the 0000h unit. 0003h 00c2h units are used as entry address of interrupt service program.therefore, the main program is generally stored from 0100