超大容量雙電層電容器主要技術參數(shù)的測試

1、研究與試制超大容量雙電層電容器主要技術參數(shù)的測試王國慶1,2,林忠富2,左偉忠2,王樹學2(11東北傳感技術研究所,黑龍江哈爾濱150001;21大慶華隆電子有限公司,黑龍江大慶163316摘要:介紹了利用時間常數(shù)法、恒流充電法及恒流放電法測靜電容量,詳細列出了不同容量值時的測試參數(shù)。三種測試方法比較表明:時間常數(shù)法簡單實用,恒流放電法和恒流充電法準確。同時介紹了等效串聯(lián)電阻及漏電流的測試方法。關鍵詞:雙電層電容器;靜電容量;等效串聯(lián)電阻;漏電流;測試方法中圖分類號:TM53;TM934122文獻標識碼:A文章編號:100122028(2000022*超大容量雙電層電容器(以下簡稱電容器是20

2、世紀70年代末發(fā)展起來的新型電子元件,80年代初在日本迅速實現(xiàn)了商品化。作為一種儲能元件,由于具有體積小、容量大、過電壓不擊穿、使用壽命長等特點,廣泛應用于存儲器的后備電源、太陽能電池的二次電源及瞬間電壓波動情況下的輔助電源。由于該類電容器在國際及國內(nèi)沒有一個統(tǒng)一的技術標準,有些科技人員在應用時對它的測量方法不很了解。筆者根據(jù)美國軍用標準、日本各公司測量標準以及筆者多年來從事該類電容器研究及生產(chǎn)的經(jīng)驗,將該類電容器的測試方法,特別是靜電容量的幾種測試方法作些介紹。1靜電容量的測試該類電容器由于具有超大的靜電容量,特別是相對較大的等效串聯(lián)電阻,因此用常規(guī)的測試方法很難測出其有效容量。目前,各生產(chǎn)

3、廠商的測試方法也不盡相同,本文介紹三種測試方法。111時間常數(shù)法11111測量原理電容器恒壓充電特性遵循下列公式:V C=E1-exp(-t R C式中:V C為電容器兩端電壓;E為恒定充電電源電壓;t為充電時間。當t=R C時:V C=E(1-e-1=01632E因此,V C從001632E時,電容器的靜電容量可用以下公式計算:C=t R(1測試原理見圖1。11112測試條件充電電壓為電容器的額定工作電壓。時間可用秒表記錄,從開關閉合對電容器充電開始,到電容器兩端的電壓為01632倍的充電電壓為止。取樣電阻依電容器容量值而不同,下面是幾種容量值時的取樣電阻值。01047F以下:R0=1000

4、8011F:R0=5108 0122F:R0=20080147F以上:R0=1008測試前應將電容器短路放電30m in以上。例如:測試5V 0122F電容器,按上述測試原理及條件進行,用測得的時間除以2008,即為該電容器的實際容量。該電容器容差為-20%+80%,測得的時間為3579s。E為直流穩(wěn)壓電源;R0為取樣電阻;C為被測電容器;V為直流電壓表;K為開關圖1時間常數(shù)法容量測試原理112恒流充電法11211測試原理 對任何電容器電容量的計算都遵循公式:C=Q V CC=it V C d t當充電電流i為一定值,電容器電壓由0V C時的時間可測,則C=I t V C(2式中:I為充電電流

5、;V C為電容器兩端的電壓;t為電容器兩端電壓由0V C時所用的時間。測試原理見圖2。圖2恒流充電法電容量測試原理收稿日期:1999209230修回日期:1999211224作者簡介:王國慶(1964-,男,山東省沂南人,大慶華隆電子有限公司總工程師兼超大容量電容器事業(yè)部經(jīng)理,主要從事雙電層電容器生產(chǎn)和開發(fā)工作。在本測試方法中,用函數(shù)記錄儀記錄電容器兩端的電壓及充電時間,顯示t 2V 關系曲線如圖3。 圖3電容器恒流充電t 2V 曲線從圖3看出,在電容器充電的瞬間產(chǎn)生一個電壓V 1,這是由于該電容器有一個相對較大的等效串聯(lián)電阻而產(chǎn)生的,因此,在計算電容量時V C =V 2-V 1。11212測

6、試條件測試前將電容器短路放電30m in 以上。V C 應等于額定工作電壓。充電電流根據(jù)容量不同而不同,下面給出幾種不同容量電容器的充電電流,供參考。01047F 以下:I 0=5mA 011F :I 0=10mA 0122、0147F:I 0=50mA110F :I 0=100mA例如:測試5V 0122F 電容器,充電電流0105A ,在記錄儀的記錄紙上取V C =5V 時的時間t ,合格品應在1840s 之間,用這個時間乘以0105A 除以5V ,即為該電容器的實際電容量。 113恒流放電法11311測試原理同恒流充電法一樣,當電容器以一個恒定的電流I 放電時,電容器的容量C 與電容器某

7、一時段的電壓降的乘積,等于電容器這一時段所放的電量。C V =Q =I t C =I t V(3式中:I 為恒定放電電流;t 為電容器由V 1下降至V 2時所需時間;V 為t 時段的電壓降,即V =V 1-V 2。測量原理見圖4。 A 為直流電流表圖4恒流放電法測試原理電容器測量過程見圖5。 t s 為電容器恒壓充電時間圖5充放電過程曲線11312測試條件被測電容器在恒流放電前應恒壓充電30m in ,充電電壓為電容器的額定工作電壓。V 1-V 2=015V ,V 1約取電容器額定電壓1 2,即12V R ,如額定電壓V R 為515V 的電容器,V1取215V 。放電電流應取1mA F 為宜

8、,放電電流越大,所測電容量將越小。一般情況下,將該電容器短路大電流放電后,電壓將有一定量的恢復。114幾點說明這三種電容量測試方法所測的電容量有所不同。按本文的測試條件,時間常數(shù)法與恒流充電法接近,而恒流放電法比時間常數(shù)法所測的電容量大113116倍。目前,市場所售電容器一般是作為低功耗器件的備用電源使用的,因此,恒流放電法與實際應用相近,對應用來講是比較準確的,但測試時間長,不如時間常數(shù)法簡便。因此,通常采用時間常數(shù)法或恒流充電法。恒流充電法是我們在科研過程中經(jīng)常使用的,充電過程比較直觀。日本N EC 公司采用時間常數(shù)法,美國軍用標準也采用此法進行測試。日本松下公司采用恒流放電法。2等效串聯(lián)

9、電阻的測試211測試原理雙電層電容器的等效電路如圖6。C 0為等效的理想電容器;R s 為等效串聯(lián)電阻(內(nèi)阻;R j 為絕緣電阻圖6雙電層電容器等效電路當電容器被施加交流電流時,理想電容器C 0為短路狀態(tài),而在等效串聯(lián)電阻R s 上產(chǎn)生一個壓降,即V R s =V C ,當交流電流為一定值時,電容器的等效串聯(lián)電阻可由(4式計算:R s =V C I(4測試原理見圖7。C 為被測電容器;V 為交流電壓表;A 為交流電流表圖7等效串聯(lián)電阻測試原理212測試條件環(huán)境溫度:(25±5。信號頻率:(1000±100H z 。回路內(nèi)交流電流:(10±1mA 。3漏電流的測試3

10、11測試原理由于該電容器靜電容量非常大,因此,規(guī)定在該電容器上施加工作電壓30m in 后所測得的電流為該電容器的漏電流,其電流I A <3×10-4C F V V (C 為電容器的標稱靜電容量;V 為電容器的額定工作電壓值。(下轉第21頁多年來雖在各方面取得了可喜進展,但要真正實現(xiàn)FFET存儲器的實用化,還有一系列問題需要研究解決,如:鐵電體 半導體界面狀態(tài)的控制、退極化、漏電流與保持力及它們之間的相互關系等問題。這些問題之間相互關聯(lián),互為因果,所以要從根本上解決這些問題,還必須從鐵電薄膜材料的選擇、材料的優(yōu)化組合、制備工藝的優(yōu)化、緩沖層的選擇及優(yōu)化組合、電極材料的選擇、FF

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14、effect transisto r using A l Sr B i2T a2O9 CeO2 Si(100structuresJ1Jpn J A pp l Phys,1997,36(9B:5908591117Jun Yu,Zhao J ianhong,W enli Zhou,et a l1Fo r m ati on and characteristics of Pb(Zr,T iO3field2effect transisto r w ith a Si O2buffer layerJ1A pp l Pyh s L ett,1997,70(4:49049218T adah iko H,Kazu

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22、件測試溫度:(25+5。施加電壓為電容器的工作電壓,且在測試過程中電源電壓波動不超過±0101V。充電時間:110F以下為30m in,超過110F為60m in。取樣電阻的選取:01047F以下:100080110147F:1008110F以上:1084結束語由于該類電容器的靜電容量非常大,無論是哪種方法都不一定測得其準確的電容量,因此,容差規(guī)定的范圍也較大,通常為-20%+80%。對等效串聯(lián)電阻和漏電流測試,各廠商的方法是一致的。隨著該類電容器應用領域的擴大,檢測標準也會在我國得到統(tǒng)一。參考文獻:1M ilitary Specificati on DOD-C-29501S1198

23、612Q UN T KN1211996,電子部四十九所1CSC-4B型系列超大容量電容器S13N EC1E lectric Double L ayer Capacito rsZ1199314松下電器1E lectric Double L ayer Capacito rs(Go ld Capacito rZ119901(編輯:伍大志better sensibility and consistency can be acquired w hen the temperature and th ickness being accurately contro lled in p rocess1(4 re

24、fs1Key words:SnO2;gas senso rs;th ick fil m techno logy;fil m th ickness;heat treatm ent;sensibilityPerfor mance test of super double layer capac itors1WAN G Guo2qing1,2,L I N Zhong2fu2,Z UO W ei2zhong2,WAN G Shu2xue2(11 N o rtheast Ch ina Institute of Sensing T echno logy,H aerbin H eilongjiang1500

25、01;21H ualong E lectronics Co1,L td1,D aqing H eilongjiang1633161EL ECT RON IC COM PON EN T S&M A T ER IA L S(Ch ina,V o l119,N o12,P115216,21(A p r120001In Ch inese1T h ree m ethods fo r testing static capacitance are p resented1T hey are ti m e constant m ethod,constant current charge m ethod

26、and constant current discharge m ethods1T he first one is si m p ler and the o ther tw o are mo re accurate1T he m ethods fo r testing ESR and leakage current are also p resented1(4refs1Key words:double layer capacito rs;static capacitance;ESR;leakage current;test m ethodsD evelop m en t of auto mat

27、ic sorti ng mach i nes for f il m capac itors made i n Ch i na1CH EN D e2hong(Shanghai SiriE lectronic System Co1,L td1,Shanghai2000821EL ECT RON IC COM PON EN T S&M A T ER IA L S(Ch ina,V o l119,N o12,P117218(A p r120001In Ch inese1Ch inese m ade fil m capacito rs so rting m ach ines have been

28、develop ing w ith the developm ent of the capacito r techno logy,from M odel XF10,XF10B,XF10D to XF10E1T he new generati on w ill be vertical caterp illar track style1(no refs1Key words:fil m capacito rs;autom atic so rting m ach ines;test frequency;capacito r param eters1The ferroelectr ic f ield e

29、ffect tran sistor1WAN G H ua1,2,YU Jun1,ZHOU W en2li1,WAN G Yun2bo1,X IE J i2fan1,ZHOU Dong2 xiang1,ZHU L i2li1(11D epartm ent of E lectronic Science&T echno logy,H uazhong U niversity of Science&T echno logy,W uhan H ubei430074;21D epartm ent of E lectronic&Comm unicati on,Guilin Instit

30、ute of E lectronic techno logy,Guilin Guangxi5410001EL ECT RON IC COM PON EN T S&M A T ER IA L S(Ch ina,V o l119,N o12,P119221(A p r120001In Ch inese1T he structure,m emo ry p rinci p le and m anufacture techno logy of ferroelectric field effect transisto rs(FFETare p resented1T he i m p rovem e

31、nt of FFET structure design and the app licati on of ferroelectric fil m on FFET are review ed1T he effects of ferroelectric fil m,transiti on layer,structure and fil m fo r m ati on techno logy on the m emo ry characteristic are discussed1T he comm ents on p resent study on FFET and the exiting p r

32、oblem s are also given1(19refs1Key words:ferroelectric th in fil m;ferroelectric field effect transisto rs;m emo ry characteristicThe-st ate-of-the-art of h igh te m perature superconductor M C M1DU X iao2song,Yang Bangchao(U niversity of E lectronic Science and T echno logy of Ch ina,Chengdu Sichua

33、n6100541EL ECT RON IC COM PON EN T S&M A T ER IA L S(Ch ina,V o l119,N o12,P122223,33(A p r120001In Ch inese1H igh temperature superconducto r(H T SM C M is a p rom ising techno logy and it is regarded as the greatest innovati on after the discovery of h igh temperature superconductivity1T he co

34、m binati on of H T S and M C M is a good app roach to break th rough the interconnect bo ttleneck1H T S M C M m eets the requirem ents of h igh speed,compactness and w ide bandw idth of future electronics1 T he study ach ievem ents of H T S M C M are review ed,the existing technical p roblem s summ

35、arized,and the perspective of th is new techno logy is p resented1(12refs1Key words:M C M;h igh temperature superconductivity;interconnecti onSolder jo i n t i n electron ic packages and its reli ability1WAN G Q ian1,WAN G Gang2qiang1,Sh i2W ei R icky L EE2,GEN G Zh i2ting1, HUAN G L e1,TAN G X iang

36、2yun1,M a Ju2sheng1(11D epartm ent of M aterials Science and T echno logy,T singhua U niversity, Beijing100084;21D epartm ent of M echanical Engineering,Hong Kong U niversity of Science&T echno logy Hong Kong Ch ina1 EL ECT RON IC COM PON EN T S&M A T ER IA L S(Ch ina,V o l119,N o12,P124226(

37、A p r120001In Ch inese1Failure of a single so lder j o int in an electronic package m ay cause the overall failure of the device,even the w ho le system1Failures of so lder j o ints usually result from the grow th of creep fatigue crack under ther m al cycling1T he research of so lder j o ints and i

38、ts reliability is introduced,w ith respects of so lder j o int m icro structure,failure analysis,reliability fo recast,etc(12refs1Key words:electronic packages;so lder j o ints;reliabilityI m prove m en t of pulse volt age ag i ng technology for A l electrolytic capac itors by orthogonal test1WAN G Yu2hua(Zhuhai Gelixinyuang E lectronic Component Facto ry,Zhuhai Guangdong5190201EL ECT RON I