數字電路--門電路原理及ICT測試LIB的編定

1、Bojay ICT數字電路之 門電路原理及測試LIB的編寫B(tài)ojay ICTBojay ICTBojay ICTBojay ICT ttBojay ICT 脈沖躍變后的值比初始值高脈沖躍變后的值比初始值高脈沖躍變后的值比初始值低脈沖躍變后的值比初始值低0+3V0-3V0+3V0-3VBojay ICT A0.9A0.5A0.1AtptrtfTBojay ICT 所謂門就是一種開關，它能按照一定的條件所謂門就是一種開關，它能按照一定的條件去控制信號的通過或不通過。去控制信號的通過或不通過。 門電路的輸入和輸出之間存在一定的邏輯關門電路的輸入和輸出之間存在一定的邏輯關系系(因果關系因果關系)，所以

2、門電路又稱為，所以門電路又稱為邏輯門電路邏輯門電路。 基本邏輯關系為基本邏輯關系為三種。三種。 下面通過例子說明邏輯電路的概念及下面通過例子說明邏輯電路的概念及的意義。的意義。Bojay ICT220V+- Y = A B000101110100ABYBYABojay ICTvector IN_10 set A to 1 set B to 0 set Y to “0end vectorvector IN_11 set A to 1 set B to 1 set Y to 1end vectorunit OUT vs IN execute IN_00 execute IN_01 execute

3、IN_10 execute IN_11end unitassign VCC to pins 5assign GND to pins 3assign A to pins 1assign B to pins 2assign Y to pins 4family LVTpower VCC,GNDinputs A,Boutputs Yvector IN_00 set A to 0 set B to 0 set Y to 0end vectorvector IN_01 set A to 0 set B to “1 set Y to “0end vectorBojay ICTBY220VA+- Y = A

4、+ B000111110110ABYBojay ICTvector E1_Input_10 set E1_Inputs to 10 set E1_Output to “1end vectorvector E1_Input_11 set E1_Inputs to 11 set E1_Output to 1end vectorunit Element number 1 execute E1_Input_11 execute E1_Input_01 execute E1_Input_00 execute E1_Input_10end unitassign VCC to pins 5assign GN

5、D to pins 3assign E1_Inputs to pins 1,2assign E1_Output to pins 4family LVTpower VCC, GNDinputs E1_Inputsoutputs E1_Outputvector E1_Input_00 set E1_Inputs to 00 set E1_Output to 0end vectorvector E1_Input_01 set E1_Inputs to 01 set E1_Output to “1end vectorBojay ICT101AY0Y220VA+-RBojay ICTvector OUT

6、_1 set IN to 0 set OUT to 1end vectorunit OUT vs IN execute OUT_0 execute OUT_1end unitassign VCC to pins 5assign GND to pins 3assign NC to pins 1assign IN to pins 2assign OUT to pins 4power VCC,GNDinputs INoutputs OUTnondigital NCfamily LVTvector OUT_0 set IN to 1 set OUT to 0end vectorBojay ICTBoj

7、ay ICT輸入輸入A、B、C全為高電平全為高電平“1”，輸出輸出 Y 為為“1”。輸入輸入A、B、C不全為不全為“1”，輸出輸出 Y 為為“0”。0V0V0V0V0V3V+U 12VRDADCABYDBC3V3V3V0V00000010101011001000011001001111ABYC0V3VBojay ICT邏輯邏輯即：有即：有“0”出出“0”， 全全“1”出出“1”Y=A B C&ABYC00000010101011001000011001001111ABYCBojay ICT0V0V0V0V0V3V3V3V3V0V00000011101111011001011101011111A

8、BYC3V3V-U 12VRDADCABYDBC輸入輸入A、B、C全為低電平全為低電平“0”，輸出輸出 Y 為為“0”。輸入輸入A、B、C有一個為有一個為“1”，輸出輸出 Y 為為“1”。Bojay ICT(3) 邏輯關系邏輯關系：邏輯邏輯即：有即：有“1”出出“1”， 全全“0”出出“0”Y=A+B+CABYC 100000011101111011001011101011111ABYCBojay ICT+UCC-UBBARKRBRCYT 1 0飽和飽和(2) 邏輯表達式：邏輯表達式：Y=A“0”10“1”“0”“1”AY邏輯符號邏輯符號1AYBojay ICT有有“0”出出“1”，全，全“1

9、”出出“0”&ABCY&ABC00010011101111011001011101011110ABYCY=A B C1YBojay ICTassign VCC to pins 5assign GND to pins 3assign E1_Inputs to pins 1,2,6assign E1_Output to pins 4family TTLpower VCC, GNDinputs E1_Inputsoutputs E1_Outputvector E1_Input_000 set E1_Inputs to 000 set E1_Output to 1end vectorvector E1

10、_Input_001 set E1_Inputs to 001 set E1_Output to “1end vectorvector E1_Input_010 set E1_Inputs to “010 set E1_Output to “1end vectorvector E1_Input_011 set E1_Inputs to “011 set E1_Output to “1end vectorvector E1_Input_100 set E1_Inputs to “100 set E1_Output to “1end vectorvector E1_Input_101 set E1

11、_Inputs to “101 set E1_Output to “1end vectorvector E1_Input_110 set E1_Inputs to “011 set E1_Output to “1end vectorvector E1_Input_111 set E1_Inputs to “111 set E1_Output to 0end vectorunit Element number 1 execute E1_Input_000 execute E1_Input_001 execute E1_Input_010 execute E1_Input_011 execute

12、E1_Input_100 execute E1_Input_101 execute E1_Input_111end unitBojay ICTYABC1YABC 1有有“1”出出“0”，全，全“0”出出“1”00010010101011001000011001001110ABYCY=A+B+C 1Bojay ICTassign VCC to pins 5assign GND to pins 3assign E1_Inputs to pins 1,2,6assign E1_Output to pins 4family TTLpower VCC, GNDinputs E1_Inputsoutput

13、s E1_Outputvector E1_Input_000 set E1_Inputs to 000 set E1_Output to 1end vectorvector E1_Input_001 set E1_Inputs to 001 set E1_Output to “0end vectorvector E1_Input_010 set E1_Inputs to “010 set E1_Output to “0end vectorvector E1_Input_011 set E1_Inputs to “011 set E1_Output to “0end vectorvector E

14、1_Input_100 set E1_Inputs to “100 set E1_Output to “0end vectorvector E1_Input_101 set E1_Inputs to “101 set E1_Output to “0end vectorvector E1_Input_110 set E1_Inputs to “011 set E1_Output to “0end vectorvector E1_Input_111 set E1_Inputs to “111 set E1_Output to 0end vectorunit Element number 1 exe

15、cute E1_Input_000 execute E1_Input_001 execute E1_Input_010 execute E1_Input_011 execute E1_Input_100 execute E1_Input_101 execute E1_Input_111end unitBojay ICTABY1有有“0”出出“0”，全全“1”出出“1”有有“1”出出“1”，全全“0”出出“0”&ABY1 1ABY2Y2Bojay ICTABC&1&D1YY=A.B+C.D1&YABCD邏輯符號邏輯符號Bojay ICTBojay ICT T5Y R3R5AB CR4R2R1 T

16、3 T4T2+5V T1E2E3E1BCBojay ICT T5Y R3R5AB CR4R2R1 T3 T4T2+5V T14.3V鉗位鉗位2.1V“0”(0.3V)輸入全高輸入全高“1”,輸出為輸出為低低“0”1VT1R1+Ucc T4Bojay ICT T5Y R3R5AB CR4R2R1 T3 T4T2+5V T11V(0.3V)“1”“0”輸入有低輸入有低“0”輸出為輸出為高高“1” 流過流過 E結的電結的電流為正向電流流為正向電流5VVY 5-0.7-0.7 =3.6VBojay ICT00010011101111011001011101011110ABYCY=A B CY&ABCB

17、ojay ICTBojay ICTBojay ICT50%50%tpd1tpd22 2p pt t2 2p pt t1 1p pd dttt 輸入波形輸入波形ui輸出波形輸出波形uOBojay ICT“1”控制端控制端 DE D T5Y R3R5AB R4R2R1 T3 T4T2+5V T1Bojay ICT“0”控制端控制端 DE T5Y R3R5AB R4R2R1 T3 T4T2+5V T11V1VBojay ICT&YEBA邏輯符號邏輯符號 0 高阻高阻0 0 1 1 0 1 1 1 1 0 1 11 1 1 0ABEY功能表功能表1E0EABY Bojay ICT“1”“0”“0”A1

18、 B1Bojay ICT&YCBA T5Y R3AB CR2R1T2+5V T1RLU Bojay ICTY&CBAKA+24VKA220&A1B1C1Y1&A2B2C2Y2&A3B3C3Y3URLY“1”“0”“0”“0”“0”Bojay ICTY&CBAKA+24VKA220&A1B1C1Y1&A2B2C2Y2&A3B3C3Y3URLY“1”“0”“0”“1”0Bojay ICT4. 1 CMOS 非門電路非門電路AYT2+UDDT1N 溝道溝道P 溝道溝道GGDSSBojay ICTT4 與與 T3 并聯，并聯，T1 與與 T2 串聯；串聯； 當當 AB 都是高電平時都是高電平時,T1

19、與與 T2 同時導通，同時導通，T4 與與 T3 同時截止；輸出同時截止；輸出 Y 為為低電平。低電平。 當當AB中有一個是低中有一個是低電平時，電平時，T1與與T2中有一中有一個截止，個截止，T4與與T3中有一中有一個導通個導通, 輸出輸出Y 為高電平。為高電平。4. 2 CMOSABT4T3T1T2+UDDYBojay ICTBT4T3T1T2AY 當當 AB 中有一個是中有一個是高電平時，高電平時，T1 與與 T2 中中有一個導通，有一個導通，T4 與與 T3 中有一個截止，輸出中有一個截止，輸出 Y 為低電平。為低電平。 當當AB都是低電平都是低電平時，時，T1 與與 T2 同時截止，

20、同時截止，T4 與與 T3 同時導通；輸同時導通；輸出出 Y 為高電平。為高電平。4. 3 CMOSBojay ICT4. i3VT ViiiBojay ICTiii4. 3VT VBojay ICTTGuiuOCCTGuiuiCC1“1”TGuiuiCC1“0”4. Bojay ICTBojay ICTBojay ICT5 加法器加法器0 0 0 0 11+10101010不考慮低位不考慮低位來的進位來的進位半加器實現半加器實現全加器實現全加器實現Bojay ICTBojay ICTBABABASABSCABC A B S C0 0 0 00 1 1 01 0 1 01 1 0 1Bojay

21、 ICT輸入輸入-1表示低位來的進位表示低位來的進位AiBiCi-1SiCiBojay ICT1iii1iii1iii1iiiiCBACBACBACBAS1iii1iii1iii1iiiiCBACBACBACBAC1ii1iiiiCACBBA1iiiCBA0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 1 0 0 01 0 1 0 1 1 0 0 1 1 1 1 1Bojay ICT1ii1iiiiiCACBBAC1iiiiCBAS1BiAiCi-1Si&=11CiSi&Bojay ICT n 位二進制代碼有位二進制代碼有 2n 種組合，可以表示種組合，可以表示 2n 個

22、信息。個信息。Bojay ICT編碼器編碼器Bojay ICT 解：解：Bojay ICT0 0 01 0 0I0I1I2I3I5I6I輸入輸入輸輸 出出Y2 Y1 Y0Bojay ICTY2 = I4 + I5 + I6 +I7 = I4 I5 I6 I7.= I4+ I5+ I6+ I7Y1 = I2+I3+I6+I7 = I2 I3 I6 I7. . .= I2 + I3 + I6+ I7Y0 = I1+ I3+ I5+ I7 = I1 I3 I5 I7.= I1 + I3+ I5 + I7Bojay ICT10000000111I7I6I5I4I3I1I2Y2Y1Y0Bojay ICT

23、表示十進制數表示十進制數10個個編碼器編碼器Bojay ICT 00011101000011110001101100000000111Bojay ICTY3 = I8+I9Bojay ICT10000000011101101001& 1 1 1 1 1 1 I1 I2 I3 I4 I5 I6 I7 I8 I9Bojay ICT98983.IIIIY 765476542IIIIIIIIY 763276321IIIIIIIIY 97531975310IIIIIIIIIIY Bojay ICT十鍵十鍵8421碼編碼器的邏輯圖碼編碼器的邏輯圖+5V&Y3&Y2&Y1&Y0I0I1I2I3I4I5I6I

24、7I8I91K 10S001S12S23S34S45S56S67S78S89S9Bojay ICTBojay ICTBojay ICTGND 1287654YYIIIII091233CC NYIIIIYU16 15 14 13 12 11 10 91 2 3 4 5 6 7 8Bojay ICTBojay ICT 輸輸 入入A B CY0 Y1 Y2 Y3 Y4 Y5 Y6 Y70 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 01 0 0 0 0 0 0 1 0 0 01 0

25、1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1輸輸 出出Bojay ICTY0=A B CY1=A B CY2=A B CY3=A B CY7=A B CY4=A BCY6=A B CY5=A B CBojay ICTCBA111&Y0Y1Y2Y3Y4Y5Y6Y70 1 11 0 010000000AABBCCBojay ICT0AS2-4線譯碼器線譯碼器ABCD0Y1Y2Y時時，當當 0 S3Y1AAEBECEDEBojay ICT0AS 2-4線譯碼器線譯碼器ABCD0Y1Y2Y時時，當當 0 S3Y1AAEBECEDE00脫離總線脫離總線數據數據Bojay ICT 74LS139型譯碼器型譯碼器(a) 外引線排列圖；外引線排列圖；(b) 邏輯圖邏輯圖(a)GND1Y31Y21Y11Y01A11A01S876543212Y22Y32Y11Y02A12A02S+UCC10916151413121174LS139(b