EDA專業(yè)課程設(shè)計方案報告書

《電子設(shè)計自動化EDA》課程設(shè)計匯報書學(xué)號：08057102班級：自動化081姓名：陳婷指導(dǎo)老師：劉偉目錄一、設(shè)計思想 2二、設(shè)計步驟 3三、調(diào)試過程 8四、結(jié)果分析 10五、心得體會 11六、參考文件 11一、設(shè)計思想（一）、設(shè)計要求1、含有以二十四小時制時、分、秒記時、顯示功效。2、含有整點報時功效，整點報時同時LED花樣顯示。3、含有消零，調(diào)整小時，分鐘功效。4、設(shè)計精度要求為1s。(二)、系統(tǒng)功效描述1.、系統(tǒng)輸入：調(diào)時、調(diào)分，清零信號，分別用按鍵開關(guān)SETHOUR、SETMIN、RESET控制；計數(shù)時鐘信號CLK采取2HZ時鐘源，掃描時鐘信號CLKDSP采取32HZ時鐘源或更高；2、系統(tǒng)輸出：8位八段共陰極數(shù)碼管顯示輸出；LED花樣顯示輸出；3、系統(tǒng)功效具體描述：計時：正常工作狀態(tài)下，每日按二十四小時計時制，蜂鳴器無聲，逢整點報時。顯示：要求采取掃描顯示方法驅(qū)動8位8段數(shù)碼管顯示。整點報時：蜂鳴器在“51”、“53”、“55”、“57”、校時：在計時狀態(tài)下，按下按鍵SETMIN設(shè)定分鐘，按下按鍵SETHOUR設(shè)定小時。（三）設(shè)計思緒1、分別寫出六進(jìn)制、十進(jìn)制、二十四進(jìn)制、清零、設(shè)置時分、LED譯碼部分，在主體部分用元件例化語句計時，清零設(shè)置時分、LED譯碼，再加上掃描模塊2、將六進(jìn)制、十進(jìn)制、二十四進(jìn)制、清零、設(shè)置時分、LED譯碼、掃描模塊分模塊寫在一個主中（四）系統(tǒng)電路結(jié)構(gòu)框圖二、設(shè)計步驟（一）多種進(jìn)制計時立即鐘控制模塊程序1、6進(jìn)制libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycounter6isport(clk,reset,set:instd_logic;ain:instd_logic_vector(3downto0);aout:outstd_logic_vector(3downto0);co:outstd_logic);endcounter6;architectureart2ofcounter6issignalcount:std_logic_vector(3downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenif(reset='0')thencount<="0000";elsif(set='1')thencount<=ain;elsif(count="0101")thencount<="0000";co<='1';elsecount<=count+1;co<='0';endif;endif;endprocess;aout<=count;endart2;2、10進(jìn)制libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycounter10isport(clk,reset,set:instd_logic;ain:std_logic_vector(3downto0);aout:outstd_logic_vector(3downto0);co:outstd_logic);endcounter10;architectureart1ofcounter10issignalcount:std_logic_vector(3downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenif(reset='0')thencount<="0000";elsif(set='1')thencount<=ain;elsif(count="1001")thencount<="0000";co<='1';elsecount<=count+1;co<='0';endif;endif;endprocess;aout<=count;endart1;3、24進(jìn)制ibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycounter24isport(clk,reset,set:instd_logic;ainh:instd_logic_vector(3downto0);ainl:instd_logic_vector(3downto0);aout:outstd_logic_vector(7downto0));endcounter24;architectureart3ofcounter24issignalcount:std_logic_vector(7downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenif(reset='0')thencount<="00000000";elsif(set='1')thencount(7downto4)<=ainh;count(3downto0)<=ainl;elsif(count(7downto4)<"0011")thenif(count(7downto4)="0010"andcount(3downto0)="0011")thencount<="00000000";elsif(count(3downto0)="1001")thencount(3downto0)<="0000";count(7downto4)<=count(7downto4)+1;elsecount(3downto0)<=count(3downto0)+1;endif;endif;endif;--endif;endprocess;aout<=count;endart3;（二）系統(tǒng)整體程序libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityclockisport(clk,b1,clks:instd_logic;reset:instd_logic;setmin,sethour:instd_logic;minutell,minutehh,hourll,hourhh,b2:instd_logic_vector(3downto0);secondl,secondh:outstd_logic_vector(3downto0);--second0,second2:outstd_logic_vector(6downto0);minutel,minuteh:outstd_logic_vector(3downto0);--minute0,minute2:outstd_logic_vector(6downto0);hourl,hourh:outstd_logic_vector(3downto0);--hour0,hour2,dout:outstd_logic_vector(6downto0);dout:outstd_logic_vector(6downto0);s:outstd_logic_vector(2downto0);singing,light:outstd_logic);endclock;architectureartofclockiscomponentcounter10isport(clk,reset,set:instd_logic;ain:instd_logic_vector(3downto0);aout:outstd_logic_vector(3downto0);co:outstd_logic);endcomponent;componentcounter6isport(clk,reset,set:instd_logic;ain:instd_logic_vector(3downto0);aout:outstd_logic_vector(3downto0);co:outstd_logic);endcomponent;componentcounter24isport(clk,reset,set:instd_logic;ainh,ainl:std_logic_vector(3downto0);aout:outstd_logic_vector(7downto0));endcomponent;componentled7isport(ain:instd_logic_vector(3downto0);aout:outstd_logic_vector(6downto0));endcomponent;signalcs0,cs1,cm0,cm1:std_logic;signals0,s1,m0,m1,h0,h1,cout:std_logic_vector(3downto0);signalh:std_logic_vector(7downto0);signalcount:std_logic_vector(2downto0);beginh0<=h(3downto0);h1<=h(7downto4);u1:counter10portmap(clk=>clk,reset=>reset,set=>b1,ain=>b2,aout=>s0,co=>cs0);u2:counter6portmap(clk=>cs0,reset=>reset,set=>b1,ain=>b2,aout=>s1,co=>cs1);u3:counter10portmap(clk=>cs1,reset=>reset,set=>setmin,ain=>minutell,aout=>m0,co=>cm0);u4:counter6portmap(clk=>cm0,reset=>reset,set=>setmin,ain=>minutehh,aout=>m1,co=>cm1);u5:counter24portmap(clk=>cm1,reset=>reset,set=>sethour,ainl=>hourll,ainh=>hourhh,aout=>h);u6:led7portmap(ain=>cout,aout=>dout);secondl<=s0;secondh<=s1;minutel<=m0;minuteh<=m1;hourl<=h0;hourh<=h1;process(m1,m0,s1,s0)beginif(m1="0101"andm0="1001"ands1="0101"ands0="1001")thensinging<='1';light<='1';elsesinging<='0';light<='0';endif;endprocess;process(clks)beginif(clks'eventandclks='1')thenif(count="101")thencount<="000";elsecount<=count+1;endif;s<=count;CASEcountIS when"000"=>cout<=s0;when"001"=>cout<=s1;when"010"=>cout<=m0;s<="010";when"011"=>cout<=m1;when"100"=>cout<=h0;when"101"=>cout<=h1;whenothers=>cout<="0000";endcase;endif;endprocess;endart;三、調(diào)試過程(一)仿真波形1、6進(jìn)制程序仿真波形2、10進(jìn)制程仿真波形3、24進(jìn)制程序仿真波形4、系統(tǒng)程序仿真波形（二）分析問題1:u6:led7portmap(ain=>secondl,aout=>second0);u7:led7portmap(ain=>secondh,aout=>second1);u8:led7portmap(ain=>minutel,aout=>minute0);u9:led7portmap(ain=>minuteh,aout=>minute1);u10:led7portmap(ain=>hourl,aout=>hour0);u11:led7portmap(ain=>hourh,aout=>hour1);問題分析：元件例化是并行語句，按此段代碼LDE并行顯示，每一個數(shù)碼管全部需要八個端口，這么就需要八排插口，而試驗箱只有一排端口。處理措施：采取掃描顯示方法，修改程序為：u6:led7portmap(ain=>cout,aout=>dout);問題2:u1:counter10portmap(clk=>clk,reset=>reset,aout=>s0,co=>cs0);問題分析：此元件例化中有set,ain兩個端口沒有用到處理措施：設(shè)置兩個輸入端口使set和ain為無效信號，設(shè)置b1，b2，使set=>b1,ain=>b2，b1，b2類型必需分別和set和ain相同，在連線時可用撥碼開關(guān)將b1，b2置成對應(yīng)狀態(tài)。問題3:對變量多重賦值處理措施：設(shè)置中間信號問題4:元件例化模塊采取名稱映射時兩個變量類型不相同處理措施：名稱映射兩變量類型應(yīng)相同四、結(jié)果分析1、10進(jìn)制計數(shù)器分析：當(dāng)reset=‘0‘時，aout<=’0000’當(dāng)set=‘1‘時，aout<=ain(0011);當(dāng)reset=‘1‘且set=‘0‘時，開始計數(shù)從“0000”到“1001”，當(dāng)aout=“1001”時aout被置零，且進(jìn)位Co<=2、6進(jìn)制計數(shù)器分析：當(dāng)reset=‘0‘時，aout<=’0000’當(dāng)set=‘1‘時，aout<=ain(0101);當(dāng)reset=‘1‘