《信息科學(xué)類專業(yè)英語(yǔ)》課件第9章

Lesson9SurveyofResearchandPracticesofNetwork-on-Chip

(第九課片上網(wǎng)絡(luò)的研究與實(shí)踐綜述)

Vocabulary(詞匯)ImportantSentences(重點(diǎn)句)QuestionsandAnswers(問(wèn)答)Problems(問(wèn)題)

ThescalingofmicrochiptechnologieshasenabledlargescaleSystems-on-Chip(SoC).Network-on-Chip(NoC)researchaddressesglobalcommunicationinSoC,involving(i)amovefromcomputation-centrictocommunication-centricdesignand(ii)theimplementationofscalablecommunicationstructures.Thissurvey,wedefinethefollowingabstractions:system,networkadapter,network,andlinktoexplainandstructurethefundamentalconcepts.First,researchrelatingtotheactualnetworkdesignisreviewed.Thensystemleveldesignandmodelingarediscussed.Wealsoevaluateperformanceanalysistechniques.TheresearchshowsthatNoCconstitutesaunificationofcurrenttrendsofintrachipcommunicationratherthananexplicitnewalternative.1Introduction

Chipdesignhasfourdistinctaspects:computation,memory,communication,andI/O.Asprocessingpowerhasincreasedanddataintensiveapplicationshaveemerged,thechallengeofthecommunicationaspectinsingle-chipsystems,Systems-on-Chip(SoC),hasattractedincreasingattention.ThissurveytreatsaprominentconceptforcommunicationinSoCknownasNetwork-on-Chip(NoC).

Aswillbecomeclearinthefollowing,NoCdoesnotconstituteanexplicitnewalternativeforintrachipcommunicationbutisratheraconceptwhichpresentsaunificationofon-chipcommunicationsolutions.Inthissection,wewillfirstbrieflyreviewthehistoryofmicrochiptechnologythathasledtoacallforNoC-baseddesigns.Withourmindsonintrachipcommunication,wewillthenlookatanumberofkeyissuesoflarge-scalechipdesignandfinallyshowhowtheNoCconceptprovidesaviablesolutionspacetotheproblemspresentlyfacedbychipdesigners.

1.1IntraSoCCommunication

Thescalingofmicrochiptechnologieshasleadtoadoublingofavailableprocessingresourcesonasinglechipeverysecondyear.Eventhoughthisisprojectedtoslowdowntoadoublingeverythreeyearsinthenextfewyearsforfixedchipsizes,theexponentialtrendisstillinforce.Thoughtheevolutioniscontinuous,thesystemlevelfocus,orsystemscope,movesinsteps.Whenatechnologymaturesforagivenimplementationstyle,itleadstoaparadigmshift.Examplesofsuchshiftsaremovingfromroom-torack-levelsystems(LSI-1970s)andlaterfromrack-toboard-levelsystems(VLSI-1980s).Recenttechnologicaladvancesallowingmultimilliontransistorchips(currentlywellbeyond100M)haveledtoasimilarparadigmshiftfromboardtochip-levelsystems(ULSI-1990s).ThescopeofasinglechiphaschangedaccordinglyasillustratedinFig.1.InLSIsystems,achipwasacomponentofasystemmodule(e.g.,abitsliceinabitsliceprocessor),inVLSIsystems,achipwasasystem-levelmodule(e.g.,aprocessororamemory),andinULSIsystems,achipconstitutesanentiresystem(hencethetermSystem-on-Chip).SoCopensupthefeasibilityofawiderangeofapplicationsmakinguseofmassiveparallelprocessingandtightlyinterdependentprocesses,someadheringtoreal-timerequirements,bringingintofocusnewcomplexaspectsoftheunderlyingcommunicationstructure.ManyoftheseaspectsareaddressedbyNoC.Fig.1Whenatechnologymatures,itleadstoaparadigmshiftinsystemscope.ShownhereisthechipscopeinLSI,VLSI,andULSI,thesequenceoftechnologiesleadingtotheenablingofSoCdesigns.

TherearemultiplewaystoapproachanunderstandingofNoC.Readerswellversedinmacronetworktheorymayapproachtheconceptbyadaptingproventechniquesfrommulticomputernetworks.Muchworkdoneinthisareaduringthe80sand90scanreadilybebuiltupon.Layeredcommunicationabstractionmodelsanddecouplingofcomputationandcommunicationarerelevantissues.Thereare,however,anumberofbasicdifferencesbetweenon-andoff-chipcommunication.Thesegenerallyreflectthedifferenceinthecostratiobetweenwiringandprocessingresources.

Historically,computationhasbeenexpensiveandcommunicationcheap.Withscalingmicrochiptechnologies,thischanged.Computationisbecomingevercheaper,whilecommunicationencountersfundamentalphysicallimitationssuchastime-of-flightofelectricalsignals,poweruseindrivinglongwires/cables,etc.Incomparisonwithoffchip,on-chipcommunicationissignificantlycheaper.Thereisroomforlotsofwiresonachip.Thustheshifttosingle-chipsystemshaverelaxedsystemcommunicationproblems.Howeveron-chipwiresdonotscaleinthesamemannerastransistorsdo,and,asweshallseeinthefollowing,thecostgapbetweencomputationandcommunicationiswidening.Meanwhilethedifferencesbetweenon-andoff-chipwiresmakethedirectscalingdownoftraditionalmulticomputernetworkssuboptimalforon-chipuse.

Inthissurvey,weattempttoincorporatethewholerangeofdesignabstractionswhilerelatingtothecurrenttrendsofintrachipcommunication.WiththeGigaTransistorChiperacloseathand,thesolutionspaceofintrachipcommunicationisfarfromtrivial.Wehavesummarizedanumberofrelevantkeyissues.Thoughnotnew,wefinditworthwhiletogothroughthemastheNoCconceptpresentsapossibleunificationofsolutionsforthese.InSection3and4,wewilllookintothedetailsofresearchbeingdoneinrelationtotheseissues,andtheirrelevanceforNoC.

Electricalwires.Eventhoughon-chipwiresarecheapincomparisonwithoff-chipwires,on-chipcommunicationisbecomingstillmorecostlyintermsofbothpowerandspeed.Asfabricationtechnologiesscaledown,wireresistanceper-mmisincreasingwhilewirecapacitancedoesnotchangemuch;themajorpartofthewirecapacitanceisduetoedgecapacitance.ForCMOS,theapproximatepointatwhichwiredelaysbegintodominategatedelayswasthe0.25μmgenerationforaluminum,and0.18μmforcopperinterconnectsasfirstprojectedinSIA.Shrinkingmetalpitches,inordertomaintainsufficientroutingdensities,isappropriateatthelocallevelwherewirelengthsalsodecreasewithscaling.Butglobalwirelengthsdonotdecrease,and,aslocalprocessingcycletimesdecrease,thetimespentonglobalcommunicationrelativetothetimespentonlocalprocessingincreasesdrastically.ThusinfutureDeepSubMicron(DSM)designs,theinterconnecteffectwilldefinitelydominateperformance.Fig.2,takenfromtheInternationalTechnologyRoadmapforSemiconductors,showstheprojectedrelativedelayforlocalwires,globalwires,andlogicgatesinthenearfuture.Anotherissueofpressingimportanceconcernssignalintegrity.InDSMtechnologies,thewiremodelsareunreliableduetoissueslikefabricationuncertainties,crosstalk,noisesensitivityetc.Theseissuesareespeciallyapplicabletolongwires.Duetotheseeffectsofscaling,ithasbecomenecessarytodifferentiatebetweenlocalandglobalcommunication,and,astransistorsshrink,thegapisincreasing.Theneedforglobalcommunicationschemessupportingsingle-chipsystemshasemerged.Fig.2Projectedrelativedelayforlocalandglobalwiresandforlogicgatesintechnologiesofthenearfuture.[ITRS2001].

Systemsynchronization.

Aschiptechnologiesscaleandchipspeedsincrease,itisbecominghardertoachieveglobalsynchronization.Thedrawbacksofthepredominantdesignstyleofdigitalintegratedcircuits,thatis,strictglobalsynchrony,aregrowingrelativetotheadvantages.[1]Theclocktreeneededtoimplementagloballysynchronizedclockisdemandingincreasingportionsofthepowerandareabudget,and,evenso,theclockskewisclaiminganeverlargerrelativepartofthetotalcycletimeavailable.Thishastriggeredworkonskew-tolerantcircuitdesign,whichdealswithclockskewbyrelaxingtheneedfortimingmargins,andontheuseofopticalwaveguidesforonchipclockdistribution,forthemainpurposeofminimizingpowerusage.Still,powerhungryskewadjustmenttechniquessuchasPhaseLockedLoops(PLL)andDelaylockedloops(DLL),traditionallyusedforchip-to-chipsynchronization,arefindingtheirwayintosingle-chipsystems.Asareactiontotheinherentlimitationsofglobalsynchrony,alternativeconceptssuchasGALS(GloballyAsynchronousLocallySynchronoussystems)arebeingintroduced.AGALSchipismadeupoflocallysynchronousislandswhichcommunicateasynchronously.Therearetwomainadvantageousaspectsofthismethod.Oneisthereducingofthesynchronizationproblemtoanumberofsmallersubproblems.TheotherrelatestotheintegrationofdifferentIP(IntellectualProperty)cores,easingthebuildingoflargersystemsfromindividualblockswithdifferenttimingcharacteristics.

Designproductivity.Theexplodingamountofprocessingresourcesavailableinchipdesigntogetherwitharequirementforshorteneddesigncycleshavepushedtheproductivityburdenontochipdesigners.Between1997and2002,themarketdemandreducedthetypicaldesigncycleby50%.Asaresultofincreasedchipsizes,shrinkinggeometries,andtheavailabilityofmoremetallayers,thedesigncomplexityincreased50timesinthesameperiod.Tokeepupwiththeserequirements,IPreuseispertinent.Anewparadigmfordesignmethodologyisneededwhichallowsthedesignefforttoscalelinearlywithsystemcomplexity.

AbstractionattheRegisterTransferLevel(RTL)wasintroducedwiththeASICdesignflowduringthe1990s,allowingsynthesizedstandardcelldesign.Thismadeitpossibletodesignlargechipswithinshortdesigncycles,andsynthesizedRTLdesignis,atpresent,thedefactostandardformakinglargechipsquickly.Buttheavailabilityofon-chipresourcesisoutgrowingtheproductivitypotentialofeventheASICdesignstyle.Inordertoutilizetheexponentialgrowthinnumberoftransistorsoneachchip,evenhigherlevelsofabstractionmustbeapplied.Thiscanbedonebyintroducinghigherlevelcommunicationabstractions,makingalayereddesignmethodologythatenablesapartitioningofthedesigneffortintominimallyinterdependentsubtasks.SupportforthisatthehardwarelevelincludesstandardcommunicationsocketswhichallowIPcoresfromdifferentvendorstobepluggedeffortlesslytogether.ThisisparticularlypertinentincomplexMultiProcessorSystem-on-Chip(MPSoC)designs.Also,thedevelopmentofdesigntechniquestofurtherincreasetheproductivityofdesigners,isimportant.ElectronicSystemLevel(ESL)designtoolsarenecessaryforsupportingadesignflowwhichmakeefficientuseofsuchcommunicationabstractionanddesignautomationtechniquesandwhichmakeforseamlessiterationsacrossallabstractionlevels.Pertainingtothis,thecomplex,dynamicinterdependencyofdatastreams—arisingwhenusingasharedmediafordatatraffic—threatenstofoiltheeffortsofobtainingminimalinterdependencebetweenIPcores.WithoutspecialQuality-Of-Service(QoS)support,theperformanceofdatacommunicationmaybecomeunwarrantlyarbitrary.

Toensuretheeffectiveexploitationoftechnologyscaling,intelligentuseoftheavailablechipdesignresourcesisnecessaryatthephysicalaswellasatthelogicaldesignlevel.ThemeanstoachievethisarethroughthedevelopmentofeffectiveandstructureddesignmethodsandESLtools.

Asshown,themajordrivingfactorsforthedevelopmentofglobalcommunicationschemesaretheeverincreasingdensityofon-chipresourcesandthedrivetoutilizetheseresourceswithaminimumofeffortaswellastheneedtocounteractthephysicaleffectsofDSMtechnologies.Thetrendistowardsasubdivisionofprocessingresourcesintomanageablepieces.Thishelpsreducedesigncycletimesincetheentirechipdesignprocesscanbedividedintominimallyinterdependentsubproblems.Thisalsoallowstheuseofmodularverificationmethodologies,thatis,verificationatalowabstractionlevelofcores(andcommunicationnetwork)individuallyandatahighabstractionlevelofthesystemasawhole.Workingatahighabstractionlevelallowsagreatdegreeoffreedomfromlowerlevelissues.Italsotendstowardsadifferentiationoflocalandglobalcommunication.Asintercorecommunicationisbecomingtheperformancebottleneckinmanymulticoreapplications,theshiftindesignfocusisfromatraditionalprocessing-centrictoacommunication-centricone.Onetop-levelaspectofthisinvolvesthepossibilitytosaveonglobalcommunicationresourcesattheapplicationlevelbyintroducingcommunicationawareoptimizationalgorithmsincompilers.System-leveleffectsoftechnologyscalingarefurtherdiscussedinCatthooretal[2004].

Astandardizedglobalcommunicationscheme,togetherwithstandardcommunicationsocketsforIPcores,wouldmakeLegobrick-likeplug-and-playdesignstylespossible,allowinggooduseoftheavailableresourcesandfastproductdesigncycles.[2]

1.2NoCinSoC

Fig.3showssomeexamplesofbasiccommunicationstructuresinasampleSoC,forexample,amobilephone.SincetheintroductionoftheSoCconceptinthe90s,thesolutionsforSoCcommunicationstructureshavegenerallybeencharacterizedbycustomdesignedadhocmixesofbusesandpoint-to-pointlinksbusbuildsonwellunderstoodconceptsandiseasytomodel.Inahighlyinterconnectedmulticoresystem,however,itcanquicklybecomeacommunicationbottleneck.Asmoreunitsareaddedtoit,thepowerusagepercommunicationeventgrowsaswellduetomoreattachedunitsleadingtohighercapacitiveload.Formultimasterbusses,theproblemofarbitrationisalsonottrivial.Table1summarizestheprosandconsofbusesandnetworks.Acrossbarovercomessomeofthelimitationsofthebuses.However,itisnotultimatelyscalableand,assuch,itisanintermediatesolution.Dedicatedpoint-to-pointlinksareoptimalintermsofbandwidthavailability,latency,andpowerusageastheyaredesignedespeciallyforthisgivenpurpose.Also,theyaresimpletodesignandverifyandeasytomodel.Butthenumberoflinksneededincreasesexponentiallyasthenumberofcoresincreases.Thusanareaandpossiblyaroutingproblemdevelops.Fig.3ExamplesofcommunicationstructuresinSystems-on-Chip.(a)traditionalbus-basedcommunication;(b)dedicatedpoint-to-pointlinks;(c)achipareanetworkTable1Bus-versus-NetworkArguments(AdaptedfromGuerrierandGreiner[2000])

Fromthepointofviewofdesign-effort,onemayarguethat,insmallsystemsoflessthan20cores,anadhoccommunicationstructureisviable.But,asthesystemsgrowandthedesigncycletimerequirementsdecrease,theneedformoregeneralizedsolutionsbecomespressing.Formaximumflexibilityandscalability,itisgenerallyacceptedthatamovetowardsashared,segmentedglobalcommunicationstructureisneeded.Thisnotiontranslatesintoadata-routingnetworkconsistingofcommunicationlinksandroutingnodesthatareimplementedonthechip.IncontrasttotraditionalSoCcommunicationmethodsoutlinedpreviously,suchadistributedcommunicationmediascaleswellwithchipsizeandcomplexity.Additionaladvantagesincludeincreasedaggregatedperformancebyexploitingparalleloperation.

Fromatechnologicalperspective,asimilarsolutionisreached:inDSMchips,longwiresmustbesegmentedinordertoavoidsignaldegradation,andbussesareimplementedasmultiplexedstructuresinordertoreducepowerandincreaseresponsiveness.Hierarchicalbusstructuresarealsocommonasameanstoadheretothegivencommunicationrequirements.Thenextnaturalstepistoincreasethroughputbypipeliningthesestructures.Wiresbecomepipelinesandbus-bridgesbecomeroutingnodes.Expandingonastructureusingtheseelements,onegetsasimplenetwork.

AcommonconceptforsegmentedSoCcommunicationstructuresisbasedonnetworks.ThisiswhatisknownasNetwork-on-Chip(NoC).Aspresentedpreviously,thedistinctionbetweendifferentcommunicationsolutionsisfading.NoCisseentobeaunifyingconceptratherthananexplicitnewalternative.Intheresearchcommunity,therearetwowidelyheldperceptionsofNoC:(i)thatNoCisasubsetofSoC,and(ii)thatNoCisanextensionofSoC.Inthefirstview,NoCisdefinedstrictlyasthedata-forwardingcommunicationfabric,thatis,thenetworkandmethodsusedinaccessingthenetwork.Inthesecondview,NoCisdefinedmorebroadlytoalsoencompassissuesdealingwiththeapplication,systemarchitecture,anditsimpactoncommunicationorviceversa.

1.3Outline

ThepurposeofthissurveyistoclarifytheNoCconceptandtomapthescientificeffortsmadeintotheareaofNoCresearch.Wewillidentifygeneraltrendsandexplainarangeofissueswhichareimportantforstate-of-the-artglobalchip-levelcommunication.Indoingso,weprimarilytakethefirstviewofNoC,thatis,thatitisasubsetofSoC,tofocusandstructurethediversediscussion.Fromourperspective,theviewofNoCasanextensionofSoCmuddlesthediscussionwithtopicscommontoanylarge-scaleICdesigneffortsuchaspartitioningandmappingapplication,hardware/

softwarecodesign,compilerchoice,etc.

Therestofthesurveyisorganizedasfollows.InSection2,wewilldiscussthebasicsofNoC.WewillgiveasimpleNoCexample,addresssomerelevantsystem-levelarchitecturalissues,andrelatethebasicbuildingblocksofNoCtoabstractnetworklayersandresearchareas.InSection3,wewillgointomoredetailsofexistingNoCresearch.ThissectionispartitionedaccordingtotheresearchareasdefinedinSection2.InSection4,wediscusshighabstraction-levelissuessuchasdesignspaceexplorationandmodeling.TheseareissuesoftenapplicabletoNoConlyintheviewofitasanextensionofSoC,butwetreatspecificallyissuesofrelevancetoNoC-baseddesignsandnottolargescaleICdesignsingeneral.InSection5,performanceanalysisisaddressed.Section6presentsasetofcasestudiesdescribinganumberofspecificNoCimplementations,andSection7summarizesthesurvey.2NoCBasics

Inthissection,thebasicsofNoCareuncovered.Firstacomponent-basedviewwillbepresented,introducingthebasicbuildingblocksofatypicalNoC.Thenwewilllookatsystem-levelarchitecturalissuesrelevanttoNoC-basedSoCdesigns.Afterthis,alayeredabstraction-basedviewwillbepresented,lookingatnetworkabstractionmodels,inparticular,OSIandtheadaptionofsuchforNoC.Usingthefoundationsestablishedinthissection,wewillgointofurtherdetailsofspecificNoCresearchinSection3.

2.1ASimpleNoCExample

Fig.4showsasampleNoCstructuredasa4-by-4gridwhichprovidesglobalchiplevelcommunication.Insteadofbussesanddedicatedpoint-to-pointlinks,amoregeneralschemeisadapted,employingagridofroutingnodesspreadoutacrossthechip,connectedbycommunicationlinks.Fornow,wewilladaptasimplifiedperspectiveinwhichtheNoCcontainsthefollowingfundamentalcomponents.

—Networkadaptersimplementtheinterfacebywhichcores(IPblocks)connecttotheNoC.Theirfunctionistodecouplecomputation(thecores)fromcommunication(thenetwork).

—Routingnodesroutethedataaccordingtochosenprotocols.Theyimplementtheroutingstrategy.

—Linksconnectthenodes,providingtherawbandwidth.Theymayconsistofoneormorelogicalorphysicalchannels.

Fig.4coversonlythetopologicalaspectsoftheNoC.TheNoCinthefigurecouldthusemploypacketorcircuitswitchingorsomethingentirelydifferentandbeimplementedusingasynchronous,synchronous,orotherlogic.InSection3,wewillgointodetailsofspecificissueswithanimpactonthenetworkperformance.Fig.4Topologicalillustration

ofa4-by-4gridstructuredNoC,indicatingthefundamentalcomponents.

2.2ArchitecturalIssues

Thediversityofcommunicationinthenetworkisaffectedbyarchitecturalissuessuchassystemcompositionandclustering.ThesearegeneralpropertiesofSoCbut,sincetheyhavedirectinfluenceonthedesignofthesystem-levelcommunicationinfrastructure,wefinditworthwhiletogothroughthemhere.

Fig.5illustrateshowsystemcompositioncanbecategorizedalongtheaxesofhomogenity

andgranularity

ofsystemcores.ThefigurealsoclarifiesabasicdifferencebetweenNoCandnetworksformoretraditionalparallelcomputers;thelatterhavegenerallybeenhomogeneousandcoarsegrained,whereasNoC-basedsystemsimplementamuchhigherdegreeofvarietyincompositionandintrafficdiversity.Fig.5Systemcompositioncategorizedalongtheaxesofhomogenityandgranularityofsystemcomponents.

Clustering

dealswiththelocalizationofportionsofthesystem.Suchlocalizationmaybelogicalorphysical.Logicalclusteringcanbeavaluableprogrammingtool.Itcanbesupportedbytheimplementationofhardwareprimitivesinthenetwork,forexample,flexibleaddressingschemesorvirtualconnections.Physicalclustering,basedonpreexistingknowledgeoftrafficpatternsinthesystem,canbeusedtominimizeglobalcommunication,therebyminimizingthetotalcostofcommunicating,powerandperformancewise.

Generallyspeaking,reconfigurability

dealswiththeabilitytoallocateavailableresourcesforspecificpurposes.InrelationtoNoC-basedsystems,reconfigurabilityconcernshowtheNoC,aflexiblecommunicationstructure,canbeusedtomakethesystemreconfigurablefromanapplicationpointofview.Aconfigurationcanbeestablishedforexample,byprogrammingconnectionsintotheNoC.ThisresemblesthereconfigurabilityofanFPGA,thoughNoC-basedreconfigurabilityismostoftenofcoarsergranularity.InNoC,thereconfigurableresourcesaretheroutingnodesandlinksratherthanwires.

Muchresearchworkhasbeendoneonarchitecturally-orientedprojectsinrelationtoNoC-basedsystems.Themainissueinarchitecturaldecisionsisthebalancingofflexibility,performance,andhardwarecostsofthesystemasawhole.Astheunderlyingtechnologyadvances,thetrade-offspectrumiscontinuallyshifted,andtheviabilityoftheNoCconcepthasopeneduptoacommunication-centricsolutionspacewhichiswhatcurrentsystem-levelresearchexplores.

AtonecornerofthearchitecturalspaceoutlinedinFig.5,isthePleiadesarchitecture[Zhangetal.2000]anditsinstantiation,theMaiaprocessor.Amicroprocessoriscombinedwitharelativelyfine-grainedheterogeneouscollectionofALUs,memories,FPGAs,etc.Aninterconnectionnetworkallowsarbitrarycommunicationbetweenmodulesofthesystem.Thenetworkishierarchicalandemploysclusteringinordertoprovidetherequiredcommunicationflexibilitywhilemaintaininggoodenergy-efficiency.

Attheoppositecornerareanumberofworks,implementinghomogeneouscoarsegrainedmultiprocessors.InSmartMemories,ahierarchicalnetworkisusedwithphysicalclusteringoffourprocessors.Theflexibilityofthelocalclusternetworkisusedasameansforreconfigurability,andtheeffectivenessoftheplatformisdemonstratedbymimickingtwomachinesonfarendsofthearchitecturalspectrum,theImaginestreamingprocessorandHydramultiprocessor,withmodestperformancedegradation.TheglobalNoCisnotdescribed,however.IntheRAWarchitecture,ontheotherhand,theNoCwhichinterconnectstheprocessortilesisdescribedindetail.Itconsistsofastaticnetwork,inwhichthecommunicationispreprogrammedcycle-by-cycle,andadynamicnetwork.Thereasonforimplementingtwophysicallyseparatenetworksistoaccommodatedifferenttypesoftrafficingeneralpurposesystems.TheEclipseisanothersimilarlydistributedmultiprocessorarchitecture.

2.3NetworkAbstraction

ThetermNoCisusedinresearchtodayinaverybroadsenserangingfromgatelevelphysicalimplementation,acrosssystemlayoutaspectsandapplications,todesignmethodologiesandtools.Amajorreasonforthewidespreadadaptationofnetworkterminologyliesinthereadilyavailableandwidelyacceptedabstractionmodelsfornetworkedcommunication.TheOSImodeloflayerednetworkcommunicationcaneasilybeadaptedforNoCusageasdoneinBeniniandMicheli[2001]andArteris[2005].Inthefollowing,wewilllookatnetworkabstraction,andmakesomedefinitionstobeusedlaterinthesurvey.

TobetterunderstandtheapproachesofdifferentgroupsinvolvedinNoC,wehavepartitionedthespectrumofNoCresearchintofourareas:1)system,2)networkadapter,3)networkand4)linkresearch.Fig.6showstheflowofdatathroughthenetwork,indicatingtherelationbetweentheseresearchareas,thefundamentalcomponentsofNoC,andtheOSIlayers.Alsoindicatedisthebasicdatagramterminology.Fig.6TheflowofdatafromsourcetosinkthroughtheNoCcomponentswithanindicationofthetypesofdatagramsandresearcharea.

Thesystemencompassesapplications(processes)andarchitecture(coresandnetwork).Atthislevel,mostofthenetworkimplementationdetailsmaystillbehidden.MuchresearchdoneatthislevelisapplicabletolargescaleSoCdesigningeneral.TheNetworkAdapter(NA)decouplesthecoresfromthenetwork.Ithandlestheendto-endflowcontrol,encapsulatingthemessagesortransactionsgeneratedbythecoresfortheroutingstrategyoftheNetwork.Thesearebrokenintopacketswhichcontaininformationabouttheirdestination,orconnection-orientedstreamshichdonot,buthavehadapathsetuppriortotransmission.TheNAisthefirstlevelwhichisnetworkaware.Thenetworkconsistsoftheroutingnodes,links,etc,definingthetopologyandimplementingtheprotocolandthenode-to-nodeflowcontrol.Thelowestlevelisthelinklevel.Atthislevel,thebasicdatagramareflits(flowcontrolunits),nodelevelatomicunitsfromwhichpacketsandstreamsaremadeup.Someresearchersoperatewithyetanothersubdivision,namelyphits(physicalunits),whicharetheminimumsizedatagramthatcanbetransmittedinonelinktransaction.Mostcommonlyflitsandphitsareequivalent,thoughinanetworkemployinghighlyserializedlinks,eachflitcouldbemadeupofasequenceofphits.Link-levelresearchdealsmostlywithencodingandsynchronizationissues.Thepresenteddatagramterminology(Fig.7)seemstoegene