主板時鐘信號量測

1、clock measurement skill date : 2017/07 1. power 2. crystal clock 3. clock，ddr clk，pci clk ， low frequency clock 1 .1 .量測表格量測表格 : : power ckw1 net name vcc3 figure fig specmax:3.465 min:3.135 status status unitv 將將position scale 儘量調(diào)小儘量調(diào)小 將將resolution scale調(diào)整至調(diào)整至200s 開開bandwidth:20mhz 注意調(diào)整注意調(diào)整offset使量

2、測圖形集中於屏幕中間使量測圖形集中於屏幕中間 量測量測max,min,mean值值 position 點(diǎn)儘量調(diào)到整格線點(diǎn)儘量調(diào)到整格線 記得加上記得加上label 跑跑3000筆以上筆以上 1 .1 .量測表格量測表格 : : crystal clock ckc1net name 32khz(y6) figurefig typefreq spec max:32.768655 min:32.767344 status unitkhz measure voltage rise time=，fall time= high time= low time= jitter=，cross voltage=

3、note：(-10ppm) ckc2net name25mhz(y5) figurefig typefreq spec max:25.00075 min:24.99925 status unitmhz measure voltage rise time=，fall time= high time= low time= jitter=，cross voltage= note： 20x32.768/1000000=0.000655 max=32.768+0.000655=32.768655 min=32.7680.000655=32.767344 補(bǔ)充： 1.frequency tolerance

4、 請參照spec或是零件承證書。 2.接上電源處於待機(jī)模式量測。 3.若無法截取頻率 則開機(jī)進(jìn)入bios模式量測（pch、clock gen）或是接上網(wǎng) 路線（lan）。 frequency counter 1 .1 .量測表格量測表格 : : ckh9 net nameck_pbg_clkin itemabcdef figurefigfig fig figfigfig typefreqrise timefall timelow timehigh timejitter spec100 max:4max:4max:5.5max:5.5max:50 min:1min:1min:4.5min:4.5

5、min:-50 status status unitmhzv/nsv/nsnsnsps measure voltage freq= risefall time : high time=cross voltage point；low time= cross voltage point；jitter=high refernece 75% low reference 25%；cross voltage= note：duty cycle: 45%55% jitter:ics9fg1200-5 spec 參照方式以終端為主，發(fā)送端為副 如果終端找不到spec則往前一階找 clk genpchsio(si

6、o spec) 如果sio找不到則找pch，如果pch找不到才找clk gen. r164 for alc655 only ck_pe_100m_1port16 ck_pe_100m_1port#16 r19933r0402 r20033r0402 ck_pe_100m_1port ck_pe_100m_1port#ck_pe_src3# leo_pclkpciclk7 leo_pclk24 vccp ck_h_cpu#5 ck_h_mch9 ck_h_mch#9 ck_h_cpu5 ck_pe_100m_ich#19 ck_pe_100m_16port16 ck_ichsata20 ck_i

7、chsata#20 ck_pe_100m_ich19 ck_pe_100m_mch#11 ck_pe_100m_mch11 ck_pe_100m_16port#16 pci_clk222 sio_pclk26 ich_pclk19 glan_pclk23 pci_clk122 pci_clk022 ck_96m_dref11 ck_96m_dref#11 ck_48m_usb_ich20 sio_48mclk26 ck_25m_lan23 ac97_clk25 fwh_pclk24 ck_14m_ich20 r164ac_22r0402-1 r162_33r0402-2 r239x_220r

8、r19433r0402 r19333r0402 r16933r0402 r16833r0402 r16733r0402 r16633r0402 r192ig_33r0402 r191ig_33r0402 r17233r0402 r17133r0402 r19733r0402 r196ig_33r0402 r19833r0402 r195ig_33r0402 y1 _14.318mhz16p_d r170475r1%0402 rn31 8p4r-33r0402 12 34 56 78 rn308p4r-33r0402 12 34 56 78 c12p50nc164 c12p50nc156 r16

9、5_22r0402-1 r218_22r0402-1 r217_22r0402-1 u9 _ pci_gnd 3 pci_vdd 4 pci_gnd 9 pci_vdd 62 vtt_pwrgd/pd# 15 pciexc0 18 48_gnd 10 48_vdd 12 dot96 13 pciex_vdd 23 pciext0 17 cpu_gnd 49 cpuclkc1# 50 cpuclkt1 51 cpu_vdd 52 cpuclkc0# 53 cpuclkt0 54 pciexc6 33 pciext6 34 pciclk0 63 pciclk1 64 pciclk2 1 pcicl

10、k3 2 pciclk4 5 pciex_gnd 24 pciex_gnd 31 fsla/usb_48m 11 ref_vdd 57 ref_gnd 60 x1 59 x2 58 sdata 55 sclk 56 iref 48 pciex_vdd 32 pciext1 19 pciexc1 20 pciext2 21 pciexc2 22 pciext3 25 pciexc3 26 pciext4 27 pciexc4 28 pciext5 29 pciexc5 30 doc_0* 37 doc_1* 16 fslc/ref0 61 dot96# 14 pciext7 36 pciexc7

11、 35 fsd/pciclk5 6 fslb/pciclk6 7 reset#/pciclk7 8 vdda 46 gnda 47 25m_vdd 38 25m_gnd 41 25mhz_1 40 25mhz_0 39 sataclkt 44 sataclkc 43 vddsata 45 gndsata 42 ck_25m_lan pciclk2 pciclk0 pll_xi pll_xo ck_25m fsd ck_sata ck_sata# fsb ck_pe_src3 ck_pe_src2# ck_pe_src1 iref ck_vid_gd# fwhpclk ck_h_mch#mchc

12、lk# mchclk ck_h_cpu# ck_h_cpucpuclk cpuclk# ac97_clk ck_pe_100m_ich# ck_pe_100m_mch# ck_pe_src0# ck_pe_src0 ck_pe_100m_mch ck_pe_100m_16port# ck_pe_100m_16port ck_h_mch ck_96m_dref ck_96m_dref# ck_dot96 ck_ichsata ck_ichsata# ck_pe_src2ck_pe_100m_ich ck_pe_src1# ich_pclk glan_pclk pci_clk2 pci_clk0

13、pci_clk1pciclk1 glanpclk ck_dot96# sio_pclk fwh_pclk pll_xo ck_14m_ich ck_48m_usb_ich pll_xi fsc fsa sio_48mclk trace length less than 0.5inchs clock generator - ics954519 r195,r196, r191, r192 for 945g only high frequency differential clock low frequency- single clock ckh9 net nameck_pbg_clkin item

14、abcdef figurefigfig fig figfigfig typefreqrise timefall timelow timehigh timejitter spec100 max:4max:4max:5.5max:5.5max:50 min:1min:1min:4.5min:4.5min:-50 status status unitmhzv/nsv/nsnsnsps measure voltage freq= risefall time : high time=cross voltage point；low time= cross voltage point；jitter=high

15、 refernece 75% low reference 25%；cross voltage= note：duty cycle: 45%55% jitter:ics9fg1200-5 取最小取最小值值、最大值、最大值 累積500筆資料) 設(shè)要量測的設(shè)要量測的channel 1.jitter：有些是示波器是有些是示波器是 filesrun applicationjitter analysis3 數(shù)值調(diào)整到數(shù)值調(diào)整到2525左右左右 調(diào)整完後執(zhí)行調(diào)整完後執(zhí)行 量測量測jitter時要記得關(guān)掉累積時要記得關(guān)掉累積, 且要跑且要跑1000筆以筆以 上上 1 .1 .量測表格量測表格 : : 1.spe

16、c:jedec standard 2.量測點(diǎn)在ram上 address data vref clock cross voltage cross voltage 設(shè)要量測的設(shè)要量測的channel 1.jitter：有些是示波器是有些是示波器是 filesrun applicationjitter analysis3 cross voltage 量測crossvoltage時要記得關(guān)掉累積, 且要跑200 筆以上 調(diào)整調(diào)整resolution resolution 至最精密至最精密 調(diào)整完後執(zhí)行調(diào)整完後執(zhí)行 讓波形彼此互相交叉3個點(diǎn) pci clk 1.量測表格量測表格: pci clk pci clk 將橫向的將橫向的scale調(diào)整到只有一個完整的調(diào)整到只有一個完整的rise edge b.量測量測rising time 依依spec設(shè)定設(shè)定 rise time=0.66v-1.98v，fall time=0.66v-1.98v pci spec-max:4 v/ns;min:1 v/ns (1.98-0.66)/t=4,t=0.33ns,(1.98-0.66)