大學(xué)生電子競賽電源類題目包13芯片參考csd18532kcs

1、Product FolderTools & SoftwareSample & BuyTechnical DocumentsSupport & CommuCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 2014CSD18532KCS 60V N 通道 NexFET 功率金屬氧化物半導(dǎo)體場效應(yīng)晶體管 (MOSFET)1特性超低 Q 和 Q概要ggd低熱阻雪崩額定值邏輯電平無鉛端子鍍層 符合 RoHS 標(biāo)準(zhǔn)無鹵素晶體管 (TO)-220封裝訂購信息(1)2應(yīng)用范圍直流 - 直流轉(zhuǎn)換次級側(cè)同步整流器電機(jī)(1)要了解所有可用封裝，請見數(shù)據(jù)

2、表末尾的可訂購附錄。最大絕對額定值3說明這款 60V，3.3m，TO-220 NexFET 功率MOSFET 被設(shè)計(jì)成在功率轉(zhuǎn)換應(yīng)用中最大限度地降低功率損耗。Drain (Pin 2)Gate (Pin 1)(1)脈沖持續(xù)時間 300s，占空比 2%Source (Pin 3)RDS(on) 與 VGS 間的關(guān)系柵極電荷1210108866442200024681012141618200510152025303540Qg - Gate Charge (nC)4550G001VGS - Gate-to- Source Voltage (V)G001PRODUCTION DATA informat

3、ion is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.English Data Sheet: SLPS361RDS(on) -(mOnW-State)VGS - Gate-to-Source Voltage (V)ID = 100A V

4、DS = 30VTC = 25°C Id = 100A TC = 125ºC Id = 100ATA = 25°C值VDS漏源電壓60VVGS柵源電壓±20VID持續(xù)漏極電流（受封裝限制），TC = 25°C時測得100A持續(xù)漏極電流（受限制），TC = 25°C時測得169持續(xù)漏極電流（受限制），TC=100°C 時測得116IDM脈沖漏極電流 (1)400APD功率耗散250WTJ， Tstg運(yùn)行結(jié)溫和 儲存溫度范圍-55 至 175°CEAS雪崩能量，單一脈沖ID = 75A，L = 0.1mH，RG = 2

5、5281mJ器件封裝介質(zhì)數(shù)量出貨CSD18532KCSTO-220封裝管50管TA = 25°C典型值VDS漏源電壓60VQg柵極電荷總量 (10V)44nCQgd柵漏柵極電荷6.9nCRDS(on)漏源導(dǎo)通電阻VGS = 4.5V4.2mVGS = 10V3.3mVGS(th)閥值電壓1.8VCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 2014目錄12345特性1應(yīng)用范圍1說明1修訂歷史2Specifications35.1 Electrical Characteristics35.2 Thermal Information35.3 T

6、ypical MOSFET Characteristics4器件和文檔支持766.16.26.3商標(biāo)7靜電放告7術(shù)語表77機(jī)械數(shù)據(jù)87.1 KCS 封裝. 84修訂歷史NOTE: Page numbers for previous revisions may differ from page numbers in the current version.Changes from Revision A (October 2012) to Revision BPage將 TC = 100°C 時的 ID 增加至 116A1將最大工作結(jié)溫和溫度增加至 175°C1Updated

7、Figure 1 from a normalized RJA to an RJC curve4Updated Figure 6 to extend to 175°C5Updated Figure 8 to extend to 175°C5Updated the SOA in Figure 106Updated Figure 12 to extend to 175°C6Changes from Original (August 2012) to Revision APage將 IDM 增加至 400A1Changed the Transconductance TYP

8、 value From: 146 S To: 187 S3Changed RJA From: MAX = 62°C/W To: MAX = 65°C/W3Changed Figure 242© 20122014, Texas Instruments IncorporatedCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 20145 Specifications5.1 Electrical Characteristics(TA = 25°C unless otherwise stated)5.2 Thermal I

9、nformation(TA = 25°C unless otherwise stated)3Copyright © 20122014, Texas Instruments IncorporatedTHERMAL METRICMINTYPMAXUNITRJCJunction-to-Case Thermal0.6°C/WRJAJunction-to-Ambient Thermal62PARAMETERTEST CONDITIONSMINTYPMAXUNITSTATIC CHARACTERISTICSBVDSSDrain-to-Source VoltageVGS = 0

10、 V, ID = 250 A60VIDSSDrain-to-Source Leakage CurrentVGS = 0 V, VDS = 48 V1AIGSSGate-to-Source Leakage CurrentVDS = 0 V, VGS = 20 V100nAVGS(th)Gate-to-Source Threshold VoltageVDS = VGS, ID = 250 A1.51.82.2VRDS(on)Drain-to-Source OnVGS = 4.5 V, ID = 100 A4.25.3mVGS = 10 V, ID = 100 A3.34.2mgsTranscond

11、uctanceVDS = 30 V, ID = 100 A187SDYNAMIC CHARACTERISTICSCissInput CapacitanceVGS = 0 V, VDS = 30 V, = 1 MHz39004680pFCossOutput Capacitance470564pFCrssReverse Transfer Capacitance1114pFRGSeries Gate1.32.6QgGate Charge Total (4.5 V)VDS = 30 V, ID = 100 A2125nCQgGate Charge Total (10 V)4453nCQgdGate C

12、harge Gate-to-Drain6.9nCQgsGate Charge Gate-to-Source10nCQg(th)Gate Charge at Vth7.3nCQossOutput ChargeVDS = 30 V, VGS = 0 V52nCtd(on)Turn On Delay TimeVDS = 30 V, VGS = 10 V, IDS = 100 A, RG = 0 7.8nstrRise Time5.3nstd(off)Turn Off Delay Time24.2nstFall Time5.6nsDIODE CHARACTERISTICSVSDDiode Forwar

13、d VoltageISD = 100 A, VGS = 0 V0.81VQrrReverse Recovery ChargeVDS= 30 V, IF = 100 A,di/dt = 300 A/s127nCtrrReverse Recovery Time57nsCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 20145.3 Typical MOSFET Characteristics(TA = 25°C unless otherwise stated)4Copyright © 20122014, Texas Instruments

14、 IncorporatedIDS - Drain-to-Source Current (A)IDS - Drain-to-Source Current (A)120100806040200.511.5VDS - Drain-to-Source Voltage (V)G001Figure 2. Saturation Characteristics1401201008060402002345VGS - Gate-to-Source Voltage (V)G001Figure 3. Transfer CharacteristicsVDS = 5VTC = 125°C TC = 25

15、6;C TC = 55°CVGS =10V VGS =6.5V VGS =4.5VFigure 1. Transient Thermal ImpedanceCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 2014Typical MOSFET Characteristics (continued)(TA = 25°C unless otherwise stated)1050000100008610004100201005101520253035404550G0010102030405060G001Qg - Gate Charge (n

16、C)VDS - Drain-to-Source Voltage (V)Figure 4. Gate ChargeFigure 5. Capacitance2.42.221.81.61.41.210.812ID = 250uA1086420.6075 50 25 025 50 75 100 125TC - Case Temperature (ºC)150 175200G00102468101214161820G001VGS - Gate-to- Source Voltage (V)Figure 6. Threshold Voltage vs TemperatureFigure 7. O

17、n-Statevs Gate-to-Source Voltage2.42.221.81.61.41.210.80.6100VGS = 4.5V VGS = 10VTC = 25°CTC = 125°C1010.10.010.001ID = 100A0.40.000175 50 25 025 50 75 100 125TC - Case Temperature (ºC)150175200G00100.20.40.60.81G001VSD Source-to-Drain Voltage (V)Figure 8. Normalized On-Statevs Temper

18、atureFigure 9. Typical Diode Forward Voltage5Copyright © 20122014, Texas Instruments IncorporatedNormalized On-StateVGS(th) - Threshold Voltage (V)VGS - Gate-to-Source Voltage (V)ISD Source-to-Drain Current (A)RDS(on) -(mOnW-State)C Capacitance (pF)TC = 25°C Id = 100A TC = 125ºC Id =

19、100ACiss = Cgd + Cgs Coss = Cds + Cgd Crss = CgdID = 100A VDS = 30VCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 2014Typical MOSFET Characteristics (continued)(TA = 25°C unless otherwise stated)6© 20122014, Texas Instruments IncorporatedIDS - Drain-to-Source Current (A)IDS - Drain- to- Sour

20、ce Current (A)IAV - Peak Avalanche Current (A)500010001001010.10.1110100VDS - Drain-to-Source Voltage (V)G001Figure 10.um Safe Operating Area100100.010.11TAV - Time in Avalanche (mS)G001Figure 11. Single Pulse Unclamped Inductive Switching12010080604020050 250255075 100 125 150 175 200TC - Case Temp

21、erature (ºC)G001Figure 12.um Drain Current vs TemperatureTC = 25ºC TC = 125ºC10us1msDC100us10msSingle PulseMax RthetaJC = 0.6ºC/WCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 20146 器件和文檔支持6.1 商標(biāo)NexFET is a trademark of Texas Instruments.6.2 靜電放告這些裝置包含有限的內(nèi)置 ESD 保護(hù)。傷。導(dǎo)線一起截短或?qū)⒀b置放置于導(dǎo)電

22、泡棉中，以防止 MOS 門極或裝卸時，靜電損6.3 術(shù)語表SLYZ022 TI 術(shù)語表。這份術(shù)語表列出并解釋術(shù)語、首字母縮略詞和定義。7© 20122014, Texas Instruments IncorporatedCSD18532KCSZHCSA49B AUGUST 2012 REVISED JULY 20147機(jī)械數(shù)據(jù)以下頁中包括機(jī)械封裝和可訂購信息。 這些信息是指定器件可提供的最新數(shù)據(jù)。 這些數(shù)據(jù)會在無通知且不對本文檔進(jìn)行修訂的情況下發(fā)生改變。 欲獲得該數(shù)據(jù)表的瀏覽器版本，請查閱左側(cè)的導(dǎo)航欄。7.1KCS 封裝注釋：1.2.3.4.5.6.7.8.所有線性的均為英寸。本圖紙

23、變更，恕不通知。引腳在“C”區(qū)域內(nèi)不受.浸焊之前所有引腳均適用。中心引腳與零配件之間采用電氣接觸?！癋”處的斜面是可選的“G”處的散熱焊盤外形可采用這些“H”符合 JEDEC TO-220 變體 AB 標(biāo)準(zhǔn)（最小引腳厚度、最短外露焊盤長度和最大主體長度除外）。引腳配置8© 20122014, Texas Instruments Incorporated位置名稱引腳 1柵極引腳 2 /漏引腳 3源重要德州儀器(TI) 及其下屬子公司根據(jù) JESD46 最新標(biāo)準(zhǔn), 對所提供的和服務(wù)進(jìn)行更正、修改、增強(qiáng)、改進(jìn)或其它更改， 并根據(jù)JESD48 最新標(biāo)準(zhǔn)中止提供任何和服務(wù)?？蛻粼谙掠唵吻皯?yīng)獲取

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28、應(yīng)用數(shù)字音頻放大器和線性器件數(shù)據(jù)轉(zhuǎn)換器 DLP®DSP - 數(shù)字信號處理器時鐘和計(jì)時器接口邏輯電源管理通信與電信 計(jì)算機(jī)及周邊消費(fèi)電子能源工業(yè)應(yīng)用醫(yī)療電子安防應(yīng)用和影像微器 (MCU)RFID 系統(tǒng)OMAP應(yīng)用處理器無線連通性德州儀器技術(shù)支持社區(qū)郵寄地址： 上海市浦東新區(qū)世紀(jì)大道1568 號，中建32 樓： 200122Copyright © 2015, 德州儀器半導(dǎo)體技術(shù)（上海）PACKAGE OPTION ADDENDUM30-Apr-2016PACKAGING INFORMATION(1) The marketing status values are defined

29、 as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this par

30、t in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br)

31、- please check information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.for the latest availabilityPb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS r

32、equirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exe

33、mption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mea

34、n Pb-Free (RoHS compat ble), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperat

35、ure.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "" will appear on a d

36、evice. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Fi

37、nish values may wrap to two lines if the finishvalue exceeds theum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third p

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40、 total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.Addendum-Page 1Orderable DeviceStatus(1)Package TypePackage DrawingPinsPackage QtyEco Plan(2)Lead/Ball Finish(6)MSL Peak Temp(3)Op Temp (°C)Device Marking(4/5)SamplesCSD18532KCSACTIVETO-2

41、20KCS350Pb-Free (RoHS)CU SNN / A for Pkg Type-55 to 150CSD18532KCSPACKAGE OPTION ADDENDUM30-Apr-2016Addendum-Page 2PACKAGE OUTLINETO-220 - 19.65 mm max heightKCS0003BTO-220NOTES:1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets o

42、r parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.2. This drawing is subject to change without notice.3. Reference JEDEC registration TO-220.4.74.410.362.91.328.55 9.962.61.228.156.5(6.3)6.1( 3.84)12.512.19.2519.65 MAX9.053X3.9 MAX13.1212.70133X 0.900.47 0.770.342X2.

43、792.593X 1.36 1.234222214/A 10/20155.082.54EXAMPLLAYOUTKCS0003BTO-220 - 19.65 mm max heightTO-2200.07 MAX2X (1.7)ALL AROUND3X (1.2)M2X SOLDER MASK OPENING(1.7)1230.07 MAXR (0.05)(2.54)ALL AROUNDSOLDER MASK(5.08)OPENINGLAND PATTERN EXAMPLENON-SOLDER MASK DEFINED SCALE:15X4222214/A 10/2015重要德州儀器(TI) 及其下屬子公司根據(jù) JESD46 最新標(biāo)準(zhǔn), 對所提供的和服務(wù)進(jìn)行更正、修改、增強(qiáng)、改進(jìn)或其它更改， 并根據(jù)JESD48 最新標(biāo)準(zhǔn)中止提供任何和服務(wù)?？蛻粼谙掠唵吻皯?yīng)獲取最新的相關(guān)信息, 并驗(yàn)證這些信息是否