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1、信息工程專業(yè)英語題目:未來寬帶網(wǎng)絡的高性能住宅網(wǎng)關學院:信息工程班級:信工131(通信)姓名:鄭浩學號:20131524109指導老師:張樹靜時間:2016-06-29High Performance Residential Gateway for Future Broadband NetworkAbstract-with development of broadband network and rich-content services from Internet, a high performance residential gateway is required in home netw

2、ork. In the paper, a residential gateway (RG) is presented based on multi-core network processor and media processor. The expansibility of RG hardware is described through hardware architecture. And it outlines the architecture of RG software, which supports multi-core and multi-processor hardware.

3、In QoS of RG , queue control and session handoff are considered. The RG will support future broadband network.Keywords-Home Network; Residential Gateway(RG); Quality of Service(QoS); Information Service; Multi-core ProcessorI. INTRODUCTIONAs development of broadband network and rich-content services

4、 from Internet, a high performance residential gateway is required in home network. Now, most of Internet conceptions focus on speedy network, colorful services, high performance and low cost. Many services, such as online game, Internet-TV, VoIP and VoD (Video on Demand), require network from real-

5、time, fitter and package loss rate. A high performance residential gateway is required in home network. Comparing with other equipments of network, generally, Residential Gateway (RG) is an embedded system and has a lower hardware level. So RG becomes an important footing of multi-services network,

6、such as telecommunication networks, TV networks and computer networks (Internet). And thin terminal impression of RG will being changed.For high performance convergence networks, RG must be available, secure, manageable and accountable. Achieve these objectives, a residential gateway (RG) is present

7、ed based on multi-core network processor and media processor in the pape, including application scenario in section II, hardware architecture in section III, software architecture in section IV and QoS thinking in section V .II. APPLICATION SCENARIOThe application scenario of RG is shown in Figure 1

8、. RG is a gateway between home network and extenal network, such as telecommunication networks, TV networks and computer networks (Internet). Though RG, wire network and wireless network is built in home network, i.e. 802.11a/b/g wireless network and 10/100/1000Base LAN. Many home facilities, such a

9、s IP STB, computer, and laptop, can connect to the LAN through wireless or wire mode. Furthermore, multi-interfaces supports automation equipment , store device, digital camera, TV and telephone.Based on the scenario, RG need support services from telecommunication networks, TV networks and computer

10、 networks (Internet), which requires many interface modes and processing capabilities. In interface modes, it should have optical fiber, coaxial cable, telephone line and so on. In processing capabilities, it should have functions of protocol adaptation, data encapsulation and data Syntax.On other h

11、and, adapting to requirement of commercial network, RG support many key items: Security Scheme, QoS Requirement, Manageable and Accountable Scheme.Firewall based NAT technology is an important guard. Many classes of service traffic, WWW, VoIP, Video and FTP etc., converge on RG . RG must process or

12、forward them. Considering CPUs process capability and hardware resource, such CPU mips, memory capability and forward efficiency and so on. QoS control may be hard and ingenious. QoS scheme must be simply and availably implemented. A simple DiffServ1 algorithm is placed on RG .At the management resp

13、ect, RG has local or remote management functions through Web and telenet. Many functions and options are configured by them. And service provider easily carries through software updates and new services deployment. RG have a maturity database for detail tolling entries.III. HARDWARE ARCHITECTURERG m

14、ainly consists of four modules or parts, which are NPP (Network Processing Part), Media Process Part (MPP), NAM( Network Access Module) and NPM(Normal Periphery Module). Figure 2 shows the hardware architecture of RG.RG has two main parts: NPP is mainly based on multi- core processor and MPP is main

15、ly based on media processor. Main chip of NPP is CN3860 coming from Cavium corporation. CN3860 is Multi-core MIPS64 processors, which targets intelligent, multi-gigabit networking, control plane, storage, and wireless applications in next-generation equipment. The family includes fifteen software-co

16、mpatible processors, with four to sixteen cnMIPS64 cores on a single chip that integrate next-generation networking I/Os along with the most advanced security and application hardware acceleration2.Main chip of NPP is SMP8670 coming from Sigma Designs corporation. The SMP8670 provides a highly-integ

17、rated and high-performance solution for media processing. The Secure Media Processor architecture offers advanced content protection, supporting a wide variety of Digital Rights Management (DRM) and Conditional Access (CA) solutions3. NAM supports interfaces of fiber, coaxial cable, telephone line.

18、NPM supports interfaces of SATA, DART, USB, DDR Memory and Flash Memory.IV. SOFTWARE ARCHITECTURERG has five modules: RTOS(Real Time Operating System )module, Network Module, BSP(Board Support Package) Driver module, MPEG Decode and VoIP module. Figure 3 shows the software architecture of RG .RTOS m

19、odule has topmost control power of system resources, including hardware and software. System tasks control show RTOS power. Bus control, Memory control, TCP/IP stack, multi-services schedule is implemented on the module. Other modules communicate with the module through the event scheme.BSP Driver M

20、odule provide an interface to hardware components of NAM and NPM, i.e. Cable Tuner, Switch ,ADSL2+ PHY and other chips driver. The drivers allow the upper RTOS or applications to control hardware components.Network module contains WAN Control, LAN Control and 802.11b Control. The WAN interface ADSL2

21、+ and Ethernet. But the system mainly uses ADSL2+ as Internet access mode. LAN Control is wire VLAN (Virtual Lan) management. 802.11b Control implements wirelessLAN management and WEP.MPEG Decode Module supports MPEG 1/2/4 Decode, mainly including Interface Driver and A/V Manager. A/V Manager fulfil

22、ls MPEG Decode, containing data buffer and traffic control schemes to assure QoS. Interface Driver are for IDE and USB, which supply media recording and favorite information store.VoIP Module contains Phone Interface, Signaling Control and Voice Data Control. Phone Interface provides software compo-

23、 nents that handle interface between user and ADSL2+ PHY. It implements Hook Off/On signaling handle, Tone On/Off, DTMF digits send-out and voice compression/decompression configure. The protocols, such as H.323, SIP and MGCP/H.248, are completely set on the system. Voice Stream Control mainly conta

24、ins voice compression/decompression data buffer management and voice stream control through RTP and RTCP.Application Module is composed of Firewall, SNMP, QoS Manager and TFTP. Firewall with NAT provide the system security. SNMP gives a management function for MIBs(Management Information Bases). TFT

25、P (Trivial File Transport Protocol) client is used to download upgrade or update files.CN3860 is based on multi-core and collaborative work and shared memory management, drivers, as shown in Figure 4. Discussed in more detail below shared memory management, registration and multi-function table func

26、tion- calls between the CPU and other modules to achieve.Multi-core shared memory board, although some memory is used exclusively by a single CPU; virtually all of the available memory is shared memory, as shown below:(1) Some memory is given the exclusive use of CPU, which stores appropriate operat

27、ing system and procedures;(2) Some memory is shared memory, to facilitate communication between CPU and provide data pipe and up the function table.And Multi-core system efficiency is closely related to the latter. The following paper discusses the main focus on the latter.Multi-core shared memory i

28、s used by the public storage. In start-up phase, it is initialized 飾 the CPUO. Through the submission of memory identity and size, any CPU applies for shared memory. Additional CPU can use the same memory area using identity. Probably all the CPU may also use the same memory, so both read and write

29、are protected by hardware signals to avoid multi-core simultaneous access to shared memory. In addition, based on the shared memory of data path, the CPU can save memory and reduce memory copy, which effectively improves the efficiency of embedded systems.Shared memory up function table is for remot

30、e calls between multiple cores to provide client/server (C/S: Client /Server) call model. C/S mode realization described as follows: CPUj with realization and implementation of the function is a server, whose CPU-ID and the specific function are registered the registration function and function poin

31、ter entry in the table. CPUi which calls the function is a client, through the registration function table to call function. Client applications can be retrieved by the function name to achieve the CPU ID function and its implementation functions. With CPUj data pipeline, parameters can been passed

32、to CPUj.If the called function has the results back to the CPUi, they can be passed back using CPUi data pipeline. Functions registered on the server has an indirect blocking mode and indirect non-blocking mode. In the indirect blocking mode, the client need to get return values from the server, tha

33、t is, the caller must wait until the process is finished. Before performing this function, the caller is blocked. The configuration function with the return value is called as indirect block function. In indirect non-blocking mode, client calls the server, which does not need to obtain the return va

34、lue.CPUO is registered in the function table Demo()function, so CPUO a server, Multi-core provides the printf()service. Allocated from the function table Demo() , CPU 1 indirectly called Demo()function, which as a client.When the server performs the function, if the function call on CPUO function mo

35、dules, such as printf()function, the corresponding characters will be displayed on the console output, called an indirect non-blocking calls. If you need to perform a function with return value, CPU 1 Data access will be through the return value to return, and CPU1 need to wait for the return value,

36、 called the indirect blocking call.Multi-core communication signals between the memory sharing mechanism is an important foundation for achieving the main way to achieve this through an interrupt mechanism to ensure real-time information and data exchange requirements, which is referred to as the pr

37、ocessor to the processor interrupt (PTP: Processor-to -Processor) interrupt. PTP CPU interrupt occurs between the source and target CPU, in which the purpose are:(1) The source and target CPUs, can use the CPU data path (shared memory) to exchange data, reducing memory copies and improving the effic

38、iency of the system, especiallythe large quantities of network data, such as the exchange between CPUO and CPU1 Network packets, CPU2 and CPU1 exchange between the real-time voice data.(2) to achieve that the target CPU executes the function which the source CPU calls, which achieves parallel proces

39、sing system CPU, which greatly improves system efficiency.V. QOS THINKINGQoS thinking should be systemic and detailed. From protocol layers, QoS control focuses on the IP layer, which does justice to TCP and UDP data. For the stream QoS trait, QoS thinking brandwith, fitter, data duration, data quan

40、tity ,delay, client sensitivity of QoS, etc. Simple WFQ56(Weight Fair Queueing) algorithm is implemented on the system, including two stages. First stage, multi-services start-up, the service priority (weight) is fixed. The Order of priority is V oice data, A/V data and other data service from highe

41、r to lower level. Second stage, multi- services full-work, the service priority (weight) is self- adaptive, thinking over occupancy buffer quantity, real-time trait, burst data quantity and burst period. Through NS2 simulation, the system shows preferable QoS property.Session handoff control module

42、including information collector, arbiter, session trigger and handoff task manager, as shown in Figure 5.Information collector is responsible for sharing information collection, which polls session handoff-related information, such information includes network information, user information and senso

43、r information. RG and WLAN network information is the connection between the state, performance and the current session of the network connection, such as WLAN or GPRS. User information is user set handoff threshold, the priority of access networks and so on. Sensor information is the use of positio

44、n sensor information as a condition of the trigger switch (extended support).The arbiter is responsible for the information providing under the Information collector, 可編輯 word 文檔weigh the user settings, network performance and service quality, the formation of arbitration whether to switch, switch m

45、ode (handoff is GPRS or WLAN to GPRS to WLAN handoff).Trigger responsible for the arbitration session, the result of the formation of the instruction sessions, instructions to handoff UA(User Agent) moves into the switching process. Handoff Task Manager - Control Module as the core handoff control t

46、o ensure the information collector, arbiter and session trigger work together.VI. CONCLUSIONThe paper presents the design and analysis of Residential Gateway. It supplies a total solution to the digital home network. For detail security, management and QoS thinking, RG can be adapted Future Broadban

47、d Network.REFERENCES1IETF working grouponDifferentiateService.http:/www.iet#org/html.charters/diffserv-charter.html2Cavium Network OCTEON CN38XX Hardware Reference Manual,http: CN38XX CN36XX.ht ml3SigmaDesignsSMP8670Datasheet, _processor_overview.php4A.K. Parekh and R.G . Gallager. A gene-ralized pr

48、ocessor sharing approach to flow control in integrated services networks: The multiple node case. IEEE/ACM Transactions on the Networking, Vo1.2,No.2,pp:137150, Apr.19945Barry Luong, Evaluation Modeling In Performance and Resource Allocation for Restidential Broadband Gatways,Califomia State Univers

49、ity,Long Beach,2003可編輯 word 文檔未來寬帶網(wǎng)絡的高性能住宅網(wǎng)關摘要: 隨著寬帶網(wǎng)絡的發(fā)展和互聯(lián)網(wǎng)上豐富的內(nèi)容服務,家庭網(wǎng)絡需要一個高性能的住宅網(wǎng)關。在本文中,住宅網(wǎng)關(RG是基于多核網(wǎng)絡處理器和媒體處理器介紹。RG 硬件的可擴展性是通過硬件體系結構描述。它概述了該軟件的體系結構,它支持多核多處理器硬件。在 QoS的RG考慮隊列控制和會話切換。 RGa支持未來的寬帶網(wǎng)絡。關鍵詞家庭網(wǎng)絡;住宅網(wǎng)關(RG) ;服務質量(QoS) ;信息服務;多核心處理器一、引言隨著寬帶網(wǎng)絡的發(fā)展和互聯(lián)網(wǎng)上豐富的內(nèi)容服務,家庭網(wǎng)絡需要一個高性能的住宅網(wǎng)關。現(xiàn)在,大多數(shù)互聯(lián)網(wǎng)概念專注于快速的網(wǎng)

50、絡,豐富多彩的服務,高性能和低成本。許多服務,如在線游戲、網(wǎng)絡電視、VOIP和VOD(視頻點播),要求網(wǎng)絡的實時、鉗工和包丟失率。家庭網(wǎng)絡中需要一個高性能的住宅網(wǎng)關。與網(wǎng)絡中的其他設備,一般來說,住宅網(wǎng)關(RG是一個嵌入式系統(tǒng)具有較低的硬 件水平。所以RG成為多服務網(wǎng)絡的重要基礎,如電信網(wǎng)、電視網(wǎng)和計算機網(wǎng)(互 聯(lián)網(wǎng))。和RG瘦終端的印象將被改變。對于高性能的融合網(wǎng)絡,RG必須是有效的,安全的,可管理的和負責任的。實現(xiàn)這些目標,住宅網(wǎng)關 ( RG) 是基于本文提出的多核網(wǎng)絡處理器和媒體處理器,包括在第二節(jié)中的應用場景,在第三部分的硬件結構、軟件體系結構、QoSffi第四節(jié)的思考。二、 應用場景

51、RG的應用場景如圖1所示。RG是家庭網(wǎng)絡和外部網(wǎng)絡之間的網(wǎng)關,如電信 網(wǎng)、電視網(wǎng)和計算機網(wǎng)(互聯(lián)網(wǎng))。雖然RG有線網(wǎng)絡和無線網(wǎng)絡是建立在家庭 網(wǎng)絡,即802.11a/b/g無線網(wǎng)絡和10 / 100 / 1000base局域網(wǎng)。許多家庭設施, 如 IP 機頂盒、電腦和筆記本電腦,可以連接到局域網(wǎng),通過無線或有線方式。此外,多接口支持自動化設備,存儲設備,數(shù)碼相機,電視和電話。基于情景,RG需要支持服務的電信網(wǎng)、電視網(wǎng)和計算機網(wǎng)(互聯(lián)網(wǎng)),這需 要很多的接口方式和處理能力。在接口模式中,應具有光纖、同軸電纜、電話線等。在處理能力方面,它應該具有協(xié)議適應、數(shù)據(jù)封裝和數(shù)據(jù)語法的功能。另一方面,適應商

52、業(yè)網(wǎng)絡要求,R持許多關鍵項目:安全方案,Qo皺求, 管理和負責的方案?;贜A儂術的防火墻是一個重要的彳護。許多類業(yè)務服務、WWWVoIP、視頻、FTP等,聚集在RG RG必須處理或轉發(fā)??紤]到 CPUt理能力和硬件資 源,如CPU的MIPS,記憶能力和推進效率等。服務質量控制可能是硬而巧妙的。 服務質量方案必須簡單有效地實現(xiàn)。一個簡單的區(qū)分【1】算法放在RG。Figured ktr AppJiiraLion Stenirio在管理方面,RG的本地或遠程通過Web和遠程管理功能。許多功能和選項是由他們配置的。和服務提供商很容易進行軟件更新和新的服務部署。RG有詳細收費項目成熟的數(shù)據(jù)庫。三、硬件

53、架構Mclwork DataMtdia DutaProc-cssuTProcessorMLiJri-neL.v-orkM uJtnjqLLiptunentR(j Hardwitrc ArchitectureRG主要分為四大模塊或部件,這是NPP(網(wǎng)絡處理部分),媒體處理部分(MPP、越南(網(wǎng)絡接入模塊)和 NPM(正常的外圍模塊)。圖2顯示了 RG的硬 件體系結構。RGW兩個主要部分:NPPi要是基于多核處理器和MP鼠要是基于媒體處理 器。核電站的主芯片是cn3860來自Cavium公司。cn3860是多核MIPS64處理器, 它的目標智能,多千兆網(wǎng)絡,控制平面,存儲,和下一代設備的無線應用。

54、家庭包括十五軟件兼容的處理器,四到十六cnmips64 內(nèi)核在一個芯片上集成的下一代網(wǎng)絡 I/O 以及最先進的安全和應用的硬件加速 2 。核電站的主芯片是smp867球自Sigma Designs公司。的smp8670S供高度集成和高性能的解決方案, 媒體處理。安全媒體處理器體系結構提供了先進的內(nèi)容保護,支持多種數(shù)字版權管理(DRM和條件接收(CA解決方案3 。不支持光纖接口,同軸電纜, 電話線。NPMt持SATA飛鏢、US敞口、DD時存和閃存。四、軟件體系結構RG五模塊:RTOS實時操作系統(tǒng))模塊、網(wǎng)絡模塊、BSP (板級支持包)驅 動模塊、MPEG1碼和語音模塊。圖3顯示了 RG勺軟件體系

55、結構。實時操作系統(tǒng)模塊具有系統(tǒng)資源的最高控制權,包括硬件和軟件。系統(tǒng)任務的控制顯示系統(tǒng)電源??偩€控制、存儲控制、TCP IP 協(xié)議棧,多服務調(diào)度模塊上的實現(xiàn)。其他模塊通過事件方案與模塊進行通信。BSF區(qū)動本g塊NA防口 NPM勺硬件組件提供的接口,即有線電視調(diào)諧器,開關, ADSL2 + PHYK其它芯片的驅動程序。司機讓上實時操作系統(tǒng)或應用程序控制的 硬件組件。網(wǎng)絡模塊包含廣域網(wǎng)控制、局域網(wǎng)控制和802.11b 的控制。 廣域網(wǎng)接口和以太網(wǎng)ADSL2+但該系統(tǒng)主要采用ADSL2作為互聯(lián)網(wǎng)接入方式。局域網(wǎng)控制 VLAN (虛擬局域網(wǎng))管理線。802.11b無線局域網(wǎng)的管理和控制實現(xiàn)了 WEPM

56、PEG單碼模塊支持 MPEG 1 / 2 / 4解碼,主要包括接口驅動和 A / V經(jīng)理。 的A / V經(jīng)理實現(xiàn)MPEG#碼,包含數(shù)據(jù)的緩沖區(qū)和交通控制方案,保證服務質 量。IDE和USBg口驅動,提供記錄和喜愛的信息存儲媒體。VoIP 電話接口模塊包含控制和語音信號,數(shù)據(jù)控制。電話接口提供軟件復制 -相關的因素,處理用戶界面和物理之間的ADSL2+ 。它執(zhí)行鉤了/我們信號處理,音/關閉,發(fā)送DTM嗷字語音壓縮/解壓出和配置。the協(xié)議,如SIP和MGCP和 H.248 協(xié)議H.323, are completely set on the 系統(tǒng)。語音流控制主要包含語音壓縮/解壓數(shù)據(jù)緩沖區(qū)管理和

57、控制通過 RTP?口 RTC眇音流。應用模塊是由防火墻、SNMPQoSt理和TFTP防火墻與NAT供制度保障。 SNMPMIB給出了一個管理功能(管理信息庫)。TFTP (簡單文件傳輸協(xié)議)客戶 端來下載升級或更新文件。CN3860#于多核的協(xié)同工作和共享內(nèi)存管理,驅動程序,如圖 4所示。討論了在更詳細的下面共享內(nèi)存管理,注冊和多功能表功能- 調(diào)用之間的中央處理器和其他模塊的實現(xiàn)。多核心共享內(nèi)存板,雖然一些內(nèi)存是專門由一個單一的中央處理器,幾乎所有可用的內(nèi)存共享內(nèi)存,如下圖所示:( 1)一些內(nèi)存是給定的專用使用的中央處理器,它存儲適當?shù)牟僮飨到y(tǒng)和 程序;( 2)內(nèi)存是共享內(nèi)存,便于中央處理器之間的通信,并提供數(shù)據(jù)管和上下功能表。和多核心系統(tǒng)效率是密切相關的。下面的文章討論了后者的主要焦點。公共存儲使用多核心共享內(nèi)存。在啟動階段,它被初始化飾的cpuoo通過提交內(nèi)存的身份和大小,任何一種處理器都適用于共享內(nèi)存。額外的處理器可以使用相同的內(nèi)存區(qū)域使用身份。可能所有的處理器也可以使用相同的內(nèi)存,所以無論是讀和寫是受保護的硬件信號,以避免多核同時訪問共享內(nèi)存。此外, 基于數(shù)據(jù)路徑的共享內(nèi)存,可以節(jié)省內(nèi)存和減少內(nèi)存拷貝,有效地提高了嵌入式系統(tǒng)的效率。共享內(nèi)存功能表是為多個核心之間的遠程調(diào)用提供客戶端/服務器(C / S :客戶端 /

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