姜書艷數(shù)字邏輯設計及應用課件

DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)ReviewofChapter2

(第二章內容回顧)GeneralPositional-Number-SystemConversion(常用按位計數(shù)制的轉換)AdditionandSubtractionofNon-decimalNumbers(非十進制的加法和減法)1DigitalLogicDesignandAppliReviewofChapter2

(第二章內容回顧)RepresentationofNegativeNumbers

(負數(shù)的表示)Signed-Magnitude[符號－數(shù)值（原碼）]ComplementNumberSystems(補碼數(shù)制)

Radix–Complement(基數(shù)補碼)

DiminishedRadix–Complement

[基數(shù)減1補碼（基數(shù)反碼）]DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)2ReviewofChapter2

(第二章內容回顧)ReviewofChapter2

(第二章內容回顧)BinarySigned-Magnitude,Ones’–Complement,andTwo’s–ComplementRepresentation(二進制的原碼、反碼、補碼表示)

直接由補碼(反碼)求二進制數(shù)值的大?。鹤罡呶晃粰酁?2n-1(-2n-1-1)(1011)2補=（）10DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)3ReviewofChapter2

(第二章內容回顧)ReviewofChapter2

(第二章內容回顧)Two’s–ComplementAdditionandSubtraction(二進制補碼的加法和減法)Overflow（溢出）如果加法運算產(chǎn)生的和超出了數(shù)制表示的范圍，則結果發(fā)生了溢出（Overflow）。如何判斷溢出？

MSBCin

與Cout不同DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)4ReviewofChapter2

(第二章內容回顧)ReviewofChapter2

(第二章內容回顧)Howtorepresenta1-bitDecimalnumberwitha4-bitBinarycode(如何用4位二進制碼表示1位十進制碼)？——BinaryCodedDecimal(BCD碼）(0.301)10=()8421BCDDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)5ReviewofChapter2

(第二章內容回顧)ReviewofChapter2

(第二章內容回顧)AdditionofBCDDigits(BCD數(shù)的加法)思考：兩個BCD碼與兩個4位二進制數(shù)相加的區(qū)別?

DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)6ReviewofChapter2

(第二章內容回顧)DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)7DigitalLogicDesignandAppliReviewofChapter2

(第二章內容回顧)AdditionofBCDDigits(BCD數(shù)的加法)思考：何時需要進行修正？

如果(X+Y)產(chǎn)生進位信號C或在1010~1111之間如何修正？——結果加6DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)8ReviewofChapter2

(第二章內容回顧)ReviewofChapter2

(第二章內容回顧)Graycode（格雷碼）任意相鄰碼字間只有一位數(shù)位變化最高位的0和1只改變一次最大數(shù)回到0也只有一位碼元不同DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)9ReviewofChapter2

(第二章內容回顧)2.11Graycode（格雷碼）DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)構造方法ReflectedCode（反射碼）直接構造

Thebitsofann-bitbinarycordwordarenumberedfromrighttoleft,from0ton-1.[對n

位二進制的碼字從右到左編號（0~n-1）]

BitiofaGray-codecodewordis0ifbitsiandi+1ofthecorrespondingbinarycodewordarethesame,elsebitiis1.(若二進制碼字的第i位和第i+1位相同，則對應的葛萊碼碼字的第i

位為0，否則為1。)102.11Graycode（格雷碼）DigitalLoReviewofChapter2

(第二章內容回顧)DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)FrombinarynumbertoGraycodeThewidthissame,theMSBissame;Fromlefttoright,ifabitinbinarynumberissameasitsleftbit,thegraycodeis0,ifitisdifferent,thegraycodeis1.Examples:binarynumber:1001001001100011Graycode:110110110101001011ReviewofChapter2

(第二章內容回顧)ReviewofChapter2

(第二章內容回顧)構造方法異或（XOR）運算：相異為1，相同為0Gn=BnBn=GnGn-1=Bn⊕Bn-1Bn-1=Gn⊕Gn-1……G0=B1⊕B0B0=Gn⊕Gn-1⊕…⊕G0DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)12ReviewofChapter2

(第二章內容回顧)Chapter3DigitalCircuits(數(shù)字電路)GiveaknowledgeoftheElectricalaspectsofDigitalCircuits(介紹數(shù)字電路中的電氣知識)DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)13Chapter3DigitalCircuits(ConsidersomeQuestions

（思考幾個問題）在模擬的世界中如何表征數(shù)字系統(tǒng)？如何將物理上的實際值映射為邏輯上的0和1？什么時候考慮器件的邏輯功能；什么時候考慮器件的模擬特性？DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)14ConsidersomeQuestions

（思考幾個問DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)3.1LogicSignalsandGates

(邏輯信號和門電路)HowtogettheHIGHandLOWVoltage(如何獲得高、低電平)？HIGHto0or1(高電平對應0還是1)？VOUTVINVccR獲得高、低電平的基本原理Positive(正邏輯)10Negative(負邏輯)1015DigitalLogicDesignandAppli16SwitchesElectronicswitchesarethebasisofbinarydigitalcircuitsAswitchhasthreepartsSourceinput,andoutputCurrenttriestoflowfromsourceinputtooutputControlinputVoltagecontrolswhetherthatcurrentcanflow“off”“on”outputsourceinputoutputsourceinputcontrolinputcontrolinput1616SwitchesElectronicswitches17SwitchesTheamazing(令人驚奇的）shrinking（逐漸減小的）switch1930s:Relays1940s:Vacuumtubes1950s:Discretetransistor1960s:Integratedcircuits(ICs)InitiallyjustafewtransistorsonICThentens,hundreds,thousands...relayvacuumtubediscretetransistorICquarter(toseetherelativesize)1717SwitchesTheamazing(令人驚奇的）s18TheCMOSTransistorCMOStransistorBasicswitchinmodernICsSilicon--notquiteaconductororinsulator:

Semiconductor2.3gatesourcedrainoxideApositivevoltagehere...(a)ICpackageIC...attractselectronshere,turningthechannelbetweenthesourceanddrainintoaconductor1818TheCMOSTransistorCMOStran19TheCMOSTransistorCMOStransistorBasicswitchinmodernICsdoesnotconduct0conducts1gatenMOSdoesnotconduct1gatepMOSconducts02.31919TheCMOSTransistorCMOStran20Moore’sLawICcapacity（容量，集成度）doublingaboutevery18monthsforseveraldecadesKnownas“Moore’sLaw”afterGordonMoore,co-founderofIntelPredicted（預言）in1965predictedthatcomponentsperICwoulddoubleroughly（粗略地，大致上）everyyearorso2020Moore’sLawICcapacity（容量，集成Moore’sLawForaparticular（特定的）numberoftransistors,theICareashrinksbyhalfevery18monthsConsiderhowmuchshrinkingoccursinjust10years(trydrawingit)Enablesincredibly（不能相信的，難以置信的）powerfulcomputationinincrediblytinydevices21Moore’sLawForaparticular（特定Moore’sLawToday’sICsholdbillionsoftransistorsThefirstPentiumprocessor(early1990s)neededonly3millionAnIntelPentiumprocessorIChavingmillionsoftransistors22Moore’sLawToday’sICsholdbi3.1LogicSignalsandGates

(邏輯信號和門電路)DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)從物理的角度考慮電路如何工作，工作中的電氣特性實際物理器件不可避免的時間延遲問題從邏輯角度輸入、輸出的邏輯關系

三種基本邏輯：與、或、非233.1LogicSignalsandGates

24BooleanLogicGates

BuildingBlocksforDigitalCircuits

(BecauseSwitchesareHardtoWorkWith)“Logicgates”arebetterdigitalcircuitbuildingblocksthanswitches(transistors)Why?...2.4Abstraction（提?。﹔educescomplexity!2424BooleanLogicGates

Building25BooleanAlgebraanditsRelationtoDigitalCircuitsTounderstandthebenefitsof“l(fā)ogicgates”vs.switches,weshouldfirstunderstandBooleanalgebra“Traditional”algebraVariablesrepresentrealnumbers(x,y)Operators（運算器）operateonvariables,returnrealnumbers(2.5*x+y-3)a2525BooleanAlgebraanditsRela26BooleanAlgebraanditsRelationtoDigitalCircuitsBooleanAlgebraVariablesrepresent0or1onlyOperatorsreturn0or1onlyBasicoperatorsAND:aANDbreturns1onlywhenbotha=1andb=1OR:aORbreturns1ifeither(orboth)a=1orb=1NOT:NOTareturnstheoppositeofa(1ifa=0,0ifa=1)a2626BooleanAlgebraanditsRela1、BasicLogicFunction:AND

（基本邏輯運算：與）000010100111ABZLogicExpression

(邏輯表達式)Z=A·BSwitch:1-on,0-off(開關：1通,0斷)Lamp:1-Light,0-out(燈:1亮,0不亮)Producea1outputifandonlyifitsinputsareall1(當且僅當所有輸入全為1時，輸出為1)TruthTable

(真值表)&ABZABZ（邏輯符號）ABZLogicCircuitDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)271、BasicLogicFunction:AND

（基2、BasicLogicFunction:OR

（基本邏輯運算：或）LogicExpression(邏輯表達式)：Z=A+BABZ真值表ABZProducea1outputifanyinputis1

(只要有任何一個輸入為1，輸出就為1)≥1ABZABZ邏輯符號000011101111TruthTableLogicCircuitDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)282、BasicLogicFunction:OR

（基本AZ0110真值表LogicExpression(邏輯表達式)：Y=A=A’AZRProduceanoutputvaluethatistheoppositeofitsinputvalue.(產(chǎn)生一個與輸入相反的輸出)UsuallycalledanInverter

（通常稱為反相器）1ZAAZ(邏輯符號)DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)3、BasicLogicFunction:NOT

（基本邏輯運算：非）TruthTableLogicCircuit29AZ真值表LogicExpressionAZRP4、NANDandNORGates(與非和或非)NAND(與非)

LogicExpression

(邏輯表達式)：Z=(A·B)’

LogicCircuit(邏輯符號)：NOR(或非)

LogicExpression(邏輯表達式)：Z=(A+B)’

LogicCircuit

(邏輯符號)：&≥1DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)304、NANDandNORGates(與非和或非)DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)TruthTable(真值表)&≥1LogicalOperation(邏輯運算)

NAND(與非)

NOR(或非)

LogicCircuit(邏輯符號)

LogicExpression(邏輯表達式)

Y=(A?B)’‘

Y=(A+B)’‘AB

0

0

1

11

Y

1

1

1

0

Y

1

0

0

0

10031DigitalLogicDesignandAppli32BooleanAlgebraanditsRelationtoDigitalCircuitsDevelopedmid-1800’sbyGeorgeBooletoformalize（使成正式）

humanthoughtEx:“I’llgotolunchifMarygoesORJohngoes,ANDSallydoesnotgo.”LetFrepresentmygoingtolunch(1meansIgo,0Idon’tgo)Likewise（類似地）,mforMarygoing,jforJohn,andsforSallyThenF=(mORj)ANDNOT(s)3232BooleanAlgebraanditsRela33ConvertingtoBooleanEquationsQ1.Afiresprinkler（灑水器）systemshouldspray（噴）waterifhighheatissensedandthesystemissettoenabled.Answer:LetBooleanvariablehrepresent“highheatissensed,”erepresent“enabled,”andFrepresent“sprayingwater.”

Thenanequationis:F=hANDe.a3333ConvertingtoBooleanEquati34ConvertingtoBooleanEquationsQ2.Acaralarmshouldsoundifthealarmisenabled,andeitherthecarisshakenorthedoorisopened.Answer:Letarepresent“alarmisenabled,”srepresent“carisshaken,”drepresent“doorisopened,”andFrepresent“alarmsounds.”

Thenanequationis:F=aAND(sORd).a3434ConvertingtoBooleanEquatiRelatingBooleanAlgebratoDigitalDesignBooleanalgebra(mid-1800s)Boole’sintent:formalizehumanthoughtSwitches(1930s)Shannon(1938)DigitaldesignShowedapplicationofBooleanalgebratodesignofswitch-basedcircuitsFortelephoneswitchingandotherelectronicuses35RelatingBooleanAlgebratoDiDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)3.2LogicFamilies（邏輯系列）同一系列的芯片具有類似的輸入、輸出及內部電路特征，但邏輯功能不同。不同系列的芯片可能不匹配CMOS系列TTL邏輯系列36DigitalLogicDesignandAppliDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)3.3CMOSLogic(CMOS

邏輯)CMOSLogiclevels(COMS邏輯電平)5.0V3.5V1.5V0.0VATypicalLogicCircuit:5-VoltPowerSupply(典型的5V電源電壓)OtherPower-SupplyVoltages:3.3,2.5or1.8Volts(其它電源電壓：3.3V,2.5V或1.8V)Logic1(High)[邏輯1（高態(tài)）]Logic0(Low)[邏輯0（低態(tài)）]37DigitalLogicDesignandAppliDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)2、MOSTransistors(MOS晶體管)TwoTypes:N-ChannelandP-Channel(分為：N溝道和P溝道)Drain(漏極)Source(源極)Gate(柵極)Vgs+N-Channel(N溝道)Source(源極)Drain(漏極)Gate(柵極)

+VgsP-Channel(P溝道)38DigitalLogicDesignandAppliDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)2、MOSTransistors(MOS晶體管)TwoTypes:N-ChannelandP-Channel(分為：N溝道和P溝道)Source(源極)Drain(漏極)Gate(柵極)

+VgsP-Channel(P溝道)Usually(通常)：

Vgs<=0

Vgs=0RdsVeryHigh

Off(截止狀態(tài))

Vgs

Rds

On(導通狀態(tài))39DigitalLogicDesignandAppliDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)2、MOSTransistors(MOS晶體管)TheGateofaMOStransistorhasaveryhighimpedance（阻抗）.[Overmegohm(106ohms)][MOS晶體管柵極阻抗非常高（>兆歐）]Regardlessofgatevoltage(無論柵電壓如何)

Almostnocurrentflowsfromthegatetosource,orfromthegatetodrain.(柵－源、柵－漏之間幾乎沒有電流)（Leakage（漏出）Current,Lessthanmicroampere(漏電流,

A,10-6A）TheGateisCapacitively（容性地）coupledtothesourceanddrain

(柵極與源和漏極之間有容性耦合)

Thepowerneedtochargeanddischargethiscapacitance（電容）oneachinputsignaltransitionaccountsforanontrivial（非平凡的）portionofacircuit’spowerconsumption(信號轉換時，電容充放電，功耗較大).40DigitalLogicDesignandAppliDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)MOS管的基本開關電路vI+–vO–+iD+VDDRDDGS只要電路參數(shù)選擇合理輸入低，截止，輸出高輸入高，導通，輸出低41DigitalLogicDesignandAppliDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)3、BasicCMOSInverterCircuit

(基本的CMOS反相器)FunctionalBehavior

(工作原理)1、VIN=0.0VVGSN=0.0V，TnOff(截止)VGSP=VIN–VDD=–5.0V，TpOn(導通)VOUT

VDD=5.0VVDD=+5.0VVOUTVINTpTn42DigitalLogicDesignandAppli3、BasicCMOSInverterCircuit

(基本的CMOS反相器)2、VIN=VDD=5.0VVGSN=5.0VTnOn(導通)VGSP=VIN–VDD=0.0VTpOff(截止)VOUT

0VDD=+5.0VVOUTVINTpTnDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)433、BasicCMOSInverterCircuit

44NOTgatex01F1010F1x0(a)10F0x1(b)Whentheinputis0Whentheinputis10110timeFx4444NOTgatex01F1010F1x0(a)10F0xDigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)4、CMOSNAND(CMOS與非門)

FunctionalBehavior

(工作原理)：1、EitherInputLow,(A、B至少有一個為低),ThenEitherT1,T3Off(T1、T3至少有一個截止)EitherT2,T4On(T2、T4至少有一個導通)ZisHigh[Z為高

VDD）]VDD=+5.0VZABT1T2T4T345DigitalLogicDesignandAppli4、CMOSNANDGate(CMOS與非門)2、BothInputsHigh(A、B都為高),ThenBothT1,T3On(T1、T3都導通)BothT2,T4Off(T2，T4都截止)

ZisLow[Z為低（

0V）]VDD=+5.0VZABT1T2T4T3DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)464、CMOSNANDGate(CMOS與非門)2、Bo5、CMOSNORGate(CMOS或非門)FunctionalBehavior

(工作原理)：1、BothInputsLow(A、B都為低),ThenBothT1、T3Off(T1、T3都截止)BothT2,T4On(T2，T4都導通)ZisHigh[Z為高（

VDD）]VDD=+5.0VZABT1T2T4T3DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)475、CMOSNORGate(CMOS或非門)Funct5、CMOSNORGate(CMOS或非門)FunctionalBehavior

(工作原理)：2、EitherInputHigh(A、B至少有一個為高)ThenEitherT1、T3On(T1、T3至少有一個導通)EitherT2,T4Off(T2、T4至少有一個截止)ZisLow[Z為低（0V）]VDD=+5.0VZABT1T2T4T3DigitalLogicDesignandApplication(數(shù)字邏輯設計及應用)485、CMOSNORGate(CMOS或非門)Funct49BuildingCircuitsUsingGatesRecall（回想）themotion-in-darkexampleTurnonlamp(F=1)whenmotionsensed(a=1)andnolight(b=0)F=aANDNOT(b)4949BuildingCircuitsUsingGate50BuildingCircuitsUsingGatesBuildusinglogicgates,ANDandNOT,asshownWejustbuiltourfirstdigitalcircuit!5050BuildingCircuitsUsingGate51Example:SeatBeltWarningLightSystemDesigncircuitforwarninglightSensorss=1:seatbeltfastened（系緊）k=1:keyinsertedCaptureBooleanequationseatbeltnotfastened,andkeyinsertedw=NOT(s)ANDk5151Example:SeatBeltWarningL52Example:SeatBeltWarningLightSystemConvertequationtocircuitTimingdiagramillustratescircuitbehaviorWesetinputstoanyvaluesOutputsetaccordingtocircuitaatimeInputsOutputs111000kswkswBeltWarnSeatbelt5252Example:SeatBeltWarningL53Moreexamples:SeatbeltwarninglightextensionsOnlyilluminate（照亮）warninglightifpersonisintheseat(p=1),andseatbeltnotfastenedandkeyinsertedw=pANDNOT(s)ANDkkpswBeltWarna5353Moreexamples:Seatbeltwar54Moreexamples:SeatbeltwarninglightextensionsaGivent=1for5secondsafterkeyinserted.Turnonwarninglightwhent=1(tocheckthatwarninglightsareworking)w=(pANDNOT(s)ANDk)ORtakwpstBeltWarn5454Moreexamples:Seatbeltwar6、Fan－In（扇入）TheNumberofInputsthataGatehave

(門電路所具有的輸入端的數(shù)目)TheAdditive“on”ResistanceofseriestransistorslimitstheFan–InofCMOSgates.

(導通電阻的可加性限制了CMOS門的扇入數(shù))Alargenumberofinputscanbemadebycascadinggateswithfewerinputs(可用較少