軌至軌運(yùn)放設(shè)計(jì)課件

RAIL-to-RAILOPAMPS

軌至軌運(yùn)放的設(shè)計(jì)RAIL-to-RAILOPAMPS

軌至軌運(yùn)放的設(shè)計(jì)主要內(nèi)容設(shè)計(jì)原理采用電平移位法軌至軌運(yùn)放的設(shè)計(jì)采用恒定電壓法實(shí)現(xiàn)跨導(dǎo)恒定的設(shè)計(jì)主要內(nèi)容設(shè)計(jì)原理OpAmpConfigurationsOpAmpConfigurationsWhyRail-to-RailDifferentialInputStage?WhyRail-to-RailDifferential問題為什么要提高運(yùn)放的輸入信號(hào)共模范圍？為什么要實(shí)現(xiàn)跨導(dǎo)的恒定？問題為什么要提高運(yùn)放的輸入信號(hào)共模范圍？HowtoObtainaRail-to-RailInputCommonModeRange?(a)P-typedifferentialinputstage(b)N-typedifferentialinputstageHowtoObtainaRail-to-RailIHowtoObtainaRail-to-RailInputCommonModeRange?HowtoObtainaRail-to-RailIHowtoObtainaRail-to-RailInputCommonModeRange?HowtoObtainaRail-to-RailIcombiningaPMOSandaNMOSDifferentialpairscombiningaPMOSandaNMOSDicombiningaPMOSandaNMOSDifferentialpairscombiningaPMOSandaNMOSDiWhyisaConstantGmneeded?WhyisaConstantGmneeded?TechniquesforN-PComplementary

Rail-to-RailInputStage1.Forinputstageswithinputtransistorsworkinginweak-inversionregion,usingcurrentcomplementarycircuittokeepthesumofINandIPconstant[1][2][6];2.Usingsquarerootcircuittokeepconstant[3][13][16];3.and4.Usingcurrentswitchestochangethetailcurrentofinputdifferentialpairs[3][4][5][6];4.Usinghex-pairstructuretocontrolthetailcurrentsofbackuppairs[7];TechniquesforN-PComplementaTechniquesforN-PComplementary

Rail-to-RailInputStage(cont’d)5.Usingmaximum/minimumselectioncircuittoconducttheoutputcurrentofthedifferentialpairwithlargercurrent,aswellaslargergm,tothenextstage[8][9];6.Usingelectroniczenerdiodetokeepconstant[10];7.UsingDClevelshiftcircuittochangetheinputDClevel[11].Wewillanalyzethemonebyoneinthefollowingsections.Therearestillothertechniques[12][14][15][17][18],interestedreadersmaycheckthesereferences.TechniquesforN-PComplementaRail-to-RailInputStage,Structure2Basicidea–Foraninputdifferentialpair,usinga1storderapproximation,Rail-to-RailInputStage,StruRail-to-RailInputStage,Structure3[3][4][6]UsingcurrentswitchestochangethetailcurrentofinputdifferentialpairsRail-to-RailInputStage,Stru具體電路具體電路Rail-to-RailInputStage,Structure6[8][9]UsingMaximum/MinimumselectioncircuitRail-to-RailInputStage,StruTheblockdiagramTheblockdiagram最大電流選擇電路最大電流選擇電路Rail-to-RailInputStage,Structure7UsingDCshiftingcircuittochangetheinputDClevelRail-to-RailInputStage,Stru具體電路具體電路Rail-to-railamplifierwithZenerdiodeRail-to-railamplifierwithZeSummaryandComparisonSummaryandComparison進(jìn)一步研究的問題MismatchbetweenN-channelandP-channeltransconductorsTransitionRegionCMRRdegradation(40-60dB)Nonlinearity進(jìn)一步研究的問題MismatchbetweenN-chaReferencesI

[1]J.F.Duque-Carrillo,J.M.Carillo,J.L.Ausin,andE.Sanchez-Sinencio,“Robustanduniversalconstant-gmcircuittechnique,”ElectronicsLetters,vol.38,no.9,pp.396-397,Apr.2002.[2]M.Wang,T.L.Mayhugh,S.H.K.Embabi,andE.Sanchez-Sinencio,“Constant-gmRail-to-RailCMOSOp-AmpInputStagewithOverlappedTransitionRegions,”IEEEJ.ofSolidStateCircuits,vol.34,no.2,pp.148-156,Feb.1999.[3]G.FerriandW.Sansen,“ARail-to-RailConstant-gmLow-VoltageCMOSOperationalTransconductanceAmplifier,”IEEEJ.ofSolidStateCircuits,vol.32,no.10,pp.1563-1567,Oct.1997.[4]J.Ramirez-Angulo,R.G.Carvajal,J.Tombs,andA.Torralba,“Low-VoltageCMOSOp-AmpwithRail-toRailInputandOutputSignalSwingforContinuous-TimeSignalProcessingUsingMultiple-InputFloating-GateTransistors,”IEEETrans.OnCircuitsandSystems–II,vol.48,no.1,pp.111-116,Jan2001.[5]J.M.Carrillo,J.F.Duque-Carrillo,G.Torelli,andJ.L.Ausin,“GeneralPurposerail-to-railinputcircuitwithconstantbehaviorforVLSIcelllibraries,”IEEEInternationalSymposiumonCircuitsandSystems,vol.3,pp.607-610,May2002ReferencesI

[1]J.F.Duque-CReferencesII

[1]J.H.Huijsing,andD.Linebarger,“Lowvoltageoperationalamplifierwithrail-to-railinputandoutputstages,”IEEEJournalofSolid-StateCircuits,vol.SC-20,no.6,pp.1144-1150,December1985[2]W.-C.S.Wu,W.J.Helms,J.A.Kuhn,andB.E.Byrkett,“Digital-compatiblehigh-performanceoperationalamplifierwithrail-to-railinputandoutputranges,”IEEEJournalofSolid-StateCircuits,vol.29,no.1,pp.63-66,January1994[3]R.Hogervorst,R.J.Wiegerink,P.A.L.deJong,J.Fonderie,R.F.Wassenaar,andJ.H.Huijsing,“CMOSlow-voltageoperationalamplifierswithconstant-gmrail-to-railinputstage,”IEEEProc.ISCAS1992,pp.2876-2879[4]R.Hogervost,J.P.Tero,R.G.H.EschauzierandJ.H.Huijsing,“Acompactpower-efficient3-VCMOSrail-to-railinput/outputoperationalamplifierforVLSIcelllibraries,”IEEEJournalofSolid-StateCircuits,vol.29,no.12,pp.1505-1513,December1994[5]R.Hogervorst,S.M.Safai,andJ.H.Huijsing,“Aprogrammable3-VCMOSrailto-railopampwithgainboostingfordrivingheavyloads,”IEEEProc.ISCAS1995,pp.1544-1547[6]J.H.Huijsing,R.Hogervorst,andK.-J.deLangen,“Low-powerlow-voltageVLSIoperationalamplifiercells,”IEEETrans.CircuitsandSystems-I,vol.42.no.11,pp.841-852,November1995ReferencesII

[1]J.H.HuijsiReferences(cont’d)

[7]W.Redman-White,“Ahighbandwidthconstantgm,andslew-raterail-to-railCMOSinputcircuitanditsapplicationtoanalogcellforlowvoltageVLSIsystems,”IEEEJournalofSolid-StateCircuits,vol.32,no.5,pp.701-712,May1997[8]C.Hwang,A.Motamed,andM.Ismail,“LVopampwithprogrammablerail-to-railconstant-gm,”IEEEProc.ISCAS1997,pp.1988-1959[9]C.Hwang,A.Motamed,andM.Ismail,“Universalconstant-gminput-stagearchitectureforlow-voltageopamps,”IEEETrans.CircuitsandSystems-I,vol.42.no.11,pp.886-895,November1995[10]R.Hogervost,J.P.Tero,andJ.H.Huijsing,“CompactCMOSconstant-gmrail-to-railinputstagewithgm-controlbyanelectroniczenerdiode,”IEEEJournalofSolid-StateCircuits,vol.31,no.7,pp.1035-1040,July1996[11]M.Wang,T.L.Mayhugh,Jr.,S.H.K.Embabi,andE.Sánchez-Sinencio,“Constant-gmrail-to-railCMOSop-ampinputstagewithoverlappedtransitionregion,”IEEEJournalofSolid-StateCircuits,vol.34,no.2,pp.148-156,February1999[12]G.FerriandW.Sansen,“Arail-to-railconstant-gmlow-voltageCMOSoperationaltransconductanceamplifier,”IEEEJournalofSolid-StateCircuits,vol.32,no.10,pp.1563-1567,October1999References(cont’d)

[7]W.RReferences(cont’d)

[13]S.SakuraiandM.Ismail,“Robustdesignofrail-to-railCMOSoperationalamplifiersforalowpowersupplyvoltage,”IEEEJournalofSolid-StateCircuits,vol.31,no.2,pp.146-156,February1996[14]J.H.Botma,R.F.Wassenaar,andR.J.Wiegerink,“Simplerail-to-raillowvoltageconstanttransconductanceCMOSinputstageinweakinversion,”ElectronicsLetters,vol.29,no.12,pp.1145-1147,June1993[15]V.I.ProdanovandM.M.Green,“Simplerail-to-railconstanttransconductanceinputstageoperatinginstronginversion,”IEEE39thMidwestSymposiumonCircuitsandSystems,vol2,pp.957-960,August1996[16]J.H.Botma,R.F.Wassenaar,andR.J.Wiegerink,“AlowvoltageCMOSopampwitharail-to-railconstant-gminputstageandaclassABrail-to-railoutputstage,”IEEEProc.ISCAS1993,vol.2,pp.1314-1317,May1993[17]J.F.Duque-Carrillo,J.M.Valverde,andR.Perez-Aloe,“Constant-gmrail-to-railcommon-moderangeinputstagewithminimumCMRRdegradation,”IEEEJournalofSolid-StateCircuits,vol.28,no.6,pp.661-666,June1993[18]A.L.CobanandP.E.Allen,“Alow-voltageCMOSopampwithrail-to-railconstant-gminputstageandhigh-gainoutputstage,”IEEEProc.ISCAS1995,vol.2,pp.1548-1551,April-May1995References(cont’d)

[13]S.References(cont’d)[19]T.W.Fischer,A.I.Karsilayan,andE.Sánchez-Sinencio,“ARail-to-RailAmplifierInputStagewith+/-0.35%gmFluctuation,”IEEETransactionsOnCircuitsandSystemsI.vol.52,No.2,pp271-282,February2005.[20]J.Hu,S.Yan,andE.Sánchez-Sinencio,“AConstant-GMRail-to-RailOpAmpInputStageUsingDynamicCurrentScalingTechniques,”IEEEInternationalSymposiumonCircuitsandSystems,Kobe,Japan,May23-26,2005.[21]S.Yan,J.Hu,T.Song,andE.Sánchez-Sinencio,“Constant-gmTechniquesforRail-to-RailCMOSInputStages:AComparativeStudy,”IEEEInternationalSymposiumonCircuitsandSystems2005,Kobe,Japan,May23-26,2005.[22]T.Song,J.Hu,X.Li,S.YanandE.Sánchez-Sinencio,"ARobustandScalableConstantgmRail-to-RailCMOSInputStagewithDynamicFeedbackforVLSICellLibraries",IEEETransactionsonCircuitsandSystemsI,pp804-816,Vol.55,Issue3,April2008.References(cont’d)一種采用電平移位法的恒跨導(dǎo)軌至軌運(yùn)放的設(shè)計(jì)一種采用電平移位法的恒跨導(dǎo)軌至軌運(yùn)放的設(shè)計(jì)設(shè)計(jì)指標(biāo)參數(shù)名

設(shè)計(jì)值

電源電壓（VDD）3.3v開環(huán)增益（RL=10k，CL=10pf）>80dB相位裕量（RL=10k，CL=10pf）60度單位增益帶寬（RL=10k，CL=10pf）>5MHz轉(zhuǎn)換速度（CL=10pf）>10v/us共模抑制比>80dB電源抑制比>80dB輸入共模范圍0-3.3v輸出擺幅0-3.3v跨導(dǎo)變化率<5%設(shè)計(jì)指標(biāo)參數(shù)名設(shè)計(jì)值電源電壓（VDD）3.3v開環(huán)增軌至軌特點(diǎn)一、輸入輸出信號(hào)范圍盡可能大，從Vss到Vdd。二、輸入級(jí)的跨導(dǎo)在共模輸入電壓范圍內(nèi)基本保持恒定。軌至軌特點(diǎn)一、輸入輸出信號(hào)范圍盡可能大，從Vss到Vdd?；パa(bǔ)差分輸入級(jí)1、低共模輸入：PMOS飽和，NMOS截止2、高共模輸入：NMOS飽和，PMOS截止3、輸入級(jí)最小電源電壓：Vsup=Vsgp+Vgsn+2Vdsat4、共模輸入范圍為VSS≤Vcm≤VDD互補(bǔ)差分輸入級(jí)1、低共模輸入：PMOS飽和，NMOS截止PMOS/NMOS互補(bǔ)差分對(duì)的致命缺陷：在整個(gè)共模輸入范圍內(nèi)，輸入電路的總跨導(dǎo)不恒定。在兩對(duì)MOS管同時(shí)導(dǎo)通時(shí)，其總跨導(dǎo)是其它部分的2倍。PMOS/NMOS互補(bǔ)差分對(duì)的致命缺陷：在整個(gè)共模輸入范圍內(nèi)電平移位法恒定跨導(dǎo)平移PMOS對(duì)或者NMOS對(duì)的跨導(dǎo)曲線，使中間重合的部分正好為恒定的常數(shù)，且同非重合部分相等。PMOS對(duì)左平移法的原理圖一、原理電平移位法恒定跨導(dǎo)平移PMOS對(duì)或者NMOS對(duì)的跨導(dǎo)曲線，使

1、首先要求非重疊部分即需滿足：和2、確定平移的量也就是討論NMOS（或PMOS）對(duì)的跨導(dǎo)的2個(gè)轉(zhuǎn)折點(diǎn)。1、首先要求非重疊部分即需滿足：和2、確定平移的量也就是討二、平移電路采用輸入端接入共源電路的方法。利用MOS管的柵源電壓來抬高或降低輸入共模電壓的范圍從而達(dá)到平移跨導(dǎo)曲線的目的。這里采用的是PMOS對(duì)的左平移法。利用Mb2，Mb3，M5，M6構(gòu)成共源電路來對(duì)PMOS差分對(duì)的跨導(dǎo)進(jìn)行平移，平移的大小為二、平移電路采用輸入端接入共源電路的方法。利用MOS管的柵源三、半定量分析1、NMOS管M3開始工作，，得出

2、Vcm增大，直到M3，M4，Mbn都進(jìn)入飽和區(qū)，得出以上兩個(gè)式子就是NMOS對(duì)的跨導(dǎo)的轉(zhuǎn)折點(diǎn)。同理，可以求出PMOS對(duì)的2個(gè)轉(zhuǎn)折點(diǎn)，如下：3、Vcm從Vdd減小到M1開始導(dǎo)通得出4、Vcm再減小時(shí)，M1，M2，Mbp進(jìn)入飽和狀態(tài)，得出三、半定量分析1、NMOS管M3開始工作，，根據(jù)電平位移法的原理，得出以下方程式：簡化后，兩式相減可得出：

分解為即根據(jù)電平位移法的原理，得出以下方程式：簡化后，兩式相減可得所以滿足：這兩個(gè)條件。和可知M1和M3的寬長比之比。由可算出由得由可得出Mb2的寬長比。所以滿足：這兩個(gè)條件。和可知M1和M3的寬長比之比。由可ClassAB輸出級(jí)結(jié)構(gòu)mos管工作在飽和區(qū)時(shí)令則滿足輸出跨導(dǎo)恒定ClassAB輸出級(jí)結(jié)構(gòu)mos管工作在飽和區(qū)時(shí)令則滿足輸出跨RailtoRail電路的實(shí)際寬長比的手工計(jì)算從CSMC0.5umMIX工藝庫文件中得到工藝參數(shù)一、輸入級(jí)參數(shù)計(jì)算設(shè)RailtoRail電路的實(shí)際寬長比的手工計(jì)算從CSMCRailtoRail輸入級(jí)實(shí)際電路圖RailtoRail輸入級(jí)實(shí)際電路圖按照平移法原理的分析取則設(shè)平移電路的電流再計(jì)算按照平移法原理的分析取則設(shè)平移電路的電流再計(jì)算實(shí)際的rail-to-rail輸出級(jí)電路圖則G30由前級(jí)決定為常數(shù)，確定這里設(shè)2.25v。再綜合考慮為保證M30-M31能工作在飽和區(qū)，設(shè)得出二、輸出級(jí)參數(shù)計(jì)算實(shí)際的rail-to-rail輸出級(jí)電路圖則G30由前級(jí)決定中間級(jí)共源共柵電路圖三、中間級(jí)共源共柵參數(shù)計(jì)算總增益中間級(jí)共源共柵電路圖三、中間級(jí)共源共柵參數(shù)計(jì)算總增益根據(jù)設(shè)計(jì)指標(biāo)和電路原理手工計(jì)算得出的MOS寬長比根據(jù)設(shè)計(jì)指標(biāo)和電路原理手工計(jì)算得出的MOS寬長比Rail_To_Rail放大器

——采用恒定電壓法實(shí)現(xiàn)跨導(dǎo)恒定的設(shè)計(jì)

Rail_To_Rail放大器

——采用恒定電壓法實(shí)現(xiàn)跨導(dǎo)恒結(jié)構(gòu)與原理當(dāng)共模信號(hào)Vicm很大時(shí)，此時(shí)只有NMOS差