Digital Logic Circuits 數(shù)字邏輯電路知到智慧樹期末考試答案題庫2024年秋南京理工大學

DigitalLogicCircuits數(shù)字邏輯電路知到智慧樹期末考試答案題庫2024年秋南京理工大學Amacrocellispartofa

A:GALB:CPLDC:PALD:answers(a),(b),and(c)

答案:DTheLUT,usedintheLUT-CPLDarchitecture,isbasicallyamemorythatcanbeprogrammedusing

A:SOPfunctionsB:productofcomplementsC:answers(a),(b),and(c)D:POSfunctions

答案:SOPfunctionsDatathatarestoredatagivenaddressinarandom-accessmemory(RAM)arelostwhen

A:thedataarereadfromtheaddressB:

answers(a)and(c)C:newdataarewrittenattheaddressD:powergoesoff

答案:answers(a)and(c)Theflip-flopusedinaCPLDmacrocellcanbeprogrammedasa

A:neither(a)nor(b)B:J-Kflip-flopC:both(a)and(b)D:Dflip-flop

答案:both(a)and(b)A16-bitwordconsistsof

A:

4bytesB:3bytesC:4nibblesD:3bytesand1nibble

答案:4nibblesDataarestoredinarandom-accessmemory(RAM)duringthe

A:writeoperationB:addressingoperationC:enableoperationD:readoperation

答案:writeoperationThefinaloutputofthesynthesisphaseofadesignflowisthe

A:devicepinnumbersB:bitstreamC:timingsimulationD:netlist

答案:netlistToenterabyteofdataseriallyintoan8-bitshiftregister,theremustbe

A:oneclockpulseB:fourclockpulsesC:eightclockpulsesD:twoclockpulses

答案:eightclockpulsesAlogicmodulecanbeprogrammedforthefollowingmodesofoperations:

A:answers(a),(b),and(c)B:extendedLUTmodeC:normalmodeD:arithmeticandsharedarithmeticmode

答案:answers(a),(b),and(c)A4-bitripplecounterconsistsofflip-flopsthateachhaveapropagationdelayfromclocktoQoutputof12ns.Forthecountertorecyclefrom1111to0000,ittakesatotalof

A:12nsB:36nsC:48nsD:24ns

答案:48nsAbyte-organizedmemoryhas

A:16dataoutputlineB:1dataoutputlineC:4dataoutputlineD:8dataoutputline

答案:8dataoutputlineThefactorthatdeterminestheadequacyofaGALforalogicdesignis

A:thenumberofinputsandoutputsB:thenumberofequivalentgatesordensityC:both(a)and(b)D:thenumberofinvertersinvolved

答案:both(a)and(b)SRAM,DRAM,flash,andEEPROMareall

A:magneticstoragedevicesB:magneto-opticalstoragedevicesC:opticalstoragedevicesD:semiconductorstoragedevices

答案:semiconductorstoragedevicesInafunctionalsimulation,theusermustspecifythe

A:specifictargetdeviceB:inputwaveformsC:HDLD:outputwaveform

答案:inputwaveformsAPALisalogicdevicewhichis

A:aone-timeprogrammableB:both(a)and(b)C:anerasableprogrammableD:electronicallyerasableandprogrammable

答案:D:electronicallyerasableandprogrammableThebasicelementsofanFPGAare

A:PALarraysB:both(a)and(b)C:I/OblocksD:configurablelogicblocks

答案:both(a)and(b)ThelogicmoduleinanFPGAlogicblockcanbeconfiguredfor

A:registeredlogicB:both(a)and(c)C:parallelmodelogicD:combinationallogic

答案:both(a)and(c)Adigitalvoltmeterusesa

A:successiveapproximationADCB:flashADCC:dual-slopeADCD:sigma-deltaADC

答案:dual-slopeADCAROMisa

A:nonvolatilememory

B:volatilememoryC:read/writememoryD:byte-organizedmemory

答案:nonvolatilememoryABCDcounterisanexampleof

A:adecadecounterB:

answers(b)and(c)C:afull-moduluscounterD:atruncated-moduluscounter

答案:answers(b)and(c)Amemorywith512addresseshas

A:1addresslineB:9addresslinesC:12addresslinesD:512addresslines

答案:9addresslinesAliasingresultsin

A:perfectsamplingB:undersamplingC:guard-bandformationD:oversampling

答案:undersamplingInacomputer,theBIOSprogramsarestoredinthe

A:ROMB:DRAMC:SRAMD:RAM

答案:ROMAtypicalmacrocellconsistsof

A:gates,multiplexers,andaflip-flopB:afixedlogicarrayC:gatesandashiftregisterD:aGraycodecounter

答案:A:gates,multiplexers,andaflip-flopWhichoneofthefollowingisanexampleofacounterwithatruncatedmodulus?

A:Modulus16B:Modulus32C:Modulus8D:Modulus14

答案:Modulus14Onceprogrammed,PLDlogiccanbechanged.

A:對B:錯

答案:對AnADCisananalogdatacomponent.

A:錯B:對

答案:錯Deltamodulationisbasedonthedifferenceoftwosuccessivesamples.

A:錯B:對

答案:對Ananalogsignalcanbeconvertedtoadigitalsignalusingsampling.

A:對B:錯

答案:對InVerilogHDL,thedefinitionsofmodulesareallowedtobenested.

A:錯B:對

答案:錯Anasynchronouscounterisalsoknownasaripplecounter.

A:對B:錯

答案:錯Ifthepresentstateis1000,thenextstateofa4-bitup/downcounterintheDOWNmodeis0111.

A:錯B:對

答案:對Successfulapproximationisananalog-to-digitalconversionmethod.

A:對B:錯

答案:錯Fan-outisthenumberofsimilargatesthatagivengatecandrive.

A:錯B:對

答案:錯Aserialshiftregisteracceptsonebitatatimeonasingleline.

A:對B:錯

答案:對Ashiftregistercannotbeusedtostoredata.

A:錯B:對

答案:錯TwotypesofDACarethebinary-weightedinputandtheR/2Rladder.

A:對B:錯

答案:對AflashADCdiffersfromasimultaneousADC.

A:對B:錯

答案:錯AddressmultiplexingcanreducethenumberofpinsintheICpackage.

A:對B:錯

答案:對Adecadecounterhastwelvestates.

A:錯B:對

答案:錯MIPSstandsformemoryinstructionspersecond.

A:錯B:對

答案:錯Ashiftregistercounterisashiftregisterwiththeserialoutputconnectedbacktotheserialinput.

A:錯B:對

答案:對SynchronouscounterscannotberealizedusingJ-Kflip-flops.

A:對B:錯

答案:錯Insynthesis,anetlistwillbegeneratedtodescribethecircuitcompletely.

A:對B:錯

答案:對Aringcounterusesoneflip-flopforeachstateinitssequence.

A:對B:錯

答案:對OneofthemajorapplicationsofSRAMsisincachememoriesincomputers.

A:對B:錯

答案:對InFPGAdesign,thestepthat“maps”thedesign