嵌入式秒表的設(shè)計(jì)

1、嵌入式系統(tǒng)及應(yīng)用 秒表設(shè)計(jì)專(zhuān) 業(yè)： 班 級(jí)： 姓 名： 學(xué) 號(hào)： 201*年*月一、設(shè)計(jì)要求1、 秒表計(jì)時(shí)范圍0999.999秒；2、 計(jì)時(shí)值采用字符型LCD顯示；3、 具有計(jì)時(shí)開(kāi)始、停止、復(fù)位等功能。4、 設(shè)計(jì)中時(shí)鐘輸入采用驗(yàn)證電路板上的50MHz作為基準(zhǔn)；5、 程序設(shè)計(jì)盡可能考慮模塊化、參數(shù)化設(shè)計(jì)思想，并遵循基本的格式規(guī)范，添加適當(dāng)?shù)淖⑨尲拔臋n說(shuō)明；6、 采用模塊化設(shè)計(jì)方式，底層模塊必須進(jìn)行功能仿真；7、 編寫(xiě)設(shè)計(jì)總結(jié)報(bào)告。二、設(shè)計(jì)原理數(shù)字鐘的讀數(shù)電路是用兩個(gè)六十進(jìn)制和一個(gè)二十四進(jìn)制(或十二進(jìn)制)計(jì)數(shù)器實(shí)現(xiàn)的。六十進(jìn)制計(jì)數(shù)器應(yīng)由一個(gè)十進(jìn)制計(jì)數(shù)器與一個(gè)六進(jìn)制計(jì)數(shù)器組成，分別對(duì)秒(或分)的個(gè)位

2、和十位進(jìn)行計(jì)數(shù)。本實(shí)驗(yàn)用二十四進(jìn)制計(jì)數(shù)器作為“時(shí)”位計(jì)數(shù)器，它的計(jì)數(shù)序列是00，01，02，23，00，也就是當(dāng)計(jì)數(shù)器計(jì)到23時(shí)59分59秒時(shí)，若再輸入一個(gè)秒脈沖，計(jì)數(shù)器就進(jìn)到00時(shí)00分00秒。數(shù)字鐘計(jì)數(shù)電路的設(shè)計(jì)可用反饋歸零法。當(dāng)計(jì)數(shù)器正常讀數(shù)時(shí)，反饋門(mén)不起作用，只有當(dāng)進(jìn)位脈沖到來(lái)時(shí)，反饋信號(hào)隨即將計(jì)數(shù)電路清零，實(shí)現(xiàn)相應(yīng)模的循環(huán)計(jì)數(shù)。以六十進(jìn)制為例，當(dāng)計(jì)數(shù)器從00,01,02，,59計(jì)數(shù)時(shí)，反饋門(mén)不起作用，只有當(dāng)?shù)?0個(gè)脈沖到來(lái)時(shí)，反饋信號(hào)隨即將計(jì)數(shù)電路清零，實(shí)現(xiàn)模為60的循環(huán)計(jì)數(shù)。通過(guò)對(duì)設(shè)計(jì)題目的分析，我將整體電路劃分為5個(gè)子電路來(lái)設(shè)計(jì)，及分頻、按鍵處理、時(shí)間計(jì)數(shù)、數(shù)據(jù)選擇和顯示模塊，而

3、且還設(shè)置了復(fù)位信號(hào)，隨時(shí)可以對(duì)電路進(jìn)行復(fù)位。1）分頻模塊通過(guò)對(duì)主頻信號(hào)50MHZ的分頻來(lái)得到所需的1000HZ的時(shí)鐘信號(hào)，并將此作為之后子電路的標(biāo)準(zhǔn)時(shí)鐘，實(shí)現(xiàn)同步電路的要求，主要采用的是計(jì)數(shù)的方法，當(dāng)寄存器記滿(mǎn)50000時(shí)產(chǎn)生輸出脈沖；2）按鍵處理模塊通過(guò)對(duì)SW1按鍵的判別，并采用雙D寄存器的應(yīng)用，在標(biāo)準(zhǔn)時(shí)鐘的觸發(fā)下產(chǎn)生starop脈沖，通過(guò)判別starop脈沖是否有高電平使mode信號(hào)發(fā)生高低電平的翻轉(zhuǎn)，mode為高電平時(shí)允許計(jì)數(shù)，為低電平時(shí)停止計(jì)數(shù)；3）時(shí)間計(jì)數(shù)模塊以10進(jìn)制計(jì)數(shù)器為基礎(chǔ)，10計(jì)數(shù)器設(shè)置了en_in的接收進(jìn)位和en_out產(chǎn)生進(jìn)位，實(shí)現(xiàn)了全加器的功能；然后用10進(jìn)制的計(jì)數(shù)器

4、產(chǎn)生了100進(jìn)制的，再而產(chǎn)生8位10進(jìn)制的計(jì)數(shù)器子電路，取其中的低7位完成計(jì)數(shù)模塊子電路的設(shè)計(jì)；4）數(shù)據(jù)選擇模塊式通過(guò)安檢處理模塊中產(chǎn)生的mode信號(hào)和SW2按鍵對(duì)計(jì)數(shù)器產(chǎn)生的數(shù)據(jù)進(jìn)行處理，當(dāng)mode為高電平的時(shí)候?qū)⒂?jì)數(shù)器的產(chǎn)生的結(jié)果存入lcd_data_in寄存器中；為低電平時(shí)，lcd_data_in內(nèi)容保持不變；SW2為高電平時(shí)進(jìn)行清零操作，使得lcd_data_in寄存器中的內(nèi)容全部清零。5）顯示模塊是運(yùn)用LCD顯示器的顯示原理，將lcd_data_in寄存器中的數(shù)據(jù)按4位一組的模式賦值給lcd_data_out 8位寄存器的低4位，高四位為4b 0011，選擇的是數(shù)字字庫(kù)，實(shí)現(xiàn)LCD的

5、數(shù)據(jù)輸入，并且產(chǎn)生RS,RW,en,cont這4位控制信號(hào)，控制LCD的顯示。三、實(shí)驗(yàn)程序1）頂層文件module ms_clock(clk_50M,SW1,SW2,SW3, /SW1暫停/繼續(xù) SW2清零 SW3復(fù)位 lcd_data_out,RS,RW,en,cont ); input clk_50M;/系統(tǒng)時(shí)鐘 input SW1,SW2,SW3; /按鍵output7:0 lcd_data_out; output RS,RW; output en,cont; wire clk_50M; wire SW1,SW2,SW3; wire clk_1000; wire 3:0 ms_1,ms_

6、2,ms_3,s_1,s_2,s_3,s_4; wire 27:0 lcd_data_in;wire 7:0 lcd_data_out; wire mode; wire starop;/分頻模塊,把50MHZ的時(shí)鐘分頻為1000HZ用于計(jì)數(shù)器計(jì)數(shù) f_div m1(clk_50M,SW3,clk_1000);/按鍵處理模塊 anjian m2(clk_1000,SW3,SW1,mode,starop);/時(shí)間計(jì)數(shù)主模塊 time_counter m3(mode,clk_1000,SW3, ms_1,ms_2,ms_3,s_1,s_2,s_3,s_4);/數(shù)據(jù)選擇模塊 kongzhi m4(cl

7、k_1000,SW3,SW2,mode,ms_1,ms_2,ms_3,s_1,s_2,s_3,s_4, lcd_data_in);/顯示模塊 display m5(clk_1000,SW3,lcd_data_in,lcd_data_out, RS,RW,en,cont);endmodule 2）按鍵處理模塊module anjian(clk,rst,SW1,mode,starop); input clk,rst,SW1; output mode,starop; wire starop; reg 1:0 DQ1; reg mode; always (posedge clk or negedge

8、rst) if (rst) DQ1=2'b00; else DQ1<=DQ10,SW1; assign starop=DQ10&DQ11; always (posedge clk or negedge rst) if (rst) mode <= 1'b0; else if(starop) mode <= mode; endmodule編譯結(jié)果：仿真： 3）分頻模塊module f_div(clk_50M,clr,clk_1000); input clk_50M; input clr; output clk_1000; reg clk_1000; reg

9、 15:0 cnt_div; always (posedge clk_50M or negedge clr) begin if(clr) begin /復(fù)位信號(hào) cnt_div <= 16'b0; end else if(cnt_div = 49999) begin clk_1000 <= clk_1000; cnt_div <= 16'b0; end else begin cnt_div <= cnt_div+1'b1; end end endmodule編譯結(jié)果：仿真：4）數(shù)據(jù)選擇模塊module kongzhi(clk,rst,clear,

10、mode,ms_1,ms_2,ms_3,s_1,s_2,s_3,s_4, lcd_data_in); input 3:0 ms_1,ms_2,ms_3,s_1,s_2,s_3,s_4; input clear,mode,clk,rst; output 27:0 lcd_data_in; reg 27:0 lcd_data_in; always (posedge clk or negedge rst) begin if(rst) begin lcd_data_in 27:0 <=28'b0; end else if (clear) /clear begin lcd_data_in

11、27:0 <=28'b0; end else /no action begin case(mode) 1'b1: /start begin lcd_data_in3:0<= ms_1; lcd_data_in7:4<= ms_2; lcd_data_in11:8<= ms_3; lcd_data_in15:12<= s_1; lcd_data_in19:16<= s_2; lcd_data_in23:20<= s_3; lcd_data_in27:24<= s_4; end 1'b0: /stop begin lcd_da

12、ta_in27:0<=lcd_data_in27:0; end endcase end end endmodule編譯結(jié)果：仿真：5）時(shí)間計(jì)數(shù)模塊module time_counter(EN,clk,clr,ms_1,ms_2,ms_3,s_1,s_2,s_3,s_4); input EN,clk,clr; output 3:0ms_1,ms_2,ms_3; output 3:0s_1,s_2,s_3,s_4; wire en1,en2,en3,en4; wire 3:0s_5; counter_1 U0(EN,clk,clr,ms_1,ms_2,en1); counter_1 U1(e

13、n1,clk,clr,ms_3,s_1,en2); counter_1 U2(en2,clk,clr,s_2,s_3,en3); counter_1 U3(en3,clk,clr,s_4,s_5,en4);endmodule a. counter_1子電路module counter_1(EN,clk,clr,ms_1,ms_2,EO);input clk,clr,EN;output 3:0 ms_2;output 3:0 ms_1;output EO; wire ld,en1,en2; assign ld=1'b0; assign EO=en2; cont_10 u0(clk,clr

14、,ld,EN,ms_1,en1); cont_10 u1(clk,clr,ld,en1,ms_2,en2);endmoduleb. cont_10子電路module cont_10(clk,rst,ld,en_in,data_out,en_out);input clk,rst,ld,en_in;output 3:0data_out;output en_out;reg 3:0data_out;assign en_out=en_in & data_out3 & data_out0;always(posedge clk or negedge rst)if(rst) data_out&

15、lt;=4'b0000;else if(ld) data_out<=4'b0000;else if(en_in) begin if(data_out3 & data_out0) data_out<=4'b0000; else data_out<=data_out+1'b1; endendmodule編譯結(jié)果：仿真：6）顯示模塊module display(clk,rst,lcd_data_in,lcd_data_out,RS,RW,en,cont); input clk,rst; input 27:0 lcd_data_in; outp

16、ut7:0 lcd_data_out; output RS,RW; output en,cont; wire en_out; reg RS,RW; reg3:0 count; reg7:0 lcd_data_out; reg3:0 state; wire clk_out,clk_en,cont; reg en_tmp; parameter Warmup = 4'b0000, Funcset = 4'b0001, Dspoff = 4'b0011, Clsdsp = 4'b0010, Modeset = 4'b0110, Dspon = 4'b01

17、11, Setaddr1 = 4'b0101, Indata1 = 4'b0100, Setaddr2 = 4'b1101, Indata2 = 4'b1100, Idle = 4'b1000; clkdiv U1(clk,clk_out); assigncont = 1'b0; always (posedge clk or negedge rst) if(!rst) en_tmp<=0; else en_tmp<=clk_out; assign en= clk_out &en_tmp; assign clk_en = en_

18、tmp & clk_out; always(posedge clk or negedge rst) begin if(!rst) begin count<=0; state<=Warmup; end else begincase(state) Warmup: begin if(clk_en) begin if(count=4'b0111)beginstate<=Funcset;count<=0;endelsebeginstate<=Warmup;count<=count+4'b0001;end end endFuncset: begi

19、n if(clk_en) begin if(count=4'b1111)beginstate<=Dspoff;count<=0;endelsebeginstate<=Funcset;count<=count+4'b0001;endend endDspoff: state<=Clsdsp;Clsdsp: begin if(clk_en) beginif(count=4'b0101)beginstate<=Modeset;count<=0;endelsebeginstate<=Clsdsp;count<=count+4&

20、#39;b0001;end end end Modeset: begin if(clk_en) state<=Dspon; endDspon: begin if(clk_en) beginif(count=4'b0100)beginstate<=Setaddr1;count<=0;endelsebeginstate<=Dspon;count<=count+4'b0001;endend endSetaddr1: begin if(clk_en) state<=Indata1; endIndata1: begin if(clk_en) begin

21、if(count=4'b1101)beginstate<=Setaddr2;count<=0;endelsebeginstate<=Indata1;count<=count+4'b0001;endend endSetaddr2: begin if(clk_en) state<=Indata2; endIndata2: begin if(clk_en) beginif(count=4'b1001)beginstate<=Setaddr1;count<=0;endelsebeginstate<=Indata2;count<

22、;=count+4'b0001;endend end default:state<=Warmup; endcase endendalways (state or count or lcd_data_in)begincase(state)Warmup: beginRS<=0;RW<=0;lcd_data_out<=8'b00000000;endFuncset:lcd_data_out<=8'b00111000;Dspoff: lcd_data_out<=8'b00001000;Clsdsp: lcd_data_out<=8

23、'b00000001;Modeset:lcd_data_out<=8'b00000110;Dspon: lcd_data_out<=8'b00001100;Setaddr1:beginRS<=0;RW<=0;lcd_data_out<=8'b10000000;endIndata1:beginRS<=1;RW<=0;case(count)4'b0000:lcd_data_out<=4'b0011,lcd_data_in27:24;4'b0001:lcd_data_out<=4'b

24、0011,lcd_data_in23:20;4'b0010:lcd_data_out<=4'b0011,lcd_data_in19:16;4'b0011:lcd_data_out<=4'b0011,lcd_data_in15:12; 4'b0100:lcd_data_out<=8'b00101110;4'b0101:lcd_data_out<=4'b0011,lcd_data_in11:8;4'b0110:lcd_data_out<=4'b0011,lcd_data_in7:4;4&#

25、39;b0111:lcd_data_out<=4'b0011,lcd_data_in3:0; 4'b1000:lcd_data_out<=8'b00100000;4'b1001:lcd_data_out<=8'b00100000;4'b1010:lcd_data_out<=8'b00100000;4'b1011:lcd_data_out<=8'b00100000; 4'b1100:lcd_data_out<=8'b00100000;default:lcd_data_out

26、<=8'b00100000;endcaseendSetaddr2:beginRS<=0;RW<=0;lcd_data_out<=8'b11000000;endIndata2:beginRS<=1;RW<=0;case(count)4'b0000:lcd_data_out<=8'b00100000;4'b0001:lcd_data_out<=8'b00100000;4'b0010:lcd_data_out<=8'b00100000;4'b0011:lcd_data_out<=8'b