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1、實(shí)驗(yàn)項(xiàng)目名稱:印刷電路板的設(shè)計(jì)學(xué)生姓名:試驗(yàn)時(shí)間:2014-3-28批改老師:戴勤實(shí)驗(yàn)學(xué)時(shí):4實(shí)驗(yàn)地點(diǎn):4-214實(shí)驗(yàn)成績:批改時(shí)間:2012-4-20實(shí)驗(yàn)項(xiàng)目4印刷電路板的設(shè)計(jì)一、實(shí)驗(yàn)?zāi)康暮鸵?、掌握通過手工方式和系統(tǒng)內(nèi)置的向?qū)?,新元件封裝的制作方法與操作步驟。2、掌握對元件封裝庫進(jìn)行管理的基本操作。3、掌握由原理圖生成網(wǎng)絡(luò)表4、理解電路板的物理邊界和電氣邊界的區(qū)別及繪制方法,了解由向?qū)呻娐钒宓倪^程。5、 重點(diǎn)掌握自動(dòng)布線規(guī)則的設(shè)置及自動(dòng)布線有關(guān)命令的使用,理解DRC校驗(yàn)的功能。6、 掌握幾種手工調(diào)整布線的操作技巧,如將焊盤或元件接入到網(wǎng)絡(luò)內(nèi)的操作步驟,對導(dǎo)線、焊盤或字符串進(jìn)行全局編輯

2、的操作方法等。二、實(shí)驗(yàn)儀器和設(shè)備已安裝Protel 99se軟件的PC 一臺(tái)三、實(shí)驗(yàn)內(nèi)容1、給出發(fā)光二極管的 SCH元件,如圖4.1所示。請繪制出其對應(yīng)的元件封裝,如圖4.2所示。兩個(gè)焊盤的 X-Size和Y-Size都為60mil,Hole Size為30mil,陽極的焊盤為方形,編號(hào)為A,陰極的焊盤為圓形,編號(hào)為K,外形輪廓為圓形,半徑為 120mil,并繪出發(fā)光指示。圖4.1發(fā)光二極管的SCH元件圖4.2發(fā)光二極管的PCB元件2、NPN型三極管的SCH元件,如圖4.3所示,其對應(yīng)元件封裝選擇TO-5,如圖4.4所示。由于在實(shí)際焊接時(shí),TO-5的焊盤1對應(yīng)發(fā)射極,焊盤 2對應(yīng)基極,焊盤 3

3、對應(yīng)集電極,它們之間存在引腳的極性不對應(yīng)問題,請修改TO-5的焊盤編號(hào),使它們之間的保持一致,并重命名為TO-5A。TO52C皐電總3E發(fā)射扱圖4.3 SCH元件3、通過封裝制作導(dǎo)向,繪制出實(shí)驗(yàn)二中元件圖4.4 PCB元件ICS512對應(yīng)的封裝 SOP-8,如圖4.5所示。焊盤的X-Size為80mil, Y-Size為24mil。第一引腳的焊盤為矩形,其余焊盤的兩端為半圓形??v向相鄰焊盤之間的距離為50mil,橫向相鄰焊盤之間的距離為220mil。圖4.5 SOP-8封裝4、通過封裝制作導(dǎo)向,繪制出實(shí)驗(yàn)二中開關(guān)DIPSW8對應(yīng)的封裝DIP-16,如圖4.6所示。焊盤的X-Size和Y-Siz

4、e均為50mil,Hole Size為30mil。第一引腳焊盤為方形,其余焊盤為圓形??v向相鄰焊盤之間的距離為100mil,橫向相鄰焊盤之間的距離為300mil。圖4.6 DIP-16封裝5、手工繪制二極管IN4007的封裝RAD-0.2。如圖4.7所示。兩個(gè)焊盤的 X-Size和Y-Size都為60mil,Hole Size為30mil,二極管陽極的焊盤為方形,陰極的焊盤為圓形,外形輪廓為距形,并繪出方向指示。圖4.7二極管的封裝 RAD-0.26、使用電路板生成向?qū)?,新建一個(gè)邊長為1500mil的正方形電路板,在電路板的四角開口,尺寸為100mil x lOOmil,無內(nèi)部開口,雙層板,過

5、孔不電鍍,使用針腳式元件,元件管腳間 只允許一條導(dǎo)線穿過,最小走線寬度為10mil,走線間距15mil。所使用元件如表 4.1所示。電氣原理圖和PCB布局如圖4.8所示。操作練習(xí)內(nèi)容如下:1)分別使用直接裝載和利用設(shè)計(jì)同步器兩種方法裝入網(wǎng)絡(luò)表和元件。2)分別使用群集式和統(tǒng)計(jì)式兩種方法進(jìn)行自動(dòng)布局,并使用手工方法對布局進(jìn)行調(diào)整。3)采用全局自動(dòng)布線。4)在電路板上添加三個(gè)焊盤,標(biāo)注為VCC、GND和CLK ,并把他們連入相應(yīng)的網(wǎng)絡(luò)。表4.1元件一覽表元件名稱元件標(biāo)號(hào)元件所屬SCH庫元件封裝元件所屬PCB庫RES2R1、R2Miscellaneous Devices.ddbAXIAL0.4Advp

6、cb.DdbCAPC1Miscellaneous Devices.ddbRAD0.1Advpcb.DdbCRYSTALY1Miscellaneous Devices.ddbXTAL1Advpcb.Ddb74LS00U1A、U1B、U1CProtel DOS Schematic Libraries.ddbDIP14Advpcb.DdbX 二 0口蘭 " 人 二壬 口cs1LCi ¥1j 1 iR2 -I 卜 LK辰 1 LOOM 1異1卜IK圖4.8 電氣原理圖和 PCB布局圖7、使用電路板生成向?qū)?,新建一個(gè)邊長為1800mil的正方形電路板,在電路板的四角開口,尺寸為100

7、mil x lOOmil,無內(nèi)部開口,雙層板,過孔電鍍,使用針腳式元件,元件管腳間只允許一條導(dǎo)線穿過,最小走線寬度為20mil,走線間距15mil。加載Advpcb.ddb元件封裝庫,所使用元件如表4.2所示。電氣原理圖和 PCB布局如圖4.9所示。操作練習(xí)內(nèi)容如下:1 )利用設(shè)計(jì)同步器裝入網(wǎng)絡(luò)表和元件。2)先對集成電路555進(jìn)行預(yù)布局(以555為布局的中心),再使用群集式方法進(jìn)行自動(dòng)布局,并使用手工方法對布局進(jìn)行調(diào)整。3 )先對電阻R1進(jìn)行手工預(yù)布線,然后再采用自動(dòng)布線完成其它布線任務(wù)。4)采用全局編輯,對電源和接地的走線線寬變?yōu)?0mil。表4.2 元件一覽表元件名稱元件標(biāo)號(hào)元件所屬SCH

8、庫元件封裝元件所屬PCB庫RES1R1、R2Miscellaneous Devices.ddbAXIAL0.3Advpcb.DdbCAPC1、C2Miscellaneous Devices.ddbRAD0.1Advpcb.DdbUA555U1Protel DOS Schematic Libraries.ddbDIP8Advpcb.Ddb4HEADERJP1Miscellaneous Devices.ddbPOWER4Advpcb.Ddb設(shè)置為板長1800mil,寬1200mil,按照電路的功能進(jìn)行元件的手工布局與調(diào)整,可參照圖4.10的布局。C4CL C2Y1., u I;U2口U13 艮=L

9、J= £3R1叵可C6J1四、實(shí)驗(yàn)結(jié)果與分析D:Program Files'gjj designPt.ddblacementToolsPt.ddb|實(shí)驗(yàn)4發(fā)光二極管PCB八、MT肝X ®TopLayer / BottomLaw .MeehComp>onentPlacment XD:Program Filesgjj designPt.ddbPt.ddb |實(shí)驗(yàn)4因發(fā)光二極管PCB |Advpcb.ddb 竊 PCB Footprints.lib-(D:Program Filesgjj designPt.ddEdit View Place Tools Report

10、s Window HelpDlaceAdd:BPLddb ;實(shí)驗(yàn)4 & PCBLIB1.LIB!:+# C二? T 嚴(yán)。/>、介G) 口號(hào)-D:Program Filesgjj designPt.ddbjEdit View Place Tools Reports Window HelpQ Q # S > r>: + 井廠 c ?I 們Ptddb| 實(shí)驗(yàn)4PCBLIB1.LIB |Design Explorer - D:Program Filesgjj designPtddb> File Edit View Place Tools Reports Window H

11、elp陥pp©#Components發(fā)光二極管3rowse PCBLibPt.ddb| 實(shí)驗(yàn)4 PCBLIB1.LIBPCBLibPlacementTools x、 T +10-10 XComp on ent WizardEdge ConnectorsmiiiiiiiiiiiliumLeadless Chip Carrier (LC<iliumImperial (mSelect a< Rack 膽ext >|(Select from the list the pattern of the componenl wish to create :Dual in-line

12、Package (DIPLddb| 實(shí)驗(yàn)4 觀 PCBLIB1 丄IBDiodesWhat unit would you like to use to describe thisOls XJO.'O £ OGO(D:Program Files'" designPt.ddb:Edit View Place Tools Reports Window HelpPP©s::+ # “c?Pt.ddb 實(shí)驗(yàn)4 名 PCBLIB1.LIBPlaceAdd|D:Program Files® designPt.ddbEdit View Place Too

13、ls ReportsWindow Help侈貝 3:S :Jj: +井 me?Ptddb| 實(shí)驗(yàn)4 竊 PCBLIB1.LIB| Design Explorer D:Program Filesgjj designPtddb多 File Edit View Place Tools Reports Window Help惱 :>: + # g = 2DIM 6Browse PCBLibPCBLIB1.LIBPt.ddbPIacpSOP-8T0-5A發(fā)光二極管ComponentsMasiPCBLibPlacementTools蚩 FileEdit View PlaceTools Reports

14、Window Help啟is孕八門:>: +井 G c 2RpnmpBrowse PCBLibDIP-16RAD0.2PCBLIB1.LIBPt.ddbPCBLibPlacementToolsS0P8T0-5A發(fā)光二極管ComponentsMasF*、 T +'0-10 §(?eoG)口 臨9 Q 彳、:M +制韻 ?卜如劃障燈c ?gjjwnedangPt.ddbPt.ddb 口 WJJ |j E:gjjwnedangPt.ddbRddb WJJ:gjjwnedangPt.ddbPtddb 口 WJJE:gjjwnedangPt.ddbPt.ddb _J WJJ蚩 D

15、:Program Filesgjj design'PtddbPt.ddb I 實(shí)驗(yàn)4 曲 PCB2.PCB Sheetl.SchPt.ddb 實(shí)驗(yàn)4 曲 PCB2.PCBLoad/Forv/ard Annotate Net listNetlist |This operation brings the schematic design data into the PCB workspace using a netlist file. If you are loading a nellist for the first time Netlist Macros are created for

16、 the entire netlist If you are Forward Annotating your design Netlist Macros are created for each design change You can modify, add and delete Netlist Macros to include or omit particular design changes. Note: comp on ents are matched by designator only.Netlist F|No Netlist FileDelete components not

17、 ii r Update footprNo.StatusActionErrorAdvanced.No netlist file specifiedExecuteCancel II HelpSelectLoad/ForwarDatabaseNetlist|Pt.ddbNetlist FiNo. ActStatusAdvanced.:Program Filesgjj designPt.ddbIdb | 實(shí)驗(yàn)4 ad PCB2.PCB I Sheetl.SchB e Pt.ddb由 口 WJJ自口披4Sbeetl.ERCThis opera you are loe are For wan can m

18、odifu componeniT| Add |Sheetl.NETDocument Ki|Text DocumentQK | Cancel | Help | |ogram Filesgjj designPt.ddbPCB2.PCB I Sheet! .Sch藩 D:Program Alesgj designPt.ddbR.ddb I 實(shí)嶺4PCB1.PCB |acemenffoolsx r t嚴(yán);?勿ComponentPlacement x 昌宜自| QOo燈辱 晰與業(yè)骨強(qiáng)辭 S3側(cè)輯畫囚超PreferencesIt Cluster PlacStatistical PIr <E:e r

19、T嚴(yán)x選因Ciuster-tased autoplacer 一 groups cexponents into clustersby connectivty: then places clusters"一 U D:Program Filesgj designPt.ddb雪肆0 Qooooo 圜 «3IOOJ-ft04 toDAuto PlacePt.ddb I 實(shí)時(shí)4 PCB1.PCB ntToolsQuick Component Pla«OKCancelHelpy D:Program Filesgjj designPt.ddbPt.ddb | 實(shí)驗(yàn)4 Sd PCB

20、1.PCB;mi 1)ClUlel 74LS00R2一禾一»:Program Filesgjj designPt.ddbjdb 實(shí)驗(yàn)4PCB1.PCBU1Auto PlacePreferences74LSeGrid SizeStatistical-based autoplacer - places to ainiaize connectionStatistics! PI lengths Uses a statistical alsorithai so isCluster Pla(0 Group Componentspower Net$|2 Rotate ComponentsGroun

21、d NeR2IK耀 D:Program Filesgjj designPt.ddbPt.ddb| 實(shí)驗(yàn)4 30 PCB1.PCB蠻 D:Program Filesgjj designPt.ddbPt.ddb | 實(shí)驗(yàn)4 20 PCB1.PCB |U1e7亠L(fēng)SOO IKIK'Program Files'gjj designPtddb db | 實(shí)驗(yàn)4 PCB2.PCB帯 Sheetl.SchF D:Program Filesgjj designPt.ddb 九ddb | 實(shí)驗(yàn)4 30 PCB2.PCB |ClY1Routing PassesAutorouter SetuManu

22、facturinq PassesRouter Passes0啟17MemoryFan Out Used SMD PinsPatternShape Router - Push AndShape Router - Rip UpClean During Routin Clean After Routing Evenly Space Track Add TestpointsPre-routesRouting GridLock All Pre-routeSet the preferred routing grid to suit the track and clearance requirements.

23、 Advanced Route will analyze the board and advise if this grid is inappropriate.Route AllQ000z r-11EPtddb | 實(shí)驗(yàn)4 30 PCB2.PCB Sheet!.Sch手辭 D:Program Filesgjj designPtddb-J Clo丄Y1jj Fek夠盂0穢鳥、J U匚4CD©1 o卞注裁1沙IK>gram Filesgjj design'PtddbNetlistNo.ActionErrorStatusAdvanced.!Execute:CancelHelp

24、Program Filesgjj designPtddblb | 實(shí)驗(yàn)4 因 PCB2.PCB | Sheetl.SchThis operation brings the schematic design data into the PCB workspace using a netlist file. If you are loading a netlist for the first time Netlist Macros are created for the entire netlist If you are Forward Annotating your design Netlist

25、 Macros are created for each design change. You can modify, add and delete Netlist Macros to include or omit particular design changes. Note: components are matched by designator only.Netlist FjSheetl .NET (Pt.ddb)RrowseDelete components not ii 廠 Update footprogram Filesgjj design'Ptddb| 實(shí)驗(yàn)4 30

26、PCB2.PCB | Sheetl.SchelNetiist Managerj PropertiesNet ClassesNet NamCLKPins in other netsR1-2 NetR1 R2-1 NetC1R2-2 NetY1U1-1 NetU1U1-2 NetU1U1-3 NetU1U1-4 NetR1U1-5JNetR1U1-7 |GND242113Nets In Class'I 2Pins In NeU1-8 NetY1_2Ul-9 NetC1_2Pins in netU1-6 INetU1_6CancelHelpOKEdit.CloseU174LS005e丄%9

27、Je . 1® 5e®®RlD:Program Filesgjj designPt.ddbddb I 實(shí)驗(yàn)4 ,B®ttjSBuittiI2B1.PCB PCB2.PCB PCBUB1.UB Placel.Plc Place2.Plc Place3.Plc Place4.Plc Place5.Plc Place蚩 D:Program Filesgjj designPt.ddbPt.ddb U 實(shí)驗(yàn)4PCB1.PCB PCB2.PCB PCBUB1.UB Placel.Plc Place2.Plc Place3.Plc Place4.Plc Place5.

28、Plc PBoard WizardSheet2.SchWidth |1800mil 旦eight l800milG Rectangu廠 CirculCusto17 Title Block and S( V Legend Strir V Corner CutolP Dimension L 廠 Inner CutOff< BackI Next > ICanceleet2.Sch'D:Program Filesgjj designPt.ddbt.ddb O 實(shí)臉4 |©&®Bttjtfj圏>CB1.KB PCB2.PCB PCBUB1.UB Pl

29、acel.PIc Place2.Plc Place3.Plc Place4.Plc Place5.Plc PlD:Program Filesgj|j designPt.ddb.ddb -J 實(shí)驗(yàn)4 |OO®ffijttjB8tfjCBl.PCB PCB2.PCB PCBUB1.UB Placel.Plc Place2.Plc Place3.Plc Place4.Plc PlaceS.Plc Phneet2.SchD:Program Filesgjj designPt.ddbt.ddb I 頭驗(yàn)40葡圏圏圜圜圜>CB1.PCB PCB2.PCB PCBUB1.UB Placel.

30、PIc Place2.Plc Place3.Plc Place4.Plc Place5.Plc Plheet2.SchXPrcgram Filesgjj designPt.ddb:db 實(shí)驗(yàn)4 | PCB3.PCB 斎 Sheet2.Schy D:Program FilesXgjj designPt.ddbR.ddb 實(shí)驗(yàn)4 Sheet2.Sch 因 PCB3.PCB ogram Filesgjj designPt.ddbTop LayerProperties | Designator | Comment |OK |HelpCancelGlobal »b 實(shí)驗(yàn)4 Sheet2.Sch

31、 PCB3.PCBDesignator U1 Comment Footprint Layer RotationX - Location|3880milY - Location 3871.981 mil Lock Prims V Locked! V Selectionam Filesgjj designPt.ddb:驗(yàn)4 | Sheet2.Sch 別 PCB3.PCB |Auto PlacePreferences( Cluster Plac Clusterbased autoplacer - groups cooponents into clustersC Statistical Ph = -

32、- :ectivt:- then places t-erzQuick Component PlaiCancelHelp越 D:Program Filesgjj designPt.ddbPt.ddb 實(shí)驗(yàn)4 Sheet2.Sch 別 PCB3.PCB4HEADERx迤勿I MOess氐跖西1GNDC=J:niO-DD:Program Filesgjj designPt.ddbPt.ddb 實(shí)驗(yàn)4 Sheet2.Sch PCB3.PCBZJP1 U1 OlU Oe 01 u D:Program Filesgjj designPt.ddbPt.ddb 實(shí)驗(yàn)4 Sheet2.Sch 30 PCB3.P

33、CB1C2O.Oluyi wo -J 000JP11GND'C2U1 UA555z4HEADERR1R1 IKCle e0. Olu 0.01 uW D:Program FilesXgjj designPt.ddbPt.ddb | 實(shí)驗(yàn)4 | Sheet2.Sch PCB3.PCBogram Filesgjjj designPt.ddb| 實(shí)驗(yàn)4 | Sheet2.Sch PCB3.PCBTrackProperties |Attributes To Match ByWidthLayer24HEADENetLockedSelectionStartStart-VEnd-XEnd-YKeep

34、outOKCancel|30mil |BottomLayer vcc 廠WidthLayerNetLockedSelectionStartStart-YEnd-XKeepoutCop&,HelpChange ScopeAll FREE primitives亜 aPt.ddb | 實(shí)驗(yàn)4 30 PCB4.PCB | PCB2.PCB | WJJ zhudianlu.prj |1 B B B B0%Qfl刃TJ30如CI C2 rimuY11Q匚ZlR2 匚zrLddb| 實(shí)驗(yàn)4 國 PCB.PCB WJJ zhudianlu.pf | PCB2.PCB五、思考題1、SCH元件庫與PCB元件庫有何區(qū)別?如何解決 ProteI中存在的元件引腳編號(hào)不

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