TFT LCD 驅(qū)動(dòng)原理與系統(tǒng)

1、TFT LCD 驅(qū)動(dòng)原理與系統(tǒng)TFT LCD 驅(qū)動(dòng)原理與系統(tǒng) 液晶及液晶顯示器簡(jiǎn)介 TFT LCD 驅(qū)動(dòng)原理 影響TFT LCD 畫面品質(zhì)的因素 TFT LCD Driver IC LCD 數(shù)位界面簡(jiǎn)介 背光板簡(jiǎn)介 未來(lái)趨勢(shì)與走向被動(dòng)式/主動(dòng)矩陣式液晶顯示器Passive/Active Matrix LCDYelectrodeXelectrodePixelThe Color Pixel of TFT LCDColor Filter SubstrateTFT SubstrateWhite LightColor LightRGBBGRClcClcClcArrangement of Color Fi

2、lterR G B R G BR G B R G BR G B R G BGRBGRBG RBRBG RBGRBGR G R GGBGBR G R GGBGBR G R GW B W BR G R GW B W BStripeTriangleGRBGRBG RBGRBGMosaicAperture Ratioa-SiDrain electrodeGate electrodeInsulatorSource electroden+ a-SiAdjacent gate electrodeInsulator (dielectric substance)Display electrodesTFT pix

3、elEffective area: 40.7%CapacitorTFT LCD 驅(qū)動(dòng)基本驅(qū)動(dòng)波形極性反轉(zhuǎn)(polarity inversion) - Frame, row, column, dot電容耦合驅(qū)動(dòng) - 二階,三階,四階Timing Chart of TFT LCDSFrame TimeTimeGate123N1HTFTL LCDS Driving Method 123451+2+3+4+5+ 1234512345 123451+23+45+ 1234512+34+5 123451+2+3+4+5+ 123451+2+3+4+5+ 123451+2+3+4+5+ 123451+2+3

4、+4+5+FrameNColumnsFrameN+1ColumnsFrameNColumns FrameN+1ColumnsColumnInversionDotInversionFrameNColumnsFrameN+1ColumnsFrameNColumns FrameN+1ColumnsFrameInversionRowInversionDirect Driving of TFT LCDsDCBiasofCommon1 Frame / 1 LineGaryScal VoltageV63V62.V1V0V0V1.V62V63Vcom Ac ModulationAddressing of TF

5、T LCDs1 Frame / 1 LineCommonWaveformGraylevelVoltageV0V0 V1V1V2V2V63V62V62V63Direct Driving Vs Vcom Modulation Direct Driving Frame , Row , Column & pixel inversion available Cancel crosstalk & remove flicker ：image quality Improve Power dissipation Vcom Modulation Available Frame & Row

6、inversion Poor Power dissipation影響 LCD 畫面品質(zhì)的因素 Horizontal Crosstalk Vertical Crosstalk Shading Crosstalk液晶電容的效應(yīng) 液晶電容CLC會(huì)隨液晶作用電壓的改變而變化，因此在驅(qū)動(dòng)液晶時(shí)會(huì)有殘存的DC成份，其所造成的影響 Image Sticking. Picture Flicker. 液晶作用電壓大時(shí)，液晶分子趨向平行電場(chǎng)方向排列 液晶作用電場(chǎng)小時(shí)，液晶分子趨向垂直電場(chǎng)方向排列 Vp = Vgd Vgd Cgd VghlCgd + Cs + CCgd VghlCgd + Cs + CHorizo

7、ntal Line CrosstalkRGBCscCscCscColor Filter SubstrateBASignal of A LineSignal of B LineCommon WaveformDifference of Effective Voltage in B LineBlack LevelGray LevelGray LevelHorizontal Area CrosstalkBASignal of A LineSignal of B LineCommonWaveform V15m) Data-to-data skew tolerance 1 clock cycleTMDST

8、MDS (Transition Minimized Differential Signaling)is an interface standard based on PanelLink Technology developed by Silicon Image, Inc.SwingControlEncoder/SerializedPLLGraphicControllerTerminationControlRecovery/Decorder/DesirializerPLLLCDPanelDataDataDEDEControlsControlsClockClockTX1(Green)TX0(Blu

9、e)TX2(Red)Clock24524/365VCCVCCParallelData(CMOS)ParallelData(CMOS)TMDSI/FHostMonitorBlock Diagram of TNDSDVI DVI (digital visual interface) Promoted by DDWG Intel, IBM, HP, Compaq, NEC, Fujitsu, silicon image Dual channel TMDS Support VGA to QXGA Pixel clock：25mhz 330mhzDVIDVI:Molex 24 + 5 pin conne

10、ctor pin assignmentpinSignal AssignmentpinSignal AssignmentpinSignal Assignment1TMDS Data2-9TMDS Data1-17TMDS Data0-2TMDS Data2+10TMDS Data1+18TMDS Data0+3TMDS Data2/4 Shield11TMDS Data1/3 Shield19TMDS Data0/5 Shield4TMDS Data4-12TMDS Data3-20TMDS Data5-5TMDS Data4+13TMDS Data3+21TMDS Data5+6DDC Clo

11、ck14+5V power22TMDS Clock Shield7DDC Data15Ground(return for +5V,Hsync,and Vsync)23TMDS Clock+8Analog Vertical Sync16Hot Plug Detect24TMDS Clock-C1Analog RedC2Analog GreenC3Analog BlueC4Analog Horizontal HyncC5Analog Ground (analog R,G,&Breturn)Pin 1Pin 24Pin 8Pin 17C1 C2C4GVIF GVIF(gigabit video interface) Promoted by SONY Allows using small connector and long cable(10m) Only one pair differential signal used Support 24bit/pixel, XGA Pixel clock：25mhz 65mhz 400mv voltage swing DC balancing Using 2pair, support to SXGAC