(完整word版)svpwm源程序

1、/ TI File $Revision: /main/8 $/ Checkin $Date: April 21, 200815:41:53 $/#/ FILE: Example_2833xEPwmUpDownAQ.c/ TITLE:空間電壓矢量產(chǎn)生程序SVPWM/ ASSUMPTIONS:/ This program requires the DSP2833x header files./ Monitor ePWM1-ePWM3 pins on an oscilloscope as described/ below./EPWM1A is on GPIO0-5腳/EPWM1B is on GPI

2、O1-6腳/EPWM2A is on GPIO2-7腳/EPWM2B is on GPIO3-10腳/EPWM3A is on GPIO4-11腳/EPWM3B is on GPIO5-12腳/#/ $TI Release: DSP2833x/DSP2823x Header Files V1.20 $/ $Release Date: August 1, 2008 $ /#includeDSP28x_Project.h/ Device Headerfile and Examples Include File/ Prototype statements for functions found wi

3、thin this file. void InitEPwm1Example ( void );void InitEPwm2Example ( void ); void InitEPwm3Example ( void );voidsvpwmGen( void );interruptvoidsvpwm_isr( void );volatilefloatUalpha,Ubeta;volatilefloatA,B,C;volatilefloatT0,T1,T2,T3,T4,T5,T6;volatilefloatTaon,Tbon,Tcon;floatUa,Ub,Uc;floatTs;inta,b,c;

4、intN= 0,sector= 0;#defineTPRD 800#defineUdc 800voidmain ( void )/ Step 1. Initialize System Control:/ PLL, WatchDog, enable Peripheral Clocks/ This example function is found in the DSP2833x_SysCtrl.c file. InitSysCtrl();/ Step 2. Initalize GPIO:/ This example function is found in the DSP2833x_Gpio.c

5、 file and/ illustrates how to set the GPIO to its default state./ InitGpio(); / Skipped for this example/ For this case just init GPIO pins for ePWM1, ePWM2, ePWM3/ These functions are in the DSP2833x_EPwm.c file InitEPwm1Gpio();InitEPwm2Gpio();InitEPwm3Gpio();/ Step 3. Clear all interrupts and init

6、ialize PIE vector table:/ Disable CPU interrupts DINT;/ Initialize the PIE control registers to their default state./ The default state is all PIE interrupts disabled and flags/ are cleared./ This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl();/ Disable CPU interrupts and clear all

7、CPU interrupt flags: IER = 0x0000;IFR = 0x0000;/ Initialize the PIE vector table with pointers to the shell Interrupt/ Service Routines (ISR)./ This will populate the entire table, even if the interrupt/ is not used in this example. This is useful for debug purposes./ The shell ISR routines are foun

8、d in DSP2833x_DefaultIsr.c./ This function is found in DSP2833x_PieVect.c. InitPieVectTable();/ Interrupts that are used in this example are re-mapped to/ ISR functions found within this file.EALLOW;/ This is needed to write to EALLOW protected registersPieVectTable.EPWM1_INT = &svpwm_isr;/PieVectTa

9、ble.EPWM2_INT = &epwm2_isr;/PieVectTable.EPWM3_INT = &epwm3_isr;EDIS;/ This is needed to disable write to EALLOW protected registers/ Step 4. Initialize all the Device Peripherals:/ This function is found in DSP2833x_InitPeripherals.c/ InitPeripherals(); / Not required for this example/ For this exa

10、mple, only initialize the ePWMInitEPwm1Example();InitEPwm2Example();InitEPwm3Example();/ Step 5. User specific code, enable interrupts:/ Enable CPU INT3 which is connected to EPWM1-3 INT: IER |= M_INT3;/ Enable global Interrupts and higher priority real-time debug events:EINT;/ Enable Global interru

11、pt INTMERTM;/ Enable Global realtime interrupt DBGM/ Step 6. IDLE loop. Just sit and loop forever (optional): for (;)asm( NOP); /main結(jié)束/=interruptvoidsvpwm_isr( void )svpwmGen();/ adjust duty for output EPWM1A/ adjust duty for output EPWM2A/ adjust duty for output EPWM3A/voidInitEPwm1Example()/ Setu

12、p TBCLKEPwm1Regs.TBPRD = TPRD;/ TPRD=800,Period = 1600 TBCLK countsEPwm1Regs.TBPHS.half.TBPHS = 0;/ Set Phase register to zeroEPwm1Regs.TBCTR = 0x0000;/ Clear counter/ Setup counter modeEPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;/ Symmetrical modeEPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;/Master mod

13、uleEPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;/ Syncdown-stream module/ Setup TpwmEPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;/ Clock ratio to SYSCLKOUTEPwm1Regs.TBCTL.bit.CLKDIV = 5;/ 原為 TB_DIV1 ， 對(duì)于上下計(jì)數(shù)： Tpwm = 2 xTBPRD x TTBCLK Fpwm = 1 / (Tpwm)/Setup shadowingEP

14、wm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;/ load on CTR=ZeroEPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;/ load on CTR=Zero/ Set actionsEPwm1Regs.AQCTLA.bit.CAU = AQ_SET;/ set actions for EPWM1AEPwm1Regs.AQCTLA.bi

15、t.CAD = AQ_CLEAR;/ Set Dead-bandEPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;/ enable Dead-band moduleEPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;/ Active Hi complementaryEPwm1Regs.DBFED = 50;/ FED = 50 TBCLKsEPwm1Regs.DBRED = 50;/ RED = 50 TBCLKs/ Interrupt where we will change the Compare ValuesEPwm

16、1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;/ Select INT on Zero eventEPwm1Regs.ETSEL.bit.INTEN = 1;/ Enable INTEPwm1Regs.ETPS.bit.INTPRD = ET_3RD;/ Generate INT on 3rd event/*/*/voidInitEPwm2Example()/ Setup TBCLKEPwm2Regs.TBPRD = TPRD;/ TPRD=800,Period = 1600 TBCLK counts/ Set Phase register to zeroEPwm2

17、Regs.TBCTR = 0x0000;/ Clear counter/ Setup counter mode/ Symmetrical mode/ Slavemodule/ syncflow-through/ Setup Tpwm/ Clock ratio to SYSCLKOUT= 5;/For Up and Down Count-Tpwm= 2 x TBPRDx TTBCLK; Fpwm = 1 / (Tpwm)/EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;/ load on CTR=ZeroEPwm2Regs.CMPCTL.bit.LOAD

18、BMODE = CC_CTR_ZERO;/ load on CTR=Zero/ Set actionsEPwm2Regs.AQCTLA.bit.CAU = AQ_SET;/ set actions for EPWM2AEPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;/ Set Dead-bandEPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;/ enable Dead-band moduleEPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;/ Active Hi complementaryEPw

19、m2Regs.DBFED = 50;/ FED = 50 TBCLKsEPwm2Regs.DBRED = 50;/ RED = 50 TBCLKs/ Interrupt where we will change the Compare ValuesEPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;/ Select INT on Zero eventEPwm2Regs.ETSEL.bit.INTEN = 1;/ Enable INTEPwm2Regs.ETPS.bit.INTPRD = ET_3RD;/ Generate INT on 3rd event/ Set

20、 Compare valuesvoidInitEPwm3Example()/ Setup TBCLKEPwm3Regs.TBPRD = TPRD;/ TPRD=800,Period = 1600 TBCLK counts/ Set Phase register to zeroEPwm1Regs.TBCTR = 0x0000;/ Clear counter/ Setup counter mode/ Symmetrical mode/ Slavemodule/ syncflow-through/ Setup Tpwm/ Clock ratio to SYSCLKOUT= 5;/ForUp and

21、Down Count:Tpwm= 2 x TBPRDx TTBCLK; Fpwm = 1 / (Tpwm)/EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;/ load on CTR=ZeroEPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;/ load on CTR=Zero/ Set actionsEPwm3Regs.AQCTLA.bit.CAU = AQ_SET;/ set actions for EPWM3AEPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;/ Set Dead-ba

22、ndEPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;/ enable Dead-band moduleEPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;/ Active Hi complementaryEPwm3Regs.DBFED = 50;/ FED = 50 TBCLKsEPwm3Regs.DBRED = 50;/ RED = 50 TBCLKs/ Interrupt where we will change the Compare ValuesEPwm3Regs.ETSEL.bit.INTSEL = ET_CT

23、R_ZERO;/ Select INT on Zero eventEPwm3Regs.ETSEL.bit.INTEN = 1;/ Enable INTEPwm3Regs.ETPS.bit.INTPRD = ET_3RD;/ Generate INT on 3rd event/ Set Compare valuesvoidsvpwmGen( void )/clarkeUalpha= 0.6666667*(Ua-0.5*Ub-0.5*Uc);/ 0.8660254 = sqrt(3)/2Ubeta = 0.6666667*(0.8660254*Ub-0.8660254*Uc );/0.666666

24、7=2/3/sectorA= Ubeta;B= 1.7320508*Ualpha-Ubeta;C= -1.7320508*Ualpha-Ubeta;if(A= 0) a= 1;elsea= 0;if(B= 0) b= 1;elseb= 0;if(C= 0) c= 1;elsec= 0;N=a+2*b+4*c;switch(N)case 1: sector = 2;break ;case 2: sector = 6;break ;case 3: sector = 1;break ;case 4: sector = 4;break ;case 5: sector = 3;break ;case 6

25、: sector = 5;break ;default:break ;/TimeTs=2*TPRD; /Ts 為開關(guān)周期與載波周期（計(jì)數(shù)周期）相等 if (sector= 1)T1= 1.5*Ts*(Ualpha-0.5773503*Ubeta)/Udc;/0.5773503=1/sqrt(3)T2= 1.7320508*Ts*Ubeta/Udc;T0= Ts-T1-T2;if(T1+T2Ts)T1= T1*Ts/(T1+T2);T2= T2*Ts/(T1+T2);T0= Ts-T1-T2;elseif (sector= 2)T2= 1.5*Ts*(Ualpha+0.5773503*Ubeta)/Udc;T3= 1.5*Ts*(0.5773503*Ubeta-Ualpha)/Udc;T0= Ts-T2-T3;if(T2+T3Ts)T2= T2*Ts/(T2+T3);T3= T3*Ts/(T2+T3);T0= Ts-T2-T3;elseif (sector= 3)T3= 1.7320508*Ts*Ubeta/Udc;T4= 1.5*Ts*(Ualpha+0.5773503*Ubeta)/Udc;T0= Ts-T3-T4;if(T3+T4Ts)T3= T3*Ts/(T3+T4);T4= T