飛思卡爾MC9S12XS128單片機(jī)中斷優(yōu)先級設(shè)置簡易教程

1、本教程試圖用最少的時間教你飛思卡爾XS128單片機(jī)的中斷優(yōu)先級設(shè)置方法和中斷嵌 套的使用，如果是新手請先學(xué)習(xí)中斷的基本使用方法。先來看看XS128 Datasheet中介紹的相關(guān)知識，只翻譯有用的：Each of the I bit maskable interrupt requests can be assigned to one of seven priority levels supporting a flexible priority scheme. For interrupt requests that are configured to be handled by the CPU,

2、 the priority scheme can be used to implement nested interrupt capability where interrupts from a lower level are automatically blocked if a higher level interrupt is being processed. Interrupt requests configured to be handled by the XGATE module can be nested one level deep.七個中斷優(yōu)先級 Each 1 bit mask

3、able interrupt request has a configurable priority level and can be configured to be handled by either the CPU or the XGATE module2.每一個中斷源都有一個可以設(shè)置的級別1 bit maskable interrupts can be nested, depending on their priority levels.高優(yōu)先級中斷的可以嵌套低優(yōu)先級中斷After system reset all interrupt requests with a vector ad

4、dress lower than or equal to (vector base + OxOOF2) are enabled, are set up to be handled by the CPU and have a pre-configured priority level of 1. Exceptions to this rule are the non-maskable interrupt requests and the spurious interrupt vector request at (vector base + 0 x0010) which cannot be dis

5、abled, are always handled by the CPU and have a fixed priority levels. A priority level of 0 effectively disables the associated 1 bit maskable interrupt request.復(fù)位后可屏蔽中斷默認(rèn)優(yōu)先級為1If more than one interrupt request is configured to the same interrupt priority level the interrupt request with the higher

6、 vector address wins the prioritization.同一優(yōu)先級的中斷同時觸發(fā)時，高地址（中斷號較小）的中斷先響應(yīng)注意：高地址中斷只能優(yōu)先響應(yīng)，但不能嵌套同一優(yōu)先級低地址的中斷下面直接進(jìn)入正題，看看怎么設(shè)置中斷優(yōu)先級:XS128中包括預(yù)留的中斷一共有128個中斷位，如果為每個中斷都分配一個優(yōu)先級寄 存器的話會非常浪費(fèi)資源，因此飛思卡爾公司想出了這樣一種辦法：把128個中斷分為16 個組，每組8個中斷。每次設(shè)置中斷時，先把需要的組別告訴某個寄存器，再設(shè)置8個中 斷優(yōu)先寄存器的某一個，這樣只需9個寄存器即可完成中斷的設(shè)置。分組的規(guī)則是這樣的：中斷地址位7到位4相同的中斷為

7、一組，比如MC9SX128.h中#def i ne#def i ne#def i ne#def i ne#def i ne#def i ne#def i ne#def i neVReserved23VatdOVsc i 1VsciOVsp i 0Vtimpa i eVtimpaaovfVtimovfOxOOOOFffB?)OxOOOOFFD0 x0000FFD4OxOOOOFHD1DCOxOOOOFFOxOOOOFFOxOOOOFFOxOOOOFF這些中斷的位7到位3都為D，他們就被分成了一組。0F正好16個組。INT_CFADDR就是上面說到的用來設(shè)置組別的寄存器：4.3.2.3Interr

8、upt Request Configuration Address Register (INT_CFADDR)Address: 0 x012776543210INT_CFADDR7:4000000010000Unimplemented or ReservedFigure 4-5. Interrupt Configuration Address Register (INT_CFADDR)我們需要設(shè)置某個組別的中斷時，只要寫入最后8位地址就行了，比如設(shè)置SCI0的中斷優(yōu) 先級，就寫入0 xD0。#define VsciO0 x0000FFD6設(shè)置好組別之后，我們就要該組中相應(yīng)的中斷進(jìn)行設(shè)置，設(shè)置中

9、斷的寄存器為4.3.2.4Interrupt Request Configuration Data Registers (INT_CFDATA0-7)這其實是一組寄存器，一共有8個，每個都代表中斷組中的一個中斷。對應(yīng)規(guī)則是這 樣的：中斷地址的低四位除以2比如還是SCI0，低四位是6，除以二就是3,那么我們就需要設(shè)置INT_CFDATA3往INT_CFDATAx中寫入07就能設(shè)置相應(yīng)的中斷優(yōu)先級了拿我本次比賽的程序來舉個例子：我們的程序中需要3個中斷：PIT0,PORTH,SCI0。PIT0 定時檢測傳感器數(shù)值，PORTH連接干簧管進(jìn)行起跑線檢測，SCI0接收上位機(jī)指令實現(xiàn)急 停等功能。因此中斷

10、優(yōu)先級要SCI0PORTHPIT0。我們先要從頭文件中找出相應(yīng)中斷的地址：#defi ne Vp i tO0 x0000FF7A#def i ne VporthOxOOOOFFCC#def i ne Vsc i 00 x0000FFD6PIT0【7:4】位為7,選擇中斷組:INT CFADDR=0 x70;【3:0】為A, A/2=5，設(shè)置為第5優(yōu)先級那么 INT CFDATA5=5;porth【7:4】位為C，選擇中斷組：INT CFADDR=0 xC0;【3:0】為C, C/2=6，設(shè)置為第6優(yōu)先級那么INT CFDATA6=6;Sci0【7:4】位為D，選擇中斷組：INT CFADDR=0 xD0;【3:0】為6, 6/2=3，設(shè)置為第7優(yōu)先級那么INT CFDATA3=7;最終程序為：void Interrupt_Priority_Set(void)INT CFADDR=0 x70;INT CFDATA5=0 x05;INT CFADDR=0 xC0;INT CFDATA6=0 x06;INT CFADDR=0 xD0;INT CFDATA3=0 x07;還要注意一點，如果要實現(xiàn)中斷嵌套，需要在低級中斷中再開一次總中斷，比如/PHD中斷，干簧管檢測用VO i d i nterrupt 25 PortH_lNTSvr(void) Egb I e In