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AtmelATmega128RFA1單片IEEE802.15.4解決方案Atmel公司的ATmega128RFA1是低功耗單片IEEE802.15.4解決方案,集成了基于AVR增強(qiáng)特性RISC架構(gòu)的CMOS8位MCU以及2.4GHzISM頻段的高數(shù)據(jù)速率收發(fā)器.器件的吞吐量達(dá)到1MIPS/MHz,無線電收發(fā)器的數(shù)據(jù)數(shù)據(jù)速率從250kbps到高達(dá)2Mbps.ATmega128RFA1廣泛應(yīng)用在ZigBee?/IEEE802.15.4-2006/2003?,RF4CE,SP100,WirelessHART?,ISM應(yīng)用以及IPv6/6LoWPAN.本文介紹了ATmega128RFA1主要特性,方框圖,AVR架構(gòu)方框圖,收發(fā)器方框圖以及基本應(yīng)用電路圖和材料清單(BOM)與擴(kuò)展特性的應(yīng)用電路圖.
TheATmega128RFA1isalow-powerCMOS8bitmicrocontrollerbasedontheAVR
enhancedRISCarchitecturecombinedwithahighdataratetransceiverforthe2.4GHz
ISMband.ItisderivedfromtheATmega1281microcontrollerandtheAT86RF231radio
transceiver.
Byexecutingpowerfulinstructionsinasingleclockcycle,thedeviceachievesthroughputsapproaching1MIPSperMHzallowingthesystemdesignertooptimizepowerconsumptionversusprocessingspeed.
Theradiotransceiverprovideshighdataratesfrom250kb/supto2Mb/s,framehandling,outstandingreceiversensitivityandhightransmitoutputpowerenablingaveryrobustwirelesscommunication.
TheAVRcorecombinesarichinstructionsetwith32generalpurposeworkingregisters.All32registersaredirectlyconnectedtotheArithmeticLogicUnit(ALU).Twoindependentregisterscanbeaccessedwithonesingleinstructionexecutedinoneclockcycle.TheresultingarchitectureisverycodeefficientwhileachievingthroughputsuptotentimesfasterthanconventionalCISCmicrocontrollers.Thesystemincludesinternalvoltageregulationandanadvancedpowermanagement.Distinguishedbythesmallleakagecurrentitallowsanextendedoperationtimefrombattery.
TheradiotransceiverisafullyintegratedZigBeesolutionusingaminimumnumberofexternalcomponents.ItcombinesexcellentRFperformancewithlowcost,smallsizeandlowcurrentconsumption.Theradiotransceiverincludesacrystalstabilizedfractional-Nsynthesizer,transmitterandreceiver,andfullDirectSequenceSpreadSpectrumSignal(DSSS)processingwithspreadinganddespreading.ThedeviceisfullycompatiblewithIEEE802.15.4-2006/2003andZigBeestandards.
ATmega128RFA1主要特性:
?HighPerformance,LowPowerAVR?8-BitMicrocontroller
?AdvancedRISCArchitecture
-135PowerfulInstructions–MostSingleClockCycleExecution
-32x8GeneralPurposeWorkingRegisters
-FullyStaticOperation
-Upto16MIPSThroughputat16MHzand1.8V
-On-Chip2-cycleMultiplier
?Non-volatileProgramandDataMemories
-128KBytesofIn-SystemSelf-ProgrammableFlash
?Endurance:2000Write/EraseCycles@85℃
-4KBytesEEPROM
?Endurance:2000Write/EraseCycles@85℃
-16KBytesInternalSRAM
?JTAG(IEEEstd.1149.1compliant)Interface
-Boundary-scanCapabilitiesAccordingtotheJTAGStandard
-ExtensiveOn-chipDebugSupport
-ProgrammingofFlashEEPROM,FusesandLockBitsthroughtheJTAGinterface
?PeripheralFeatures
-MultipleTimer/Counter&PWMchannels
-RealTimeCounterwithSeparateOscillator
-10-bit,330ks/sA/DConverter;AnalogComparator;On-chipTemperatureSensor
-Master/SlaveSPISerialInterface
-TwoProgrammableSerialUSART
-ByteOriented2-wireSerialInterface
?AdvancedInterruptHandler
?WatchdogTimerwithSeparateOn-ChipOscillator
?Power-onResetandLowCurrentBrown-OutDetector
?AdvancedPowerSaveModes
?FullyintegratedLowPowerTransceiverfor2.4GHzISMBand
-SupportedDataRates:250kb/sand500kb/s,1Mb/s,2Mb/s
--100dBmRXSensitivity;TXOutputPowerupto3.5dBm
-HardwareAssistedMAC(Auto-Acknowledge,Auto-Retry)
-32BitIEEE802.15.4SymbolCounter
-BasebandSignalProcessing
-SFR-Detection,Spreading;De-Spreading;Framing;CRC-16Computation
-AntennaDiversityandTX/RXcontrol
-TX/RX128ByteFrameBuffer
?HardwareSecurity(AES,TrueRandomGenerator)
?IntegratedCrystalOscillators(32.768kHz&16MHz)
?I/OandPackage
-38ProgrammableI/OLines
-64-padQFN(RoHS/FullyGreen)
?TemperatureRange:-40℃to85℃Industrial
?Supplyvoltagerange1.8Vto3.6Vwithintegratedvoltageregulators
?UltraLowPowerconsumption(1.8to3.6V)forRx/Tx&AVR:<18.6mA
-CPUActiveMode(16MHz):4.1mA
-2.4GHzTransceiver:RX_ON12.5mA/TX14.5mA(maximumTXoutputpower)
-DeepSleepMode:<250nA@25℃
?SpeedGrade:0–16MHz@1.8–3.6V
ATmega128RFA1應(yīng)用:
?ZigBee?/IEEE802.15.4-2006/2003?–FullAndReducedFunctionDevice(FFD/RFD)
?GeneralPurpose2.4GHzISMBandTransceiverwithMicrocontroller
?RF4CE,SP100,WirelessHART?,ISMApplicationsandIPv6/6LoWPAN
圖1.ATmega128RFA1方框圖
ThemainfunctionoftheCPUcoreistoensurecorrectprogramexecution.TheCPUmustthereforebeabletoaccessmemories,performcalculation,controlperipherals,andhandleinterrupts.
Inordertomaximizeperformanceandparallelism,theAVRusesaHarvardarchitecture–withseparatememoriesandbusesforprogramanddata.Instructionsintheprogrammemoryareexecutedwithasinglelevelpipelining.Whileoneinstructionisbeingexecuted,thenextinstructionispre-fetchedfromtheprogrammemory.Thisconceptenablesinstructionstobeexecutedineveryclockcycle.TheprogrammemoryisIn-SystemReprogrammableFlashmemory.
圖2.ATmega128RFA1的AVR架構(gòu)方框圖
TheATmega128RFA1featuresalow-power2.4GHzradiotransceiverdesignedforindustrialandconsumerZigBee/IEEE802.15.4,6LoWPAN,RF4CEandhighdatarate2.4GHzISMbandapplications.TheradiotransceiverisatrueperipheralblockoftheAVRmicrocontroller.AllRF-criticalcomponentsexcepttheantenna,crystalanddecouplingcapacitorsareintegratedon-chip.Therefore,theATmega128RFA1isparticularlysuitableforapplicationslike:
2.4GHzIEEE802.15.4andZigBeesystems
6LoWPANandRF4CEsystems
Wirelesssensornetworks
Industrialcontrol,sensingandautomation(SP100,WirelessHART)
Residentialandcommercialautomation
Healthcare
Consumerelectronics
PCperipherals
Low-Power2.4GHzTransceiverFeatures
HighperformanceRF-CMOS2.4GHzradiotransceivertargetedforIEEE802.15.4?,ZigBee?,IPv6/6LoWPAN,RF4CE,SP100,WirelessHART?andISMapplications
Outstandinglinkbudget(103.5dB):
Receiversensitivity-100dBm
Programmableoutputpowerfrom-17dBmupto+3.5dBm
Ultra-lowcurrentconsumption:
TRX_OFF=0.4mA
RX_ON=12.5mA
BUSY_TX=14.5mA(atmax.transmitpowerof+3.5dBm)
OptimizedforlowBoMcostandeaseofproduction:
Fewexternalcomponentsnecessary(crystal,capacitorsandantenna)
ExcellentESDrobustness
Easytouseinterface:
Registersandframebufferaccessfromsoftware
Dedicatedradiotransceiverinterrupts
Radiotransceiverfeatures:
128byteFIFO(SRAM)fordatabuffering
IntegratedRX/TXswitch
Fullyintegrated,fastsettlingPLLtosupportfrequencyhopping
Batterymonitor
Fastwake-uptime<0.25ms
SpecialIEEE802.15.42006hardwaresupport:
FCScomputationandclearchannelassessment(CCA)
RSSImeasurement,energydetectionandlinkqualityindication
MAChardwareaccelerator:
Automatedacknowledgement,CSMA-CAandframeretransmission
Automaticaddressfiltering
AutomatedFCScheck
ExtendedFeatureSetHardwareSupport:
AES128bithardwareaccelerator
RX/TXindication(externalRFfront-endcontrol)
RXantennadiversity
SupportedPSDUdatarates:250kb/s,500kb/s,1Mb/sand2Mb/s
Truerandomnumbergenerationforsecurityapplications
ComplianttoIEEE802.15.4-2006,IEEE802.15.4-2003andRF4CE
ComplianttoEN300328/440,FCC-CFR-47Part15,ARIBSTD-66,RSS-210
圖3.ATmega128RFA1收發(fā)器方框圖
圖4.ATmega128RFA1基本應(yīng)用電路圖
The50ohmsingle-endedRFinputistransformedtothe100differentialRFportimpedanceusingBalunB1.ThecapacitorsC1andC2provideACcouplingoftheRFinputtotheRFport,capacitorC4improvesmatching.
Thepowersupplybypasscapacitors(CB2,CB4)areconnectedtotheexternalanalogsupplypin(EVDD,pin59)andexternaldigitalsupplypin(DEVDD,pin23).Pins34,44and54supplythedigitalportpins.
CapacitorsCB1andCB3arebypasscapacitorsfortheintegratedanaloganddigitalvoltageregulatorstoensurestableoperationandtoimprovenoiseimmunity.
Capacitorsshouldbeplacedascloseaspossibletothepinsandshouldhavealowresistanceandlow-inductanceconnectiontogroundtoachievethebestperformance.
Thecrystal(XTAL),thetwoloadcapacitors(CX1,CX2),andtheinternalcircuitryconnectedtopinsXTAL1andXTAL2formthe16MHzcrystaloscillatorforthe2.4GHztransceiver.Toachievethebest
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