姜書艷數(shù)字邏輯設(shè)計(jì)及應(yīng)用8

1、1,Chapter 4 Combinational Logic Design Principles(組合邏輯設(shè)計(jì)原理),Basic Logic Algebra (邏輯代數(shù)基礎(chǔ)) Combinational-Circuit Analysis (組合電路分析) Combinational-Circuit Synthesis (組合電路綜合),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),2,Review of Chapter 3,Electronic Behavior of CMOS Circuits Logic Voltage Levels (

2、邏輯電壓電平) DC Noise Margins (直流噪聲容限) Fan-In（扇入） Fun-Out (扇出),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),3,Review of Chapter 3,Transmission Gates (傳輸門) Schmitt-Trigger Inputs （Hysteresis） Three-State Outputs (Tri-State output) Open-Drain Outputs (Open-Collector Gate),Digital Logic Design and Appli

3、cation (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),4,Review of Chapter 3,Logic Levels CMOS(0-1.5V, 3.5-5V) TTL(0-0.8V, 2-5V) ECL(L=-1.8V, H=-0.9V) (L=3.6V, H=4.4V),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),5,Review of Chapter 3,Wired AND (線與) Open-Drain Outputs (Open-Collector Gate) Wired OR (線或) Emitter-Coupled Logic Gate

4、（ECL, 發(fā)射極耦合邏輯門）,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),6,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),Review of Chapter 3,Positive Logic and Negative Logic (正邏輯和負(fù)邏輯) Three basic logic functions: AND, OR, and NOT (三種基本邏輯：與、或、非),7,Review of Chapter 3 (第三章內(nèi)容回顧),Digital Logic Design and Ap

5、plication (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),Three kinds of Description Method (三種描述方法)： Truth Table (真值表) Logic Expression (邏輯表達(dá)式) Logic Circuit (邏輯符號(hào)) NAND and NOR (與非和或非),8,8,Introduction,Lets learn to design digital circuits, starting with a simple form of circuit: Combinational circuit Outputs depend solely on the pr

6、esent combination of the circuit inputs values,2.1,Digital,System,if b=0, then F=0,if b=1, then F=1,b=1,F=1,(a),Vs. sequential circuit: Has “memory” that impacts outputs too,Digital,System,b=0,F=1,Cannot determine value of F solely from present input value,(b),9,Digital Logic Design and Application

7、(數(shù)字邏輯設(shè)計(jì)及應(yīng)用),Basic Concepts (基本概念),Two Types of Logic Circuits(邏輯電路分為兩大類): Combinational Logic Circuit（組合邏輯電路） Sequential Logic Circuit（時(shí)序邏輯電路）,Outputs depend only on its Current Inputs. (任何時(shí)刻的輸出僅取決與當(dāng)時(shí)的輸入),Outputs depends not only on the current Inputs but also on the Past sequence of Inputs. (任一時(shí)刻的輸

8、出不僅取決與當(dāng)時(shí)的輸入， 還取決于過(guò)去的輸入序列),電路特點(diǎn)：無(wú)反饋回路、無(wú)記憶元件,10,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),4.1 Switching Algebra (開關(guān)代數(shù)),4.1.1 Axioms (公理) X = 0 , if X 1 X = 1, if X 0 0 = 1 1 = 0 00 = 0 1+1 = 1 11 = 1 0+0 = 0 01 = 10 = 0 1+0 = 0+1 = 1,F = 0 + 1 ( 0 + 1 0 ) = 0 + 1 1,11,4.1.2 Single-Variable Theo

9、rems(單變量開關(guān)代數(shù)定理),Identities (自等律)：X + 0 = X X 1 = X Null Elements (0-1律)：X + 1 = 1 X 0 = 0 Involution (還原律)：( X ) = X Idempotency(同一律)：X + X = X X X = X Complements(互補(bǔ)律)：X + X = 1 X X = 0,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),12,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),4.1.3 Two-an

10、d Three-Variable Theorems (二變量或三變量開關(guān)代數(shù)定理),Similar Relationship with General Algebra (與普通代數(shù)相似的關(guān)系) Commutativity (交換律) A B = B A A + B = B + A Associativity (結(jié)合律) A(BC) = (AB)C A+(B+C) = (A+B)+C Distributivity (分配律) A(B+C) = AB+AC A+BC = (A+B)(A+C),可以利用真值表證明公式和定理,13,Perfect induction of the theorem,Us

11、e the truth table to prove the functions on both side are same !,To prove, just evaluate all possibilities,14,14,Example uses of the properties,Show abc equivalent to cba. Use commutative property: a*b*c = a*c*b = c*a*b = c*b*a Show abc + abc = ab. Use first distributive property abc + abc = ab(c+c)

12、. Complement property Replace c+c by 1: ab(c+c) = ab(1). Identity property ab(1) = ab*1 = ab.,a,15,15,Example uses of the properties,Show x + xz equivalent to x + z. Second distributive property Replace x+xz by (x+x)*(x+z). Complement property Replace (x+x) by 1, Identity property replace 1*(x+z) by

13、 x+z.,a,16,Notes (幾點(diǎn)注意),不存在變量的指數(shù) AAA A3 允許提取公因子 AB+AC = A(B+C) 沒(méi)有定義除法 if AB=BC A=C ?,沒(méi)有定義減法 if A+B=A+C B=C ?,A=1, B=0, C=0 AB=AC=0, AC,A=1, B=0, C=1,錯(cuò)！,錯(cuò)！,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),17,Some Special Relationships(一些特殊的關(guān)系),Covering (吸收律) X + XY = X X(X+Y) = X Combining (組合律) XY +

14、 XY = X (X+Y)(X+Y) = X Consensus 添加律（一致性定理） XY + XZ + YZ = XY + XZ (X+Y)(X+Z)(Y+Z) = (X+Y)(X+Z),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),18,對(duì)上述的公式、定理要熟記，做到舉一反三,(X+Y) + (X+Y) = 1,A + A = 1,XY + XY = X,(A+B)(A(B+C) + (A+B)(A(B+C) = (A+B),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),19,Prov

15、e (證明)： XY + XZ + YZ = XY + XZ,YZ = 1YZ = (X+X)YZ,XY + XZ + (X+X)YZ,= XY + XZ + XYZ +XYZ,= XY(1+Z) + XZ(1+Y),= XY + XZ,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),20,4.1.4 n-Variable Theorems (n變量定理),Generalized idempotency theorem ( 廣義同一律 ) X + X + + X = X X X X = X Shannons expansion theorems

16、 ( 香農(nóng)展開定理 ),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),21,Prove (證明)： AD + AC + CD + ABCD = AD + AC,= A ( 1D + 1C + CD + 1BCD ) + A ( 0D + 0C + CD + 0BCD ),= A ( D + CD + BCD ) + A ( C + CD ),= AD( 1 + C + BC ) + AC( 1 + D ),= AD + AC,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),22,4.1.4 n

17、-Variable Theorems ( n變量定理 ),Demorgans Theorems (摩根定理), Complement Theorems (反演定理),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),23,Complement Rules (反演規(guī)則)： +，0 1，Complementing Variables ( 變量取反 ) Follow the Priority Sequence as Before ( 遵循原來(lái)的運(yùn)算優(yōu)先次序 ) Keep the complement Symbol of Non-single varia

18、bles ( 不屬于單個(gè)變量上的反號(hào)應(yīng)保留不變 ),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),24,Example 1：Write the Complement function for each of The Following Logic functions. (寫出下面函數(shù)的反函數(shù) ) F1 = A (B + C) + C D F2 = (A B) + C D E,Example 2：Prove (AB + AC) = AB + AC,合理地運(yùn)用反演定理能夠?qū)⒁恍﹩?wèn)題簡(jiǎn)化,25,合理地運(yùn)用反演定理能夠?qū)⒁恍﹩?wèn)題簡(jiǎn)化,Digital

19、Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),26,4.1.5 Duality (對(duì)偶性),Duality Rule ( 對(duì)偶規(guī)則 ) +；0 1 變換時(shí)不能破壞原來(lái)的運(yùn)算順序（優(yōu)先級(jí)） Principle of Duality ( 對(duì)偶原理 ) 若兩邏輯式相等，則它們的對(duì)偶式也相等,例： Write the Duality function for each of the following Logic functions. (寫出下面函數(shù)的對(duì)偶函數(shù)) F1 = A + B (C + D) F2 = ( A(B+C) + (C+D) ),X + X Y =

20、 X X X + Y = X X + Y = X,X ( X + Y ) = X,FD(X1 , X2 , , Xn , + , , ) = F(X1 , X2 , , Xn , , + , ),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),27,4.1.5 Duality (對(duì)偶性),證明公式：A+BC = (A+B)(A+C),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),Duality Rule ( 對(duì)偶規(guī)則 ) +；0 1 變換時(shí)不能破壞原來(lái)的運(yùn)算順序（優(yōu)先級(jí)） Principle of Duality ( 對(duì)偶原理 ) 若兩邏輯式相等，則它們的對(duì)偶式也相等,28,Two kind of logic,Positive logic : 1 ( high level ) 0 (low level) Negative logic: 0 ( high level ) 1 (low level),If a logic relation exist in positive logic, it must be exist in negative logic. Both logic are duality for each other.,Positive-Lo