單片機原理及應用_第九講_MSP430單片機液晶控制器和ADC

1、單片機原理及應用第九講 MSP430單片機液晶控制器和ADC報告人： 實驗內(nèi)容實驗一：段碼LCD循環(huán)顯示0到6實驗二：DAC輸出正弦波實驗三：基礎：使DAC0輸出正弦波頻率為300Hz，在LCD上顯示頻率。提高：用按鍵控制DAC0輸出正弦波頻率為在100Hz1000Hz循環(huán)輸出，步進值為100Hz，并在LCD上顯示頻率。實驗步驟步驟：(1) 將PC 和板載仿真器通過USB 線相連；(2) 打開CCS 集成開發(fā)工具，選擇樣例工程或自己新建一個工程，修改代碼；(3) 選擇對該工程進行編譯鏈接，生成.out 文件。然后選擇，將程序下載到實驗板中。程序下載完畢之后，可以選擇全速運行程序，也可以選擇單步

2、調(diào)試程序，選擇F3 查看具體函數(shù)。也可以程序下載之后，按下，軟件界面恢復到原編輯程序的畫面。再按下實驗板的復位鍵，運行程序。（調(diào)試方式下的全速運行和直接上電運行程序在時序有少許差別，建議上電運行程序）。關鍵代碼：實驗一：int main() int i,j; WDTCTL = WDTPW + WDTHOLD;/ Stop WDT Init_TS3A5017DR(); / Configure TS3A5017DR IN1 and IN2 Init_lcd(); / LCD初始化 Backlight_Enable(); / 打開背光 LcdGo(1); / 打開液晶模塊 LCD_Clear();

3、/ 清屏 while(1) for (i=0; i<6; i+) / Display "0123456" for(j=0;j<6;j+) LCDMEMj = char_geni; delay_ms(1000); 實驗二：#include <msp430f6638.h>#include <math.h>#define PI 3.1415926int sin_table360;int *sin_data_pr;double i=0;int j;void main(void)WDTCTL = WDT_MDLY_0_064; / WDT 61us

4、 interval timer SFRIE1 = WDTIE; / Enable WDT interrupt for(j=0;j<360;j+) i+=PI/180; sin_tablej=(int)(sin(i)+1)*2048); sin_data_pr=&sin_table0; DAC12_0CTL0 = DAC12IR + DAC12SREF_0 + DAC12AMP_5 + DAC12ENC + DAC12CALON+DAC12OPS; P5DIR=BIT1;/打開揚聲器的運放 P5OUT&=BIT1; for (;) _bis_SR_register(CPUO

5、FF + GIE); / Enter LPM0 DAC12_0DAT=*sin_data_pr+; if (sin_data_pr >= &sin_table360) sin_data_pr = &sin_table0; / Positive ramp DAC12_0DAT &= 0xFFF; / Modulo 4096 #pragma vector=WDT_VECTOR_interrupt void watchdog_timer (void) _bic_SR_register_on_exit(CPUOFF); / Clear LPM0 bits from 0(S

6、R)實驗三：基礎：int main(void) WDTCTL = WDT_MDLY_0_064; / WDT 61us interval timerInit_TS3A5017DR(); / Configure TS3A5017DR IN1 and IN2 Init_lcd(); / LCD初始化 Backlight_Enable(); / 打開背光 LcdGo(1); / 打開液晶模塊 LCD_Clear(); / 清屏 LCDMEM0 = char_gen3; LCDMEM1 = char_gen0; LCDMEM2 = char_gen0; SFRIE1 = WDTIE; / Enable

7、 WDT interrupt for(j=0;j<52;j+) i+=PI/26; sin_tablej=(int)(sin(i)+1)*2048); sin_data_pr=&sin_table0; DAC12_0CTL0 = DAC12IR + DAC12SREF_0 + DAC12AMP_5 + DAC12ENC + DAC12CALON+DAC12OPS; P5DIR=BIT1;/打開揚聲器的運放 P5OUT&=BIT1; for (;) _bis_SR_register(CPUOFF + GIE); / Enter LPM0 DAC12_0DAT=*sin_da

8、ta_pr+; if (sin_data_pr >= &sin_table52) sin_data_pr = &sin_table0; / Positive ramp DAC12_0DAT &= 0xFFF; / Modulo 4096 #pragma vector=WDT_VECTOR_interrupt void watchdog_timer (void) _bic_SR_register_on_exit(CPUOFF); / Clear LPM0 bits from 0(SR)提高：#define circnt100 1388#define circnt20

9、0 694#define circnt300 462#define circnt400 348#define circnt500 278#define circnt600 232#define circnt700 198#define circnt800 174#define circnt900 154#define circnt1000 138int sin_table180;int *sin_data_pr;double i=0;int j;const int cnt_table = circnt100,circnt200,circnt300,circnt400,circnt500,cir

10、cnt600,circnt700,circnt800,circnt900,circnt1000;int cnt_flg = 0;void SetVcoreUp (unsigned int);void main(void)WDTCTL = WDTPW + WDTHOLD; / close watchdog/-p2.6-P2REN |= BIT6; / Enable P2.6 internal resistanceP2OUT |= BIT6; / Set P2.6 as pullUp resistanceP2IES |= BIT6; / P2.6 Hi/Lo edgeP2IFG &= BI

11、T6; / P2.6 IFG clearedP2IE |= BIT6; / P P2.6 interrupt enabled/*P2REN |= BIT7; / Enable P2.6 internal resistanceP2OUT |= BIT7; / Set P2.6 as pullUp resistanceP2IES |= BIT7; / P2.6 Hi/Lo edgeP2IFG &= BIT7; / P2.6 IFG clearedP2IE |= BIT7; / P P2.6 interrupt enabled*/-enable LCD-Init_TS3A5017DR();

12、/ Configure TS3A5017DR IN1 and IN2Init_lcd(); / LCD初始化Backlight_Enable(); / 打開背光LcdGo(1); / 打開液晶模塊LCD_Clear(); / 清屏LCDMEM5 = char_gen0;LCDMEM4 = char_gen0;LCDMEM3 = char_gen1;/-config sine list-for(j=0;j<180;j+)i+=PI/90;sin_tablej=(int)(sin(i)+1)*2000);sin_data_pr=&sin_table0;DAC12_0CTL0 = DA

13、C12IR + DAC12SREF_0 + DAC12AMP_5 + DAC12ENC + DAC12CALON+DAC12OPS;/- enable SMCLK as 8MHz-P4DIR |= BIT1; / P4.1 outputP1DIR |= BIT0; / ACLK set out to pinsP1SEL |= BIT0;P3DIR |= BIT4; / SMCLK set out to pinsP3SEL |= BIT4;/ Increase Vcore setting to level3 to support fsystem=25MHz/ NOTE: Change core

14、voltage one level at a time.SetVcoreUp (0x01);SetVcoreUp (0x02);SetVcoreUp (0x03);UCSCTL3 = SELREF_2; / Set DCO FLL reference = REFOUCSCTL4 |= SELA_2; / Set ACLK = REFO_bis_SR_register(SCG0); / Disable the FLL control loopUCSCTL0 = 0x0000; / Set lowest possible DCOx, MODxUCSCTL1 = DCORSEL_7; / Selec

15、t DCO range 50MHz operationUCSCTL2 = FLLD_1 + 762; / Set DCO Multiplier for 25MHz/ (N + 1) * FLLRef = Fdco/ (762 + 1) * 32768 = 25MHz/ Set FLL Div = fDCOCLK/2_bic_SR_register(SCG0); / Enable the FLL control loop/ Worstcase settling time for the DCO when the DCO range bits have been/ changed is n x 3

16、2 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx/ UG for optimization./ 32 x 32 x 25 MHz / 32,768 Hz 780k MCLK cycles for DCO to settle_delay_cycles(782000);/ Loop until XT1,XT2 & DCO stabilizes In this case only DCO has to stabilizedoUCSCTL7 &= (XT2OFFG + XT1LFOFFG + DCOFFG);/ Clea

17、r XT2,XT1,DCO fault flagsSFRIFG1 &= OFIFG; / Clear fault flagswhile (SFRIFG1&OFIFG); / Test oscillator fault flag/-enable timerA CCR0 us SMCLK-TA0CCTL0 = CCIE; / CCR0 interrupt enabledTA0CCR0 = cnt_table0;TA0CTL = TASSEL_2 + MC_1 + TACLR; /use SMCLk as setting 25MHzfor (;)_bis_SR_register(CP

18、UOFF + GIE); / Enter LPM0DAC12_0DAT=*sin_data_pr+;if (sin_data_pr >= &sin_table180)sin_data_pr = &sin_table0; / Positive rampDAC12_0DAT &= 0xFFF; / Modulo 4096void SetVcoreUp (unsigned int level)PMMCTL0_H = PMMPW_H; / Open PMM registers for write/ Set SVS/SVM high side new levelSVSMHC

19、TL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;/ Set SVM low side to new levelSVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;while (PMMIFG & SVSMLDLYIFG) = 0); / Wait till SVM is settledPMMIFG &= (SVMLVLRIFG + SVMLIFG); / Clear already set flagsPMMCTL0_L = PMMCOREV0 * level; / Set V

20、Core to new levelif (PMMIFG & SVMLIFG)while (PMMIFG & SVMLVLRIFG) = 0); / Wait till new level reached/ Set SVS/SVM low side to new levelSVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;/ Lock PMM registers for write accessPMMCTL0_H = 0x00;/-timerA interruption-#pragma vector=T

21、IMER0_A0_VECTOR_interrupt void TIMER0_A0_ISR(void)_bic_SR_register_on_exit(CPUOFF);/-bottom interruption-#pragma vector=PORT2_VECTOR_interrupt void Port_2(void)_bic_SR_register_on_exit(CPUOFF);cnt_flg+;if (cnt_flg >= 10) cnt_flg = 0;LCD_Clear(); / 清屏LCDMEM5 = char_gen0;LCDMEM4 = char_gen0;if (cnt

22、_flg = 9)LCDMEM3 = char_gen0;LCDMEM2 = char_gen1;else LCDMEM3 = char_gencnt_flg + 1;TA0CCR0 = cnt_tablecnt_flg;P2IFG &= BIT6;_bis_SR_register(CPUOFF + GIE);實驗現(xiàn)象分析:實驗一：LCD顯示屏上循環(huán)顯示0到6，每次顯示都為6個相同的數(shù)字，現(xiàn)象對應的代碼為：實驗二：實驗板上揚聲器放出周期為64us*360=0.023s的正弦波信號。實驗三：基礎：用示波器測量P7.6信號，測出信號頻率為300HZ左右，LCD面板上顯示為300。提高：按下按鍵，信號頻率按要求改變，同時LCD也顯示出信號頻率對應值。思考題1、MSP430系列單片機液晶驅(qū)動模塊有哪些驅(qū)動方法？答：4種驅(qū)動方法:靜態(tài)2mux3mux4mux2、MSP430系列單片機液晶驅(qū)動模塊包括哪些功能結(jié)構？答：功能結(jié)構:具有顯示緩存器所需的SEG、COM信號自動產(chǎn)生多種掃描頻率每個閃爍段都有獨立的閃爍存儲器穩(wěn)壓電荷泵軟件實現(xiàn)反向控制顯示緩存器可作為一般存儲器3、MSP430系列單片機液晶驅(qū)動模塊顯示緩存有什么特點？和普通的存儲單元有什么不同？答：特點:液晶顯示緩存器各個位與液晶的