VHDL--數(shù)字鐘

1、1實(shí)驗(yàn)?zāi)康? 學(xué)習(xí)數(shù)字鐘的基本原理2 學(xué)習(xí)數(shù)字鐘的基本設(shè)計(jì)方法3 學(xué)習(xí)數(shù)字鐘的校時(shí)控制的基本設(shè)計(jì)方法4 學(xué)習(xí)數(shù)字鐘的中可變進(jìn)制計(jì)數(shù)器的設(shè)計(jì)方法5 掌握采用 VHDL 語(yǔ)言設(shè)計(jì)頻率測(cè)量和周期測(cè)量2實(shí)驗(yàn)原理數(shù)字鐘的主要功能有年月日時(shí)分秒的顯示輸出功能，以及對(duì)日期和時(shí)間進(jìn)行設(shè)置的功能，還可以有整點(diǎn)報(bào)時(shí)，鬧鐘功能。設(shè)計(jì)數(shù)字鐘的核心問(wèn)題是時(shí)鐘日期的自動(dòng)轉(zhuǎn)換功能。即自動(dòng)識(shí)別不同月份的天數(shù)不同的控制。據(jù)此可以設(shè)計(jì)一個(gè)如圖3-13 所示結(jié)構(gòu)的數(shù)字鐘，該數(shù)字鐘包括校時(shí)模塊、月份天數(shù)處理模塊、時(shí)分秒計(jì)時(shí)模塊、年月日模塊和輸出選擇模塊。圖3-13 數(shù)字鐘原理框圖3實(shí)驗(yàn)內(nèi)容1根據(jù)圖3-13 設(shè)計(jì)數(shù)字鐘的各模塊電路2仿

2、真設(shè)計(jì)結(jié)果3用vhdl 語(yǔ)言完成設(shè)計(jì)4分析設(shè)計(jì)方法，選擇最佳方案完成天數(shù)處理功能5設(shè)計(jì)兩鍵校時(shí)操作4設(shè)計(jì)實(shí)例library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_unsigned.all;entity digital_clock isport(clk,iset,oset,en:in std_logic;i1,i2,i3,i4:std_logic_vector(3 downto 0);o1,o2,o3,o4,o5,o6:out std_logic_vector(3 down

3、to 0);end digital_clock;architecture rtl of digital_clock issignal hmd:integer; -meiyuetianshusignal zs,om:std_logic_vector(1 downto 0); -:=signal ya,yb,yc,yd,moa,mob,da,db,ha,hb,ma,mb,sa,sb,ms:std_logic_vector(3 downto 0); -shuchusignal bya,byb,byc,byd,bmoa,bmob,bda,bdb,bha,bhb,bma,bmb,bsa,bsb,bms:

4、std_logic_vector(3 downto 0); -shurubeginin_set:process(iset)beginif(iset='1' and iset'event) thenzs<=zs+'1'end if;end process in_set;out_set:process(oset)beginif(oset='1' and oset'event) thenom<=om+'1'end if;end process out_set;input:process(zs,iset)beg

5、inif(iset='1' and iset'event) thenbsa<="0000"bsb<="0000"bms<="0000"if zs="00" thenbya<=i1;byb<=i2;byc<=i3;byd<=i4;elsif zs="01" thenbmoa<=i1;bmob<=i2;bda<=i3;bdb<=i4;elsif zs="10" thenbha<=i1;

6、bhb<=i2;bma<=i3;bmb<=i4;elseend if;end if;end process input;output:process(om,oset)beginif om="01" theno1<=ma;o2<=mb;o3<=sa;o4<=sb;o5<=ms;o6<="0000"elsif om="10" theno1<=moa;o2<=mob;o3<=da;o4<=db;o5<=ha;o6<=hb;elsif om="

7、11" theno1<='0' & week;o2<="0000"o3<=ya;o4<=yb;o5<=yc;o6<=yd;elseend if;end process output;a1:process(clk)beginif(clk='1' and clk'event) thenif en='0' thenya<=bya;yb<=byb;yc<=byc;yd<=byd;moa<=bmoa;mob<=bmob;da<=bda

8、;db<=bdb;ha<=bha;hb<=bhb;ma<=bma;mb<=bmb;sa<=bsa;sb<=bsb;ms<=bms;elsems<=ms+'1'if ms="1001" thenms<="0000"if sb/="1001" thensb<=sb+'1'elsesb<="0000"if sa/="0101" thensa<=sa+'1'elsesa<=

9、"0000"if mb/="1001" thenmb<=mb+'1'elsemb<="0000"if ma/="0101" thenma<=ma+'1'elsema<="0000"if(hb/="1001") and (hb/="0011") or (ha/="0010") thenhb<=hb+'1'elsif hb="1001" the

10、nhb<="0000"ha<=ha+'1'elsif (hb="0011" and ha="0010") thenhb<="0000" ha<="0000"if(db/="1001") and (conv_integer(da)*10+conv_integer(db)/=hmd)thendb<=db+'1'elsif(conv_integer(da)*10+conv_integer(db)=hmd thenda&l

11、t;="0000" db<="0001"if(mob/="1001")and(mob/="0010")or(moa/="0001")thenmob<=mob+'1'elsif mob="1001" thenmob<="0000"moa<="0001"elsemob<="0001"moa<="0000"if(yd/="1001"

12、) thenyd<=ya+'1'elseyd<="0000"if(yc/="1001") thenyc<=yc+'1'elseyc<="0000"if(yb/="1001") thenyb<=yb+'1'elseyb<="0000"ya<=ya+'1'end if;end if;end if;end if;elsif db="1001" thendb<="

13、0000"da<=da+'1'end if;end if;end if;end if;end if;end if;elseend if;end if;elseend if;end process a1;a2:process(ya,yb,yc,yd)beginif(mob="0001")and(moa="0000")or(mob="0011")or(mob="0101")or(mob="0111")or(mob="1000")or(mob="0000")or(mob="0010"and moa="0001") thenhmd<=31;elsif mob="0010" thenif(yc="0000")and(