狀態(tài)機劃分和分頻器設(shè)計

序列檢測器〔10010〕，狀態(tài)機劃分modulestring10010(clk,X,rst,Z);inputclk,X,rst;outputZ;parameterS0=2'b00,S1=2'b01,S2=2'b10,SA=2'b11,S3=2'b00,S4=2'b01,S5=2'b10,SB=2'b11;reg[1:0]state1,state2; reg[1:0]next_state1,next_state2;always@(posedgeclk)if(rst)state1<=S0;elsestate1<=next_state1;assignZ=(state2==S5);I-Introduction1?Copyright2004,GaetanoBorrielloandRandyH.Katz序列檢測器〔10010〕，狀態(tài)機劃分always@(state2orXorstate1)case(state1)S0:if(X)next_state1=S1;elsenext_state1=S0;S1:if(X)next_state1=S1;elsenext_state1=S2;S2:if(X)next_state1=S1;elsenext_state1=SA;SA:if((state2==S4)&&X||(state2==S5)&&X)next_state1=S1;elseif((state2==S3)&&(!X))next_state1=S0;elsenext_state1=SA; defaultnext_state1=S0; endcaseI-Introduction2?Copyright2004,GaetanoBorrielloandRandyH.Katz序列檢測器〔10010〕，狀態(tài)機劃分always@(posedgeclk)if(rst)state2<=SB;elsestate2<=next_state2;always@(state2orXorstate1)case(state2)S3:if(X)next_state2=S4;elsenext_state2=SB;S4:if(X)next_state2=SB;elsenext_state2=S5;S5:if(X)next_state2=SB;elsenext_state2=S3;SB:if((state1==S2)&(~X))next_state2=S3;elsenext_state2=SB;defaultnext_state2=SB;endcaseendmoduleI-Introduction3?Copyright2004,GaetanoBorrielloandRandyH.Katz分頻電路設(shè)計分頻電路是對給定的頻率進行分頻，以得到所需的頻率偶數(shù)分頻電路：如要進行N倍偶數(shù)分頻，可由待分頻的時鐘觸發(fā)計數(shù)器計數(shù)，當(dāng)計數(shù)器從0計數(shù)到N/2-1時，輸出時鐘進行翻轉(zhuǎn)，并給計數(shù)器一個復(fù)位信號。I-Introduction4?Copyright2004,GaetanoBorrielloandRandyH.Katz偶數(shù)分頻電路〔16分頻〕moduleclk_div_16(inputclk_in,inputrst_n,outputclk_out);reg[2:0]cnt;regclk_out;always@(posedgeclk_in)begin if(!rst_n)begin cnt<=0;clk_out<=0; end elsebegin if(cnt==3'b111)begin cnt<=0; clk_out<=~clk_out; end else cnt<=cnt+1; end

endendmoduleI-Introduction5?Copyright2004,GaetanoBorrielloandRandyH.Katz奇數(shù)分頻電路常用錯位“異或〞法原理。如進行3分頻，通過待分頻時鐘上升沿觸發(fā)計數(shù)器進行模3計數(shù)，當(dāng)計數(shù)器計數(shù)到鄰近值進行兩次翻轉(zhuǎn)，〔即0時翻轉(zhuǎn)，1時再翻轉(zhuǎn)回來，2時保持〕，這樣實現(xiàn)3分頻占空比為1/3和2/3。如果實現(xiàn)占空比為50%的3分頻，可通過分頻器下降沿觸發(fā)計數(shù)，和上升沿同樣的方法計數(shù)進行3分頻，然后將上升沿產(chǎn)生的3分頻和下降沿產(chǎn)生的3分頻進行“或〞運算。同理對實現(xiàn)占空比為50%的N倍奇數(shù)分頻方法：通過待分頻時鐘上升沿觸發(fā)計數(shù)器進行模N計數(shù)，0時翻轉(zhuǎn)，N/2-1時再翻轉(zhuǎn)回來，后面保持〕，上升沿產(chǎn)生的N分頻和下降沿產(chǎn)生的N分頻進行“或〞運算。I-Introduction6?Copyright2004,GaetanoBorrielloandRandyH.Katz奇數(shù)分頻電路(3分頻〕oduleclk_div_3(inputclk_in,inputrst_n,outputclk_out);reg[1:0]cnt,cnt1;regclk1to3p,clk1to3n;always@(posedgeclk_in)begin if(!rst_n)begin cnt<=0;clk1to3p<=0; end elsebegin if(cnt==2'b10)begin cnt<=0; clk1to3p<=clk1to3p; end elsebegin cnt<=cnt+1; clk1to3p<=~clk1to3p; end endendI-Introduction7?Copyright2004,GaetanoBorrielloandRandyH.Katz奇數(shù)分頻電路(3分頻〕always@(negedgeclk_in)begin if(!rst_n)begin cnt1<=0;clk1to3n<=0; end elsebegin if(cnt==2'b10)begin cnt1<=0;clk1to3n<=clk1to3n; end elsebegin cnt1<=cnt1+1; clk1to3n<=~clk1to3n; end end end assignclk_out=clk1to3n|clk1to3p;endmoduleI-Introduction8?Copyright2004,GaetanoBorrielloandRandyH.Katz測試電路moduleclk_div_tb; regclk; regrst_n; wireclk_out1,clk_out2;clk_div_3uut(.clk_in(clk),.rst_n(rst_n),.clk_out(clk_out1));clk_div_5uut1(.clk_in(clk),.rst_n(rst_n),.clk_out(clk_out2)); initialbegin //InitializeInputs clk=0; rst_n=0; #20rst_n=1; end always#10clk=~clk;endmodulI-Introduction9?Copyright2004,GaetanoBorrielloandRandyH.Katz奇數(shù)分頻電路(5分頻〕moduleclk_div_5(inputclk_in,inputrst_n,outputclk_out);reg[2:0]cnt,cnt1;regclk1to5p,clk1to5n;always@(posedgeclk_in)begin if(!rst_n)begin cnt<=0;clk1to5p<=0; end elsebegin if(cnt==3'b100)begin cnt<=0;clk1to5p<=clk1to5p; end elsebegin cnt<=cnt+1;if(cnt==3'b000)clk1to5p<=~clk1to5p;if(cnt==3'b010)clk1to5p<=~clk1to5p; end

endendI-Introduction10?Copyright2004,GaetanoBorrielloandRandyH.Katz奇數(shù)分頻電路(5分頻〕always@(negedgeclk_in)begin if(!rst_n)begin cnt1<=0;clk1to5n<=0; end elsebegin if(cnt1==3'b100)begin cnt1<=0;clk1to5n<=clk1to5n; end elsebegin cnt1<=cnt1+1; if(cnt1==3