《信息工程專業(yè)英語》課件第14章

Unit14IntroductionofSomeTypicalDevices14.1Text14.2ReadingMaterials

14.1Text

IntroducedFPGA

Programmablelogicdeviceisagenericlogiccanuseavarietyofchips,whichistoachieveASIC(ApplicationSpecificIntegratedCircuit)semi-customizeddevice.ItsemergenceanddevelopmentofelectronicsystemsdesignersuseCADtoolstodesigntheirownlaboratoryintheASICdevice.

EspeciallyFPGA(FieldProgrammableGateArray)generatedanddevelopment,asamicroprocessor,memory,thefiguresforelectronicsystemdesignandsetanewindustrystandard(thatisbasedonstandardproductsalescatalogueinthemarkettobuy).Isadigitalsystemformicroprocessors,memories,FPGAorthreestandardbuildingblocksconstitutetheirintegrationdirection.

DigitalcircuitdesignusingFPGAdevices,cannotonlysimplifythedesignprocessandcanreducethesizeandcostoftheentiresystem,increasingsystemreliability.Theydonotneedtospendthetraditionalsensealotoftimeandeffortrequiredtocreateintegratedcircuits,toavoidtheinvestmentriskandbecomethefastest-growingindustriesofelectronicdevicesgroup.DigitalcircuitdesignsystemFPGAdevicesusingthefollowingmainadvantages.

1.Designflexible

UseFPGAdevicesmaynotinthestandardseriesdevicelogicfunctionallimitations.Andchangesinsystemdesignandtheuseoflogicinanyonestageoftheprocess,andonlythroughtheuseofre-programmingtheFPGAdevicecanbecompleted,thesystemdesignprovidesforgreatflexibility.

2.Increasedfunctionaldensity

Functionaldensityinagivenspacereferstothenumberoffunctionalintegrationlogic.Programmablelogicchipcomponentsdoorsseveralhigh,aFPGAcanreplaceseveralfilms,filmscoresorevenhundredsofsmall-scaledigitalICchipillustratedinthefilm.FPGAdevicesusingthechiptousedigitalsystemsinsmallnumbers,thusreducingthenumberofchipsusedtoreducethenumberofprintedsizeandprinted,andwillultimatelyleadtoareductionintheoverallsizeofthesystem.

3.Improvereliability

Printingplatesandreducethenumberofchips,notonlycanreducesystemsize,butitgreatlyenhancedsystemreliability.Ahigherdegreeofintegrationthansystemsinmanylow-standardintegrationcomponentsforthedesignofthesamesystem,withmuchhigherreliability.FPGAdeviceusedtoreducethenumberofchipsrequiredtoachievethesysteminthenumberprintedonthecordandjointsarereduced,thereliabilityofthesystemcanbeimproved.

4.Shorteningthedesigncycle

AsFPGAdevicesandtheprogrammableflexibility,useittodesignasystemforlongerthantraditionalmethodsgreatlyshortened.FPGAdevicemasterdegreeshigh,useprintedcircuitlayoutwiringsimple.Atthesametime,successintheprototypedesign,thedevelopmentofadvancedtools,ahighdegreeofautomation,theirlogicisverysimplechangesquickly.InternalstructureofFPGAisshowninFig14.1.Therefore,theuseofFPGAdevicescansignificantlyshortenthedesigncyclesystem,andspeedupthepaceofproductintothemarket,improvingproductcompetitiveness.

Fig14.1InternalstructureofFPGA

5.Workfast

FPGA/CPLDdevicesworkfast,generallycanreachseveraloriginalHertz,farlargerthantheDSPdevice.Atthesametime,theuseofFPGAdevices,thesystemneededtoachievecircuitclassesandsmall,andthusthepaceofworkoftheentiresystemwillbeimproved.

6.Increasedsystemperformanceconfidentiality

ManyFPGAdeviceshaveencryptionfunctionsinthesystemwidelyusedFPGAdevicescaneffectivelypreventillegalcopyingproductswereothers.

7.Toreducecosts

FPGAdeviceusedtoachievedigitalsystemdesign,ifonlydeviceitselfintotheprice,sometimesyouwouldnotknowitadvantages,buttherearemanyfactorsaffectingthecostofthesystem,takentogether,thecostadvantagesofusingFPGAisobvious.First,theuseofFPGAdevicesdesignedtofacilitatechange,shortendesigncycles,reducedevelopmentcostsforsystemdevelopment;Secondly,thesizeandFPGAdevicesallowautomationneedsplug-ins,reducingthemanufacturingsystemtolowercosts;Again,theuseofFPGAdevicescanenhancesystemreliability,reducedmaintenanceworkload,therebyloweringthecostofmaintenanceservicesforthesystem.Inshort,theuseofFPGAdevicesforsystemdesigntosavecosts.

Technicalwordsandphrases

generic

adj.類的，屬性的；一般的

microprocessor n.微處理器

catalogue n.目錄

ultimately adv.最后，最終

layout

n.布局，安排，設(shè)計

prototype n.原型，雛形，藍(lán)本

confidentiality n.機(jī)密性

encryption n.編密碼；加密

facilitate vt.促進(jìn)，助長

plug-in

n.插件程序

semi-customizeddevice 半定制器件

industrystandard

工業(yè)標(biāo)準(zhǔn)

functionaldensity

功能密集度

componentsdoor

組件門數(shù)

printingplates

印刷板

designcycle

設(shè)計周期

speedup

加速

illegalcopying

非法仿制

digitalsystemdesign

數(shù)字系統(tǒng)設(shè)計

savecosts

節(jié)約成本

maintenanceworkload 維修工作量

FPGA(Field-ProgrammableGateArray)

現(xiàn)場可編程門陣列

ASIC(ApplicationSpecificIntegratedCircuit)

專用集成電路

14.1.1Exercises

1.PutthePhrasesintoEnglish

(1)簡化設(shè)計過程；

(2)投資風(fēng)險；

(3)可編程邏輯芯片；

(4)自動化程度高；

(5)維修服務(wù)費(fèi)；

(6)產(chǎn)品競爭力。

2.PutthePhrasesintoChinese

(1)productcompetitiveness;

(2)systemreliability;

(3)investmentrisk;

(4)integratedcircuits;

(5)integrationdirection;

(6)standardproductsalescatalogue.

3.Translation

(1)AFPGAcanreplaceseveralfilms,filmscoresorevenhundredsofsmall-scaledigitalICchipillustratedinthefilm.

(2)Ahigherdegreeofintegrationthansystemsinmanylow-standardintegrationcomponentsforthedesignofthesamesystem,withmuchhigherreliability.

(3)AsFPGAdevicesandtheprogrammableflexibility,useittodesignasystemforlongerthantraditionalmethodsgreatlyshortened.

14.1.2參考譯文

可編程邏輯器件是一種可以構(gòu)成各種用途的通用邏輯芯片，它是實(shí)現(xiàn)專用集成電路ASIC(ApplicationSpecificIntegratedCircuit)的半定制器件，它的出現(xiàn)和發(fā)展使得電子系統(tǒng)設(shè)計師借助于CAD手段在實(shí)驗室里就可以設(shè)計自己的ASIC器件。特別是FPGA(FieldProgrammableGateArray)的產(chǎn)生與發(fā)展，使其成為繼微處理器、存儲器之后為電子數(shù)字系統(tǒng)設(shè)計而確定的又一種新的工業(yè)標(biāo)準(zhǔn)(即可以按標(biāo)準(zhǔn)產(chǎn)品目錄在銷售市場上購到)。數(shù)字系統(tǒng)正朝向以微處理器、存儲器、FPGA三種標(biāo)準(zhǔn)模塊構(gòu)成的一體化方向發(fā)展。

使用FPGA器件設(shè)計數(shù)字電路，不僅可以簡化設(shè)計過程，而且可以降低整個系統(tǒng)的體積和成本，增加系統(tǒng)的可靠性。它們無需花費(fèi)傳統(tǒng)意義上制造集成電路所需的大量時間和精力，避免了投資風(fēng)險，成為電子器件行業(yè)中發(fā)展最快的一族。使用FPGA器件設(shè)計數(shù)字系統(tǒng)電路的主要優(yōu)點(diǎn)如下。

1.設(shè)計靈活

使用FPGA器件可不受標(biāo)準(zhǔn)系列器件在邏輯功能上的限制，而且修改邏輯可在系統(tǒng)設(shè)計和使用過程的任一階段中進(jìn)行，并且只需通過對所用的FPGA器件進(jìn)行重新編程即可完成，給系統(tǒng)設(shè)計提供了很大的靈活性。

2.增大功能密集度

功能密集度是指在給定的空間能集成的邏輯功能數(shù)量?？删幊踢壿嬓酒瑑?nèi)的組件門數(shù)高，一片F(xiàn)PGA可代替幾片、幾十片乃至上百片中小規(guī)模的數(shù)字集成電路芯片。用FPGA器件實(shí)現(xiàn)數(shù)字系統(tǒng)時用的芯片數(shù)量少，從而減少了芯片的使用數(shù)目，減少了印刷線路板面積和印刷線路板數(shù)目，最終實(shí)現(xiàn)系統(tǒng)規(guī)模的全面縮減。

3.提高可靠性

減少芯片和印刷板數(shù)目，不僅能縮小系統(tǒng)規(guī)模，而且還極大地提高了系統(tǒng)的可靠性。

具有較高集成度的系統(tǒng)比用許多低集成度的標(biāo)準(zhǔn)組件設(shè)計的相同系統(tǒng)具有高得多的可靠性。使用FPGA器件減少了實(shí)現(xiàn)系統(tǒng)所需要的芯片數(shù)目，印刷線路板上的引線以及焊點(diǎn)數(shù)量也隨之減少，所以系統(tǒng)的可靠性得以提高。

4．縮短設(shè)計周期

由于FPGA器件的可編程性和靈活性，用它來設(shè)計一個系統(tǒng)所需時間較傳統(tǒng)方法大為縮短。FPGA器件集成度高，使用時印刷線路板電路布局布線簡單。同時，在樣機(jī)設(shè)計成功后，由于開發(fā)工具先進(jìn)，自動化程度高，對其進(jìn)行邏輯修改也十分簡便迅速。FPGA的內(nèi)部結(jié)構(gòu)如圖14.1所示。因此，使用FPGA器件可大大縮短系統(tǒng)的設(shè)計周期，加快產(chǎn)品投放市場的速度，提高產(chǎn)品的競爭能力。

5.工作速度快

FPGA/CPLD器件的工作速度快，一般可以達(dá)到幾百兆赫茲，遠(yuǎn)遠(yuǎn)大于DSP器件。同時，使用FPGA器件實(shí)現(xiàn)系統(tǒng)所需要的電路級數(shù)少，因而整個系統(tǒng)的工作速度得到了提高。

6.增加系統(tǒng)的保密性能

很多FPGA器件都具有加密功能，在系統(tǒng)中廣泛使用FPGA器件可以有效防止產(chǎn)品被他人非法仿制。

7.降低成本

使用FPGA器件實(shí)現(xiàn)數(shù)字系統(tǒng)設(shè)計時，如果僅從器件本身的價格考慮，有時還看不出它的優(yōu)勢，但是影響系統(tǒng)成本的因素是多方面的，綜合考慮，使用FPGA的成本優(yōu)越性是很明顯的。首先，使用FPGA器件修改設(shè)計方便，設(shè)計周期縮短，使系統(tǒng)的研制開發(fā)費(fèi)用降低；其次，F(xiàn)PGA器件可使印刷線路板面積和需要的插件減少，從而使系統(tǒng)的制造費(fèi)用降低；再次，使用FPGA器件能使系統(tǒng)的可靠性提高，維修工作量減少，進(jìn)而使系統(tǒng)的維修服務(wù)費(fèi)用降低?？傊?，使用FPGA器件進(jìn)行系統(tǒng)設(shè)計能節(jié)約成本。

14.2ReadingMaterials

14.2.1ARM7

ARM7(Fig14.2)isagenerationofARMprocessordesigns.ThisgenerationintroducedtheThumb16-bitinstructionsetprovidingimprovedcodedensitycomparedtopreviousdesigns.ThemostwidelyusedARM7designsimplementtheARMv4Tarchitecture,butsomeimplementARMv3orARMv5TEJ.AllthesedesignsuseaVonNeumannarchitecture,thusthefewversionscomprisingacachedonotseparatedataandinstructioncaches.Fig14.2ARM7

SomeARM7coresareobsolete.Onehistoricallysignificantmodel,theARM7DisnotableforhavingintroducedJTAGbasedon-chipdebugging;theprecedingARM6coresdidnotsupportit.The“D”representedaJTAGTAPfordebugging;the“I”denotedanICEBreakerdebugmodulesupportinghardwarebreakpointsandwatchpoints,andlettingthesystembestalledfordebugging.Subsequentcoresincludedandenhancedthissupport.

ARM7-TDMI

TheARM7-TDMI(ARM7-humb+Debug+Multiplier+ICE)processorisa32-bitRISC

CPUdesignedbyARM,andlicensedformanufacturebyanarrayofsemiconductorcompanies.In2009itremainsoneofthemostwidelyusedARMcores,andisfoundinnumerousdeeplyembeddedsystemdesigns.TexasInstrumentslicensedtheARM7-TDMI,whichwasdesignedintotheNokia6110.TheARM7TDMI-Svariantisthesynthesizablecore.

Specifications

Itisaversatileprocessordesignedformobiledevicesandotherlowpowerelectronics.Thisprocessorarchitectureiscapableofupto130MIPSonatypical0.13μmprocess.TheARM7TDMIprocessorcoreimplementsARMArchitecturev4T.Theprocessorsupportsboth32-bitand16-bitinstructionsviatheARMandThumbinstructionsets.

ARM

licensestheprocessortovarioussemiconductorcompanies,whichdesignfullchipsbasedontheARMprocessorarchitecture.

Applications

Perhapsthemostcommonpiecesofelectronicequipmenttohaveusedthisprocessorare:

AudiocontrollerintheSegaDreamcast.

D-LinkDSL-604+WirelessADSLRouter.

iPod

fromApple.

iriver

portabledigitalaudioplayers(theH10usesachipwiththisprocessor).

JuiceBox.

LegoMindstormsNXT.

MostofNokia’smobilephonerange.

NintendoDS(co-processor)andGameBoyAdvancefromNintendo.

PocketStation.

Roomba

500seriesfromiRobot.

SiriusSatelliteRadioreceivers.

ThemainCPUinSternPinballS.A.MSystemgames.

InBuildingAutomation,theAmericanAuto-MatrixBBC-SD(BACnetTouchscreenDisplay)usesanARM7TDMIcore.

Intournamentwaterskiandwakeboardtowboats,PerfectPassspeedcontrol.

ManyautomobilesembedARM7cores.

SamsungmicroSDcardscontainanARM7TDMIcontrollerwith128KBofcode.

14.2.2TMS320C67××SeriesFloating-PointDSPs

TheTMS320C672×isthenextgenerationofTexasInstruments’C67×generationofhigh-performance32-/64-bitfloating-pointdigitalsignalprocessors.TheTMS320C672×includestheTMS320C6727B,TMS320C6726B.TMS320C6722B.andTMS320C6720devices.

EnhancedC67×+CPU.TheC67×+CPUisanenhancedversionoftheC67×CPUusedontheC671×DSPs.ItiscompatiblewiththeC67×CPUbutofferssignificantimprovementsinspeed,codedensity,andfloating-pointperformanceperclockcycle.At350MHz,theCPUiscapableofamaximumperformanceof2800MIPS/2100MFLOPSbyexecutinguptoeightinstructions(sixofwhicharefloating-pointinstructions)inparalleleachcycle.TheCPUnativelysupports32-bitfixed-point,32-bitsingle-precisionfloating-point,and64-bitdouble-precisionfloating-pointarithmetic.

EfficientMemorySystem.Thememorycontrollermapsthelargeon-chip256K-byteRAMand384K-byteROMasunifiedprogram/datamemory.Developmentissimplifiedsincethereisnofixeddivisionbetweenprogramanddatamemorysizeasonsomeotherdevices.

Thememorycontrollersupportssingle-cycledataaccessesfromtheC67×+CPUtotheRAMandROM.UptothreeparallelaccessestotheinternalRAMandROMfromthreeofthefollowingfoursourcesaresupported:

Two64-bitdataaccessesfromtheC67×+CPU

One256-bitprogramfetchfromthecoreandprogramcache

One32-bitdataaccessfromtheperipheralsystem(eitherdMAXorUHPI)

Thelarge(32K-byte)programcachetranslatestoahighhitrateformostapplications.Thispreventsmostprogram/dataaccessconflictstotheon-chipmemory.Italsoenableseffectiveprogramexecutionfromanoff-chipmemorysuchasanSDRAM.

High-PerformanceCrossbarSwitch.Ahigh-performancecrossbarswitchactsasacentralhubbetweenthedifferentbusmasters(CPU，dMAX,UHPI)anddifferenttargets(peripheralsandmemory).Thecrossbarispartiallyconnected;someconnectionsarenotsupported(forexample,UHPI-to-peripheralconnections).

Multipletransfersoccurinparallelthroughthecrossbaraslongasthereisnoconflictbetweenbusmastersforaparticulartarget.Whenaconflictdoesoccur,thearbitrationisasimpleanddeterministicfixed-priorityscheme.

ThedMAXisgivenhighest-prioritysinceitisresponsibleforthemosttime-criticalI/Otransfers,followednextbytheUHPI,andfinallybytheCPU.

dMAXDualDataMovementAccelerator.ThedMAXisamoduledesignedtoperformDataMovementAcceleration.TheDataMovementAccelerator(dMAX)controllerhandlesuser-programmeddatatransfersbetweentheinternaldatamemorycontrollerandthedeviceperipheralsontheC672×DSPs.ThedMAXallowsmovementofdatato/fromanyaddressablememoryspaceincludinginternalmemory,peripherals,andexternalmemory.

ThedMAXcontrollerincludesfeaturessuchasthecapabilitytoperformthree-dimensionaldatatransfersforadvanceddatasorting,andthecapabilitytomanageasectionofthememoryasacircularbuffer/FIFOwithdelay-tapbasedreadingandwritingofdata.ThedMAXcontrolleriscapableofconcurrentlyprocessingtwotransferrequests(providedthattheyareto/fromdifferentsource/destinations).

ExternalMemoryInterface(EMIF)forFlexibilityandExpansion.TheexternalmemoryinterfaceontheC672×supportsasinglebankofSDRAMandasinglebankofasynchronousmemory.TheEMIFdatawidthis16bitswideontheC6726B,C6722B,andC6720and32bitswideontheC6727B.

SDRAMsupportincludesx16andx32SDRAMdeviceswith1，2,or4banks.

TheC6726B,C6722B,andC6720supportSDRAMdevicesupto128Mbits.

Real-TimeInterruptTimer(RTI).Thereal-timeinterrupttimermoduleincludes:

Two32-bitcounter/prescalerpairs.

Twoinputcaptures(tiedtoMcBSPdirectmemoryaccess[DMA]eventsforsampleratemeasurement).

Fourcompareswithautomaticupdatecapability.

DigitalWatchdog(optional)forenhancedsystemrobustness.

ClockGeneration(PLLandOSC).TheC672xDSPincludesanon-chiposcillatorthatsupportscrystalsintherangeof12MHzto25MHz.Alternatively,theclockcanbeprovidedexternallythroughtheCLKINpin.

TheDSPincludesaflexible,software-programmablephase-lockedloop(PLL)clockgenerator.Threedifferentclockdomains(SYSCLKI，SYSCLK2,andSYSCLK3)aregeneratedbydividingdownthePLLoutput.SYSCLKIistheclockusedbytheCPU，memorycontroller,andmemories.SYSCLK2isusedbytheperipheralsubsystemanddMAX.SYSCLK3isusedexclusivelyfortheEMIF.

14.2.3ASurveyofEmbeddedOperatingSystem

AnEmbeddedOperatingSystemisShowninFig14.3.

Fig14.3EmbeddedOperatingSystem

Embeddedsystemisapplication-orientedspecialcomputersystemwhichisscalableonbothsoftwareandhardware.Itcansatisfythestrictrequirementoffunctionality,reliability,cost,volume,andpowerconsumptionoftheparticularapplication.

WithrapiddevelopmentofICdesignandmanufacture,CPUsbecamecheap.LotsofconsumerelectronicshaveembeddedCPUandthusbecameembeddedsystems.Forexample,PDAs,cellphones,point-of-saledevices,VCRs,industrialrobotcontrol,orevenyourtoasterscanbeembeddedsystem.Thereismoreandmoredemandontheembeddedsystemmarket.SomereportexpectsthatthedemandonembeddedCPUsis10timesaslargeasgeneralpurposePCCPUs.

Asapplicationsoftheembeddedsystemsbecomemorecomplex,theoperatingsystemsupportanddevelopmentenvironmentbecamecrucial.Inthispaper,wemainlyanalyzethreemajorembeddedoperatingsystems,QNX4RTOS,WindowsCEandembeddedLinux.WindowsCEandembeddedLinuxaremostwidelyusedembeddedoperationsystems.QNXisarelativelysimpleoneandcanfitinsomesimpleapplications.

1.Hardwarespecification

Therearevarioushardwareplatformsforembeddedsystem.Themostpopularonesincludex86,MIPS,PowerPC，HitachiSH,PowerPCandStrongArmprocessors.Ononehand,theembeddedoperatingsystemsareadaptedtorunonmostoftheprocessoravailabletoembeddedsystem.Ontheotherhand,theyalsohavesomeownrestrictions.

Processor

QNXcanrunonallgenericx86-basedprocessors(386andup).

Linuxiscurrentlyavailabletorunonvirtuallyeverygeneral-purposemicroprocessorandtosupportthemostcommonprocessorsusedintheembeddedworld,includingtheARM,StrongArm,MIPS,HitachiSH,Motorola/IBMPowerPC,andx86-compatiblefamilies.EHOEvendors,suchasRedHat,alsoofferportingservicesthatwillquicklymoveaLinuxEHOEtothenewprocessorarchitecture.

WindowsCErequiretheunderlyingCPUtouseaflat32-bitaddressspaceandsupportkernel-anduser-modeoperation,tosupportvirtualmemoryusinganMMUandtobelittle-endian.Fortunately,NowWindowsCEcantargetvariousplatformslikex86,MIPS,HitachiSH3andSH4,PowerPCandStrongArmprocessors.

Memory

Memoryisalwaysapreciousresourceonembeddedsystem.Theembeddedoperatingsystemsthusmakelargeefforttoreduceitsmemoryoccupationsize.QNXisthesmallestOSamongthethree.Ithasaverysmallkernelofabout12kbytes.Thekernelcaneasilyfitintotheon-chipcache.WindowsCEandLinuxrequiremorememorybecausetheyaremorecomplicated.WindowsCEneeds350KBforaminimalsystemwiththekernelandsomecommunicationsupport.Linuxneeds125-256KBforareasonableconfiguredkernel,andover100KBforothercomponents.BothWindowsCEandLinuxareconfigurable,sothesystemsizevariesfordifferentapplication.

2.Architecture

Embeddedoperatingsystemuseeithermicrokerneloramodulararchitecturetomakethemeasilytailoredtofitindifferentapplicationrequirement.

QNXcontainsaverysmallmicrokernelsurroundedbyateamofcooperatingprocessesthatprovidehigher-levelOSservices.TheQNXmicrokernelimplementfourservices:1)Interprocesscommunication.2)Low-levelnetworkcommunication.3)Processscheduling.4)Interruptdispatching.TheOSserviceprocessesareoptional,andusercanchoosewhichoneisneededfortheirapplications.ThiskindofdesignmakesQNXflexiblefordifferentkindsofapplicationswhichrequiredifferentkindsofOSservices.

TheoperatingsystemarchitectureofWindowsCEisahierarchicalone.AtthebottomliesthedevicedriversandOAL(OEMAbstractionLayer).TheyareimplementedbytheOEMwhenportingWindowsCE.AbovethemlietheGraphics,WindowingandEventsSubsystem(GWES),thekernelitselfandthecommunicationstacks.ThislayerisimplementedbyMicrosoft.TheRemoteAPIcapabilityisbuiltontopofthecommunicationfunctionality.Ontopofthekernelliesthedatabaseandfilesystem.ThisisaccessedbytheRAPIcalls,andismadeavailabletotheapplicationsviatheWin32interface.ApplicationexecuteintheirownaddressspaceandinteractwiththerestofWindowsCEviatheWin32systemcallinterface.

Linuxisalsoalayeringstructureandcomprisedofmodules,suchasLinuxkernel,filesystem,devicedriversandnetworkprotocols.EmbeddedLinuxtakestheLinuxkernelandextractthenecessarymodulesasneeded.Withinthekernellayer,Linuxiscomposedoffivemajorsubsystems:theprocessscheduler(sched),thememorymanager(mm),thevirtualfilesystem(vfs),thenetworkinterface(net),andtheinter-processcommunication(ipc).Conceptually,theclusteringofthecomponentscomposestheLinuxKernelandeachsubsystemisanindependentcomponentoftheLinuxkernel.However,therearestillquitesomeinterdependenceamongthefivesubsystemsintheconcretearchitecture.

3.Processmanagement

QNXprocessmanagerdosenotresideinQNXmicrokernel.Althoughitsharesthesameaddressspaceasthemicrokernel(andistheonlyprocesstodoso),theProcessManagerrunsasotherprocesses,scheduledbymicrokernelandusestheMicrokernal’smessagepassingprimitivestocommunicateswithotherprocessesinthesystem.Processmanagerisresponsesforthecreationofprocessesandmanagementofprocessresource.

Theschedulingofprocessesismanagedbythemicrokernelscheduler.Themicrokernelschedulermakesschedulingdecisionwhen:

(1)Aprocessbecomesunblocked.

(2)Thetimesliceforarunningprocessexpires.

(3)Arunningprocessispreempted.

Everyprocessisassignedapriority.Theschedulerselectsthenextprocesstorunbylookingattheprocesspriority.Whenmorethanoneprocessatthesamepriorityarereadytorun,theschedulerusesthreeschedulingmethods:

(1)FIFOscheduling.

(2)Round-robinscheduling.

(3)Adaptivescheduling.

TheQNXisafullypreemptiblesystemwhichsupportsreal-timeoperatingsystem.

WindowsCEsupportbothprocessesandthreads.Fullmemoryprotectionappliestoapplicationprocesses.Threadschedulingiscarriedoutpreemptively,using8differentprioritylevels.WindowsCEalsouseWaitFunctionsandWaitObjectsforsynchronization.WindowsCEisapreemptivemultitaskingoperatingsystem.Itallowsmultipleapplications,orprocessestorunwithinthesystematthesametime.Itsupportsamaximumof32simultaneousprocesses.Aprocessconsistsofoneormorethreads.

WindowsCEusesapriority-basedtime-slicealgorithmtoscheduletheexecutionofthreads.Itsupports8discreteprioritylevels.Preemptionisbasedsolelyonthethread'spriority.Threadswithahigherpriorityarescheduledtorunfirst.Threadsatthesameprioritylevelruninaround-robinfashionwitheachthreadreceivingasliceofexecutiontime.LikeotherWindowsoperatingsystem,WindowsCEoffersarichsetof“waitobjects”forthreadsynchronization.Theseincludecriticalsection,eventandmutexobject.Thesewaitobjectallowathreadtoblockitsownexecutionuntilthespecifiedobjectchanges.WindowsCEqueuesmutex,criticalsectionandeventrequestsin“FIFO-by-priority”order:adifferentFIFOqueueisdefinedforeachofthe8prioritylevels.

Real-timeapplicationuseinterruptsasawayofensuringthatexternaleventsarequicklynoticedbytheoperatingsystem.WindowsCEbalanceperformanceandeaseofimplementationbysplittinginterruptprocessingintotwosteps:aninterruptserviceroutineandaninterruptservicethread.EachhardwareinterruptrequestlineisassociatedwithoneISR.Whenaninterruptoccurs,thekernelcallstheregisteredISRforthatinterrupt.TheISR,thekernel-modeportionofinterruptprocessingiskeptasshortaspossible.ItreturnsaninterruptIDtothekernel.ThekernelsetstheassociatedeventaccordingtotheID.Theinterruptservicethreadiswaitingonthatevent.ISTsareusuallygiventhehighest2threadprioritylevelstoensureittorunasquicklyaspossible.

WithaSH3referenceplatformrunningat58.98MHzinternaland14.745externalfrequency,thetypicallatencyofISRisbetween1.3and7.5ms,andlatencyofISTisbetween93to275ms.

Linuximplementsthreadsinthekernel.Therefore,schedulinginLINUXusesthreadsasentities,notprocesses,inthekerneldatastructures.LINUXdistinguishesthreeclassesofthreadsforschedulingpurposes,whichare1)Real-timeFIFOthreadsarethehighestpriorityandnotpreemptable.2)Real-timeroundrobinthreadsarethesameasReal-timeFIFOthreadsexceptforitspreemptibilty;3)timesharingthreadshavelowerprioritythantheprevioustwo.

Eachthreadhasschedulingpriorityandaquantumassociatedwithit.LinuxschedulesthreadsviaaGOODNESSalgorithm,whichchoosestorunthethreadwithhighestgoodnessandthethread’squantumisdecrementedbyoneasitruns.DifferentfromQNXandWindowCE,LINUX,bynature,isnotafullypreemptabledesign.WhenLINUXisportedtotheembeddedsystem,itsuffersfromseveralchallengestoreal-timeapplicability:determinismingeneral,andresponseunderloadinspecific.

Real-timeoperatingsystem(RTOS)referstoanoperatingsystemthatcanperforminapredictableandrepeatablemanner,regard-lessofworkload.Therefore,afeweffortshavebeencontributedtomakeLINUXabetterRTOS.OneideaistocreateaRTOSkernelandrunningLinuxasanunscheduledthreadundertheRTOS.InthisduelstructureLinux,high-prioritythreadsthatneedtrueRTOSperformancewouldrununderthehostoperatingenvironmentatahi