外文文獻(xiàn)—ARM－Advanced RISC Machines

1、附錄 英文資料翻譯英文原文：1, arm - advanced risc machinesarm (advanced risc machines), both considered to be the name of a company can be considered a generic term for a class of microprocessors, but also can be considered to be the name of a technology.arm was founded in 1991 in cambridge, england, mainly the

2、sale of the authorization of the chip design technology. at present, the use of arm technology microprocessor intellectual property (ip) cores, which we usually refer to arm microprocessor, throughout the industrial control, consumer electronics, communication systems, network systems, wireless syst

3、ems and other types of product market arm technology-based microprocessor applications, accounting for, according to a market share of more than 75% of the risc microprocessor 32, the arm technology is gradually infiltrated into all aspects of life.arm company is specialized in the risc-based chip d

4、esign and development company as a supplier of intellectual property rights, does not directly engaged in chip production, distinctive chips produced by the partner companies through the assignment of license, the worlds major semiconductor manufacturers from arm buy the design of the arm microproce

5、ssor core. according to different fields of application, add the appropriate external circuit to form their own arm microprocessor chip to enter the market. world dozens of large semiconductor companies are using arms authorization, so not only makes the arm technology for more third-party tools, ma

6、nufacturing, software support, but also reduce the cost of the whole system to make our products more accessible to the market has been accepted by consumers and more competitive.2, the characteristics of the arm microprocessorarm microprocessor based on risc architecture generally has the following

7、 characteristics:l small size, low power, low cost, high performance;l support the thumb (16-bit) / arm (32-bit) instruction set compatible 8/16 devices; l a large number of registers, the instruction execution faster;l the majority of data manipulation in the register;l addressing modes, flexible,

8、high efficiency in the implementation;l the instruction length is fixed;3, the arm microprocessor familyarm microprocessor, including the following series, as well as other vendors based on the arm architecture processor, in addition to the common characteristics with the arm architecture, each a se

9、ries of arm microprocessor has its own characteristics and application areas.- the arm7 family- arm9 series- family combining the arm9e series- arm10e series- the securcore series- inter xscale- inter strongarmamong them, the arm7, arm9, family combining the arm9e and arm10 for the four general-purp

10、ose processor series, each series provides a relatively unique set of performance to meet the needs of different application areas. securcore family designed specifically for security applications requiring high. 3.1 arm7 microprocessor familythe arm7 family microprocessor for low power 32-bit risc

11、processor, the most suitable for consumer applications require a higher price and power consumption. arm7 microprocessor series has the following characteristics:- embedded ice-rt logic, to facilitate debugging development.- very low power consumption, suitable for applications with higher power req

12、uirements, such as portable products.- to provide the 0.9mips/mhz three pipeline structure.- code density is high and is compatible with 16-bit thumb instruction set.- supports a wide range of operating system, including windows ce, linux, palm os.- the instruction set and arm9 family, arm9e series

13、and arm10e-series compatible, user-friendly product upgrades.- speeds up to 130mips, high-speed processing power capable of performing the most complex applications.the arm7 family microprocessor includes the following several types of nuclear: arm7tdmi, arm7tdmi-s, arm720t, the arm7ej. among them,

14、the availability of the arm7tdmi is currently the most widely used 32-bit embedded risc processor is a low-end arm processor core. the basic meaning of tdmi:t: 16 to compression instruction set, thumb;d: support piece on the debug;m: embedded hardware multiplier (multiplier);i: the embedded ice supp

15、ort on-chip breakpoints and debug point.3.2 the securcore microprocessor seriessecurcore family microprocessors designed for security needs, providing a perfect 32-bit risc technology security solutions therefore, the the securcore series microprocessors in addition to the low-power arm architecture

16、, high-performance features, but also has its unique advantages, which provides security solutions.securcore family microprocessor in addition to the main features of the arm architecture, also system security has the following characteristics:- with flexible protection unit, to ensure the safety of

17、 the operating system and application data.- soft-core technology, to prevent outside their scanning probe.- can be integrated user security features and other co-processors.the securcore series microprocessors are mainly used in products and systems with higher security requirements, such as the fi

18、eld of e-commerce, e-government, e-banking, network authentication system. securcore family microprocessor contains the securcore sc100, the securcore sc110, sc200 the securcore and the securcore sc210 four types to suit different applications. 3.3 the strongarm microprocessor series.inter strongarm

19、 sa-1100 processor is the arm architecture, highly integrated 32-bit risc microprocessor. it combines the inter design and processing technology and the arm architecture, power efficiency, the use of compatible software the armv4 architecture and the architecture of the intel technical merits.intel

20、strongarm processor is the ideal choice for portable communication products and consumer electronics products have been successfully used in many handheld computer products. 3.4 xscale processorxscale processor is a full-performance, cost-effective, low-power processor solutions based on armv5te arc

21、hitecture. it supports 16-bit thumb instruction and dsp instruction set has been used in digital mobile phones, personal digital assistant and networking products, and other occasions, inter mainly to promote an arm microprocessor.4, the arm microprocessor architecture4.1 risc-architecturethe struct

22、ure of the traditional cisc (complex instruction the set computer, complex instruction set computer) has its inherent shortcomings, with the development of computer technology and the introduction of new and complex instruction set computer architecture to support these new instructions, will be mor

23、e complex, however, in the various instructions of the cisc instruction set, its frequency of use are significant differences between about 20% of the instruction will be used repeatedly, accounting for 80% of the entire program code. while the remaining 80% of the instruction is not frequently used

24、, only 20% of the program design, obviously, this structure is not reasonable.based on the above the irrationality of the university of california at berkeley in 1979 proposed a risc (reduced instruction set the computer, to streamline the concept of instruction set computer), risc is not simply to

25、reduce the instruction, but putting the focus on how to make the structure of the computer more simple and reasonable way to improve the computing speed. risc architecture is the preferred frequency of use of the most simple instructions, to avoid complex instructions; fixed instruction length, inst

26、ruction format and the types of searching by way of reducing; the main control logic, no or little use of the micro-code control and other measures to achieve this purpose.so far, the risc architecture is also no strict definition, is generally believed that the risc architecture should have the fol

27、lowing characteristics:- fixed-length instruction format, instruction owned by the whole, simple, basic addressing modes there are three kinds.- the use of single-cycle instruction, to facilitate the implementation of the pipeline operation.- extensive use of register data processing instructions on

28、ly register, and only load / store instructions can access memory in order to improve the efficiency of the implementation of the directive.in addition, arm architecture also uses special technology to minimize the chip area to ensure high performance and lower power consumption:- all of the instruc

29、tions can be determined according to the previous results of the implementation is executed, thereby enhancing the efficiency of the implementation of the directive.- can be used to load / store instructions of the bulk transfer data to improve data transmission efficiency.- a data processing instru

30、ction to complete the processing logic and shift handle.address automatically increase or decrease - in the loop processing to improve operating efficiency.of course, compared with cisc architecture, risc architectures have the above advantages, but must not think that the risc architecture can be r

31、eplaced by the cisc architecture, in fact, risc and cisc have their own advantages, and the boundaries are not so obvious. modern cpus often use cisc, peripheral and internal joined the risc characteristics, such as vliw cpu is to blend the advantages of risc and cisc, one of the future cpu developm

32、ent direction.4.2 arm microprocessorsarm processor 37 registers are divided into several groups (bank), these registers include:- 31 general purpose registers, program counter (pc pointer), are 32-bit registers.- 6 of status register to identify the cpu state and the running status of the program, b

33、oth 32, currently only used part of it.at the same time, the arm processor there are seven different processor mode, corresponding to have a group of registers in each processor mode. in any processor mode register can access include 15 general purpose registers (r0 to r14), one or two status regist

34、ers and program counter. in all registers, and some mode of the seven kinds of processors sharing the same physical register, and some registers are different physical registers in the processor mode.4.3 arm microprocessors command structurearm microprocessor in the newer architecture supports two i

35、nstruction sets: the arm instruction set and thumb instruction sets. among them, the arm instruction is 32 the length of the thumb instruction length of 16. thumb instruction set for the subset of the features of the arm instruction set, but compared with the equivalent arm code, you can save 30% to

36、 40% more storage space, along with all the advantages of 32-bit code.5. arm microprocessor application selectiongiven the many advantages of the arm microprocessor, with the gradual development of embedded applications at home and abroad, the arm microprocessor is bound to get attention and applica

37、tion. however, the arm microprocessor core structure of as many as a dozen, dozens of chip manufacturers, as well as the ever-changing internal functional configuration combinations, options to developers bring some difficulties, so the arm chip it is very necessary to do some comparative study.5.1

38、choice of the arm microprocessor coreintroduced from the front we can see, contains a series of arm microprocessor core structure, to adapt to different applications, users want to use wince or standard linux operating system in order to reduce software development time, you need to select the arm72

39、0t more than with mmu (memory management unit) function of the arm chip, arm720t, arm920t, arm922t, arm946t, strong-arm with a mmu functions. the arm7tdmi is no mmu does not support windows ce and the standard linux, but there are no mmu support in uclinux and other operating systems running on the

40、arm7tdmi hardware platform. in fact, uclinux has been successfully ported to a variety of microprocessor platform with an mmu, and the stability and other aspects of a good performance. 5.2 system operating frequencythe operating frequency of the system largely determines the processing capability o

41、f the arm microprocessor. the typical processing speed of the arm7 family microprocessor 0.9mips/mhz common arm7 chip master clock is 20mhz-133mhz arm9 family microprocessor typical processing speed 1.1mips/mhz common arm9 system master clock frequency 100mhz-233mhz arm10 can reach up to 700mhz. the

42、 processing of the different chips on the clock, some chips only need a master clock frequency and chip internal clock controller can provide a different frequency clock for the arm core and usb, uart, the dsp, audio and other features. 5.3 chip memory capacitymost of the arm microprocessor chip mem

43、ory capacity is not too big, requires the user to expand outside in the design of the system memory, but there are also part of the chip has a relatively large on-chip storage space, such as atmel, at91f40162, with up to 2mb on-chip program memory space, users in the design when considering the sele

44、ction of this type in order to simplify the system design.5.4 the choice of the peripheral circuitsin addition to the arm microprocessor core, almost all of the arm chip according to different fields of application extend the relevant functional modules, and integrated into the chip, which we call t

45、he on-chip peripheral circuits, such as a usb interface, iis interface. lcd controller, keypad interface, the rtc, adc and the dac, dsp co processor, the designer should analyze the needs of the system, as far as possible to complete the required on-chip peripheral circuits, which can simplify syste

46、m design, while improving system reliability.6, arm interrupt principlecpu and peripherals, data transmission usually have the following three kinds: query, interrupt and dma mode. the so-called query mode, the cpu constantly query the status of peripheral, if the peripheral is ready to begin data t

47、ransfer; if the peripheral is not ready, the cpu will enter a cycle wait state. obviously this is a waste of a lot of cpu time, reducing cpu utilization. the so-called interrupt, when the peripheral is ready for data transfer and cpu, peripherals, first issued to the cpu interrupt request, the cpu r

48、eceives an interrupt request and under certain conditions, to suspend the original program and execute interrupt service handler, completed. and then returned to the original program to continue. thus, to avoid the cpu interrupt a lot of time spent on the query operation of the peripheral state, thu

49、s greatly improving the efficiency of the implementation of the cpu.arm system includes two types of interrupts: irq interrupt the other fiq interrupt. irq is common to interrupt, fiq fast interrupt during replication, and data transmission of large quantities of, often using the fiq interrupt. fiq

50、priority than the irq.table 1-1 arm exception vectorabnormalmodenormal addresshigh vector addressresetmanagement0x0000 00000xffff 0000undefined instructionundefined0x0000 00040xffff 0004soft interruptmanagement0x0000 00080xffff 0008prefetch abortsuspend0x0000 000c0xffff 000cdata abortsuspend0x0000 0

51、0100xffff 0010irqirq0x0000 00180xffff 0018fiqfiq0x0000 001c0xffff 001cin the arm system to support the seven-class exceptions, including: reset, undefined instruction, soft interrupt, prefetch abort, irq and fiq, each exception corresponds to a different processor mode. once an exception occurs, we

52、must first mode switch, then the implementation of the program will go to the corresponding fixed memory address. this fixed address called the exception vector. saved in the exception vector is typically the exception handler address. the arm exception vectors are listed in table 1-1.this shows tha

53、t the irq interrupt and fiq interrupt exception belong to arm mode. in the arm system, if there is an interrupt occurs, whether it is an external interrupt or internal interrupt the program being executed will stop. the next is usually usually interrupt will be handled in accordance with the followi

54、ng steps:(1) save the scene. save the current pc value to r14, to save the current program is running state to the spsr.(2) the mode switch. according to the occurrence of the interrupt type, enter the irq mode or fiq mode.(3) to obtain the interrupt source. exception vector table stored in the low

55、address, for example, if the irq interrupt, the pc pointer jump to 0x18 department; if the fiq interrupt, skip 0x1c at. generally save the irq or fiq exception vector address is the address of the interrupt service routine, so the pc pointer jumped into the interrupt service routine to handle interr

56、upts.(4) interrupt handling. due to the production of the arm processor manufacturers have integrated a lot of interrupt request source, such as the serial port interrupt, ad interrupt, external interrupt, timer interrupt and dma interrupt, it may be multiple interrupt sources request interrupt at t

57、he same time. in order to better distinguish between the various interrupt sources, in order to more accurately complete the task, the usual practice is defined for these interrupt priority level for each interrupt is set an interrupt flag. when an interrupt occurs, usually to determine the priority

58、 and access interrupt flag state to identify which an interrupt occurs. and then calls the appropriate function for interrupt handling.(5) return from the interrupt and restore the site. after completion of the interrupt service routine will restore the program to run status saved in the spsr to the cpsr r14 to save the interrupted programs address back to your pc, proceed to the interrupted program.中文翻譯：1 、armadvancedriscmachines arm（advancedriscmachines），既可以認(rèn)為是一