數(shù)字電路課程設(shè)計(jì)

1、.數(shù)字電路課程設(shè)計(jì)一 數(shù)字電子鐘 任務(wù)：用文本法或圖形法設(shè)計(jì)一個(gè)能顯示時(shí)、分、秒的數(shù)字電子鐘要求：1 設(shè)計(jì)由晶振電路產(chǎn)生標(biāo)準(zhǔn)信號(hào)的單元電路 2時(shí)為0023六十進(jìn)制計(jì)數(shù)器，分、秒為0059六十進(jìn)制計(jì)數(shù)器； 3 能夠顯示出時(shí)、分、秒； 4 具有清零，調(diào)節(jié)分鐘的功能； 5 具有整點(diǎn)報(bào)時(shí)功能，整點(diǎn)報(bào)時(shí)的同時(shí)LED燈花樣顯示、聲響電路發(fā)出叫聲； 6 對(duì)時(shí)、分、秒單元電路進(jìn)行仿真并紀(jì)錄； 7 選作部分：具有定時(shí)鬧鐘功能，可在任意設(shè)定一時(shí)間，到時(shí)自動(dòng)提醒，通過聲響電路發(fā)出叫聲。各模塊程序設(shè)計(jì):1. 秒計(jì)數(shù)模塊VHDL(second.vhd

2、)秒計(jì)數(shù)模塊中是以60進(jìn)制進(jìn)行循環(huán)的，故需要的秒數(shù)據(jù)輸出應(yīng)該是7位的，但是為了方便隨后的調(diào)整時(shí)間模塊設(shè)計(jì)，秒輸出數(shù)據(jù)用8位二進(jìn)制表示，其中低四位用于秒的低位，而高四位作為秒的高位。另外在該模塊下的程序由于考慮到系統(tǒng)功能中調(diào)整時(shí)鐘和分鐘的要求，故要在秒計(jì)數(shù)模塊中另外加入復(fù)位信號(hào)（reset）以及分鐘設(shè)置信號(hào)(setmin)。LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY SECOND IS PORT(RESET,CLK,SETMIN:IN STD_LOGIC;-系統(tǒng)時(shí)鐘、復(fù)位、分設(shè)置信

3、號(hào) DAOUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);-秒計(jì)數(shù)信號(hào) ENMIN:OUT STD_LOGIC);-分進(jìn)位信號(hào)END SECOND;ARCHITECTURE ART OF SECOND IS SIGNAL COUNT:STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL COUNTER:STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL CARRY_OUT1:STD_LOGIC; SIGNAL CARRY_OUT2:STD_LOGIC;BEGIN P1:PROCESS(RESET,CLK) BEGIN IF (R

4、ESET='0') THEN COUNT<="0000" COUNTER<="0000" ELSIF(CLK'EVENT AND CLK='1') THEN IF(COUNTER<5) THEN IF(COUNT=9) THEN COUNT<="0000" COUNTER<=COUNTER+1; ELSE COUNT<=COUNT+1; END IF; CARRY_OUT1<='0' ELSE IF(COUNT=9) THEN COUNT

5、<="0000" COUNTER<="0000" CARRY_OUT1<='1' ELSE COUNT<=COUNT+1; CARRY_OUT1<='0' END IF; END IF; END IF;END PROCESS P1;DAOUT(7 DOWNTO 4)<=COUNTER;DAOUT(3 DOWNTO 0)<=COUNT;ENMIN<=CARRY_OUT1 OR SETMIN;END ART;仿真結(jié)果：2. 分計(jì)數(shù)模塊VHDL（minute.vhd）分計(jì)數(shù)同秒計(jì)數(shù)

6、基本相同，由于均是60進(jìn)制的計(jì)數(shù)器，故思路完全一致。LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY MINUTE IS PORT(CLK,EN,SETHOUR:IN STD_LOGIC; DAOUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0); CO:OUT STD_LOGIC);END MINUTE;ARCHITECTURE ART OF MINUTE IS SIGNAL CC:STD_LOGIC;BEGIN PROCESS(CLK) VARIABLE CNT

7、1,CNT0:STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN IF(CLK'EVENT AND CLK='1') THEN IF(EN='1') THEN IF(CNT1<"0101" ) THEN IF(CNT0="1001") THEN CNT0:="0000" CNT1:=CNT1+1; ELSE CNT0:=CNT0+1; END IF; CC<='0' ELSE IF(cnt0="1001") THEN CNT0:

8、="0000" CNT1:="0000" CC<='1' ELSE CNT0:=CNT0+1; END IF; END IF; END IF; END IF; DAOUT<=CNT1&CNT0; END PROCESS;CO<=CC OR SETHOUR;END ART;仿真結(jié)果：3. 時(shí)計(jì)數(shù)模塊VHDL（hour.vhd） 時(shí)計(jì)數(shù)模塊的的設(shè)計(jì)思路同分、秒的類似，只是進(jìn)制由60進(jìn)制變成24進(jìn)制，且沒有了向前進(jìn)位信號(hào)。LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE

9、.STD_LOGIC_UNSIGNED.ALL;ENTITY HOUR IS PORT(CLK,EN:IN STD_LOGIC; DAOUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END HOUR;ARCHITECTURE ART OF HOUR ISBEGIN PROCESS(CLK) VARIABLE CNT1,CNT0:STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN IF (CLK'EVENT AND CLK='1') THEN IF EN='1' THEN if CNT1="0010&

10、quot; THEN if CNT0="0011" THEN CNT1:="0000" CNT0:="0000" ELSE CNT0:=CNT0+1; END IF; ELSE IF CNT0="1001" THEN CNT1:=CNT1+1; CNT0:="0000" ELSE CNT0:=CNT0+1; END IF; END IF; END IF; END IF; DAOUT<=CNT1&CNT0; END PROCESS;END ART;仿真結(jié)果：4. 時(shí)間設(shè)置模塊VHDL

11、（seltime.vhd）程序如下：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;USE IEEE.STD_LOGIC_ARITH.ALL;ENTITY SELTIME IS PORT(CKDSP,RESET:IN STD_LOGIC; SECOND:IN STD_LOGIC_VECTOR(7 DOWNTO 0); MINUTE:IN STD_LOGIC_VECTOR(7 DOWNTO 0); HOUR:IN STD_LOGIC_VECTOR(7 DOWNTO 0); DAOUT:OUT STD

12、_LOGIC_VECTOR(3 DOWNTO 0); SEL:OUT STD_LOGIC_VECTOR(2 DOWNTO 0);END SELTIME;ARCHITECTURE ART OF SELTIME IS SIGNAL SEC:STD_LOGIC_VECTOR(2 DOWNTO 0);BEGIN PROCESS(RESET,CKDSP) BEGIN IF(RESET='0') THEN SEC<="000" ELSIF(CKDSP'EVENT AND CKDSP='1') THEN IF(SEC="101&qu

13、ot;) THEN SEC<="000" ELSE SEC<=SEC+1; END IF; END IF; END PROCESS; PROCESS(SEC,SECOND,MINUTE,HOUR) BEGIN CASE SEC IS WHEN "000"=>DAOUT<=SECOND(3 DOWNTO 0); WHEN "001"=>DAOUT<=SECOND(7 DOWNTO 4); WHEN "010"=>DAOUT<=MINUTE(3 DOWNTO 0); WH

14、EN "011"=>DAOUT<=MINUTE(7 DOWNTO 4); WHEN "100"=>DAOUT<=HOUR(3 DOWNTO 0); WHEN "101"=>DAOUT<=HOUR(7 DOWNTO 4); WHEN OTHERS=>DAOUT<="0000" END CASE; END PROCESS; SEL<=SEC;END ART;仿真結(jié)果：5. 報(bào)時(shí)模塊VHDL（alert.vhd）喇叭在整點(diǎn)有時(shí)有報(bào)時(shí)驅(qū)動(dòng)信號(hào)產(chǎn)生，以及LED燈根據(jù)設(shè)計(jì)的

15、要求再整點(diǎn)時(shí)有花樣顯示信號(hào)產(chǎn)生（在整點(diǎn)時(shí)從51秒到59秒時(shí)從左到右九個(gè)LED登依次亮起）。Alert模塊產(chǎn)生整點(diǎn)報(bào)時(shí)的驅(qū)動(dòng)信號(hào)speak和LED燈花樣顯示信號(hào)lamp8.0。在分位計(jì)數(shù)到59分時(shí)，秒位為51、53、55、57、59秒時(shí)揚(yáng)聲器會(huì)發(fā)出一秒左右的警告音，并且51、53、55、57秒為低音，59秒為高音。程序如下：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY ALERT IS PORT(CLKSP:IN STD_LOGIC; SECOND,MINUTE:IN STD_LOG

16、IC_VECTOR(7 DOWNTO 0); SPEAK:OUT STD_LOGIC; LAMP:OUT STD_LOGIC_VECTOR(8 DOWNTO 0);END ALERT;ARCHITECTURE ART OF ALERT IS SIGNAL Q500,QLK:STD_LOGIC; SIGNAL M1,M0,S1,S0:STD_LOGIC_VECTOR(3 DOWNTO 0);BEGIN M1<=MINUTE(7 DOWNTO 4); M0<=MINUTE(3 DOWNTO 0); S1<=SECOND(7 DOWNTO 4); S0<=SECOND(3 D

17、OWNTO 0); PROCESS(CLKSP) BEGIN IF (CLKSP'EVENT AND CLKSP='1') THEN IF(M1="0101" AND M0="1001" AND S1="0101") THEN CASE S0 IS WHEN"0001"=>LAMP<="000000001" WHEN"0010"=>LAMP<="000000010" WHEN"0011"=

18、>LAMP<="000000100" WHEN"0100"=>LAMP<="000001000" WHEN"0101"=>LAMP<="000010000" WHEN"0110"=>LAMP<="000100000" WHEN"0111"=>LAMP<="001000000" WHEN"1000"=>LAMP<="0

19、10000000" WHEN"1001"=>LAMP<="100000000" WHEN OTHERS=>LAMP<="000000000" END CASE; IF(S0="0001" OR S0="0011" OR S0="0101" OR S0="0111") THEN Q500<='1' ELSE Q500<='0' END IF; SPEAK<=q500; els

20、e LAMP<=”000000000”; END IF; IF(M1="0101" AND M0="1001" AND S1="0101" AND S0="1001") THEN QLK<='1' ELSE QLK<='0' END IF; SPEAK<=QLK; SPEAK<=QLK OR Q500; END IF; END PROCESS;END ART;仿真結(jié)果：6. 顯示模塊VHDL（deled.vhd）譯碼輸出與十進(jìn)制對(duì)應(yīng)關(guān)系，譯碼輸出0111

21、1110000110101101110011111100110十進(jìn)制01234譯碼輸出11011011111101000011111111111101111十進(jìn)制56789程序如下：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;USE IEEE.STD_LOGIC_ARITH.ALL;ENTITY DELED IS PORT( S:IN STD_LOGIC_VECTOR(3 DOWNTO 0); RES:IN STD_LOGIC_VECTOR(2 DOWNTO 0); A,B,C:OUT STD

22、_LOGIC; D0,D1,D2,D3,D4,D5,D6:OUT STD_LOGIC);END DELED;ARCHITECTURE ART OF DELED IS SIGNAL DATA_4:STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL OUT_7:STD_LOGIC_VECTOR(6 DOWNTO 0); SIGNAL DATAIN_3:STD_LOGIC_VECTOR(2 DOWNTO 0);BEGIN DATA_4<=S; DATAIN_3<=RES; A<=DATAIN_3(0); B<=DATAIN_3(1); C<=DAT

23、AIN_3(2); D0<=OUT_7(0); D1<=OUT_7(1); D2<=OUT_7(2); D3<=OUT_7(3); D4<=OUT_7(4); D5<=OUT_7(5); D6<=OUT_7(6);PROCESS(DATA_4) BEGIN CASE DATA_4 IS WHEN"0000"=>OUT_7<="0111111" WHEN"0001"=>OUT_7<="0000110" WHEN"0010"=>

24、OUT_7<="1011011" WHEN"0011"=>OUT_7<="1001111" WHEN"0100"=>OUT_7<="1100110" WHEN"0101"=>OUT_7<="1101101" WHEN"0110"=>OUT_7<="1111101" WHEN"0111"=>OUT_7<="0000111&q

25、uot; WHEN"1000"=>OUT_7<="1111111" WHEN"1001"=>OUT_7<="1101111" WHEN OTHERS =>OUT_7<="0000000" END CASE; END PROCESS;END ART;仿真結(jié)果：7. 電路連接;8. 實(shí)驗(yàn)總結(jié)設(shè)計(jì)感想： 通過這次設(shè)計(jì)，進(jìn)一步加深了對(duì)EDA的了解，讓我對(duì)他有了更加濃厚的興趣。特別是每當(dāng)每一個(gè)子模塊編寫測試成功時(shí)，心里特別開心。雖然在設(shè)計(jì)過程中遇到一些困難但解決這些問題

26、的過程無疑是對(duì)自己自身專業(yè)素質(zhì)的一種提高?？偟膩碚f，這次設(shè)計(jì)的數(shù)字鐘還是比較成功的，有點(diǎn)小小的成就感，終于覺得所學(xué)的知識(shí)有了實(shí)用的價(jià)值，達(dá)到了理論與實(shí)際相結(jié)合的目的，不僅學(xué)到了不少知識(shí)而且鍛煉了能力，使自己對(duì)以后的路有了更加清楚的認(rèn)識(shí)，同時(shí)對(duì)未來有了更多的信心。 感謝常老師在設(shè)計(jì)過程中對(duì)我們出現(xiàn)的問題進(jìn)行詳細(xì)而具體的解答，以及對(duì)我們?cè)O(shè)計(jì)的各種啟發(fā)，同時(shí)也感謝在設(shè)計(jì)時(shí)同學(xué)們給予的幫助。二 交通燈控制邏輯電路設(shè)計(jì)任務(wù)：用CPLD設(shè)計(jì)路口交通燈控制器要求：1 滿足如下時(shí)序要求：南北方向紅燈亮，東西方向綠燈亮；南北方向綠燈亮， 東西方向紅燈亮； 2 每一方向的紅（綠）黃燈

27、總共維持30秒； 3 十字路口要有時(shí)間顯示，具體為：當(dāng)某一方向綠燈亮?xí)r，置顯示器為30秒，然后以每秒減1計(jì)數(shù)方式工作，直至減到數(shù)為4秒時(shí)，紅綠燈熄滅，黃燈開始間隙閃耀4秒，減到0時(shí)，紅綠燈交換，一次工作循環(huán)結(jié)束，進(jìn)入下一步另一方向的工作循環(huán)；4 紅綠黃燈均采用發(fā)光二極管；5 設(shè)計(jì)由晶振電路產(chǎn)生1Hz標(biāo)準(zhǔn)秒信號(hào)的單元電路 6 要求對(duì)整體電路進(jìn)行仿真，觀察并紀(jì)錄下仿真波形；7 選作部分：可以手動(dòng)調(diào)整和自動(dòng)控制，夜間為黃燈閃耀；8 選作部分：東西方向或南北方向上的綠燈亮變?yōu)榧t燈亮，中間需插入黃燈閃耀4秒 過渡，而從紅燈亮變?yōu)榫G燈亮，不需要黃

28、燈過渡，直接由紅燈變?yōu)榫G燈。單元電路設(shè)計(jì)1.傳感器狀態(tài)設(shè)計(jì)。Sens(0)、Sens(1)分別為主、支道安裝的傳感器，檢測是否有車輛通過。主道支道均沒車時(shí)sens=”00”,主道支道均有車時(shí)sens=”11”，主道有車支道沒車時(shí)sens=”10”,主道沒車支道有車時(shí)sens=”01”。此程序中用case語句定義。2.狀態(tài)寄存器設(shè)計(jì)。 利用傳感器的四種輸入狀態(tài)控制交通紅綠燈的四種輸出狀態(tài)，xianshi作為狀態(tài)寄存器，它的四種輸出控制交通燈的四種狀態(tài)，即xianshi=”00” 時(shí)Rm<='0'Ym<='1'Gm<='0'Rf&l

29、t;='1'Yf<='0'Gf<='0'；xianshi=”11”時(shí)Rm<='1'Ym<='0'Gm<='0'Rf<='0'Yf<='0'Gf<='1'；xianshi=”01”時(shí)Rm<='0'Ym<='0'Gm<='1'Rf<='1'Yf<='0'Gf<='0'；xians

30、hi=”10”時(shí)Rm<='1'Ym<='0'Gm<='0'Rf<='0'Yf<='1'Gf<='0'。1代表燈亮，0代表燈不亮。3.中間變量設(shè)計(jì)。變量fx,fx0作為中間變量，負(fù)責(zé)傳感器與交通燈輸出的連接，1代表燈亮，0代表不亮。器件編程 1實(shí)驗(yàn)程序LIBRARY ieee;USE ieee.std_logic_1164.ALL;USE ieee.std_logic_unsigned.ALL;ENTITY xhd ISPORT(clk0,sens_m,sens_f

31、:IN std_logic;Rm,Ym,Gm:OUT std_logic;Rf ,Yf,Gf,fx1:OUT std_logic);END xhd;-ARCHITECTURE behave OF xhd ISSIGNAL sens:std_logic_vector(1 DOWNTO 0);SIGNAL xianshi:std_logic_vector(1 DOWNTO 0);BEGIN sens(0)<=sens_f; sens(1)<=sens_m;zhuangtaiyima:process(clk0)VARIABLE fx:bit:='0' VARIABLE f

32、x0:bit:='0' VARIABLE time:integer:=0;beginif(clk0'event and clk0='1') thenif(time<20) then time:=time+1;end if;end if;case sens ISWHEN "11" => if(time>=20) then fx:=not fx0;end if;WHEN "01" => fx:='0'WHEN "10" => fx:='1'WHEN "00" => fx:='1'WHEN others => fx:='1'end case;if(fx/=fx0)then fx0:=fx;time:=0;end if;if(fx='0') then fx1<='0'else fx1<='1'end if;if(fx='1') then xianshi(1)<='0'else xianshi(1)<='1'end