基于單片機(jī)的路燈控制系統(tǒng)設(shè)計(jì)開(kāi)題報(bào)告

1、畢業(yè)設(shè)計(jì)（論文）材料之二（2）安徽工程大學(xué)機(jī)電學(xué)院本科畢業(yè)設(shè)計(jì)（論文）開(kāi)題報(bào)告基于單片機(jī)的路燈控制系統(tǒng)設(shè)計(jì)課題類型：設(shè)計(jì) 實(shí)驗(yàn)研究口 論文口學(xué)生姓名：學(xué) 號(hào)：專業(yè)班級(jí)：教學(xué)單位：指導(dǎo)教師：開(kāi)題時(shí)間：2012年3月13日開(kāi)題報(bào)告內(nèi)容與要求一、本課題的內(nèi)容及研究意義1 、論文研究的目的和意義如今， 照明電路的數(shù)量越來(lái)越多，使得路燈的用電量占城市用電量的比重越來(lái)越大，在用電高峰期時(shí)，電網(wǎng)超負(fù)荷運(yùn)行，電網(wǎng)電壓都低于額定值，在用電低谷期供電電壓又高于額定值，當(dāng)電壓高時(shí)不但影響照明設(shè)備的使用壽命，而且耗電量也大幅增加，當(dāng)?shù)凸葧r(shí)，照明設(shè)備有不能正常工作。所以，對(duì)城市的路燈的設(shè)計(jì)已經(jīng)成為了當(dāng)務(wù)之急，特別是午夜

2、之后車(chē)流量急劇減少時(shí)，應(yīng)該適當(dāng)?shù)年P(guān)閉路燈，節(jié)約用電。但是我國(guó)的既節(jié)能又能延長(zhǎng)路燈壽命的技術(shù)相比國(guó)外卻是落后了，因此路燈控制系統(tǒng)的設(shè)計(jì)對(duì)于城市的發(fā)展至關(guān)重要。本論文旨在設(shè)計(jì)一套對(duì)外界光線和電壓信號(hào)的采集來(lái)控制路燈的自動(dòng)啟停以及智能調(diào)壓的控制系統(tǒng)，它能對(duì)路燈進(jìn)行穩(wěn)壓、調(diào)壓、自啟動(dòng)并延長(zhǎng)路燈壽命的作用。2 、 論文研究?jī)?nèi)容本設(shè)計(jì)可以通過(guò)對(duì)外界光線和電壓信號(hào)的采集來(lái)控制路燈的自動(dòng)啟停以及智能調(diào)壓從而減少城市路燈照明耗電量，又對(duì)輸入電壓進(jìn)行穩(wěn)壓調(diào)節(jié)來(lái)提高用電效率。要求學(xué)生獨(dú)立選擇芯片、設(shè)計(jì)電路、編制程序、調(diào)試、完成整個(gè)系統(tǒng)功能。主要內(nèi)容如下：(1) 根據(jù)控制技術(shù)的特點(diǎn)，進(jìn)行路燈系統(tǒng)設(shè)計(jì)的整體研究與設(shè)計(jì)。

3、(2) 針對(duì)光線和電壓信號(hào)的采集，采用數(shù)據(jù)采集技術(shù)。(3) 通過(guò)按鍵可對(duì)相關(guān)的參數(shù)值進(jìn)行設(shè)置，從而實(shí)現(xiàn)對(duì)不同時(shí)間進(jìn)行不同的開(kāi)燈模式。(4) 當(dāng)電壓符合額定電壓時(shí)，系統(tǒng)自動(dòng)進(jìn)行穩(wěn)壓。(5) 在午夜之后降低電壓以調(diào)節(jié)路燈亮度，實(shí)現(xiàn)調(diào)壓。二、本課題的研究現(xiàn)狀和發(fā)展趨勢(shì)目前，路燈系統(tǒng)一般采用鈉燈、水銀燈、金鹵燈等燈具。這類燈具有發(fā)光效率高、光色好、安裝簡(jiǎn)易等優(yōu)點(diǎn)，被廣泛使用，但同時(shí)也存在著諸如：功率因子低、對(duì)電壓要求嚴(yán)格、耗電量大等缺點(diǎn)。我國(guó)目前大部分城市都采用全夜燈的方式進(jìn)行照明，普遍存在的問(wèn)題有兩點(diǎn)：一方面因?yàn)楹蟀胍剐腥讼∩?，采用全夜燈的方式浪費(fèi)太大，因此， 有的地方采取前半夜全亮，后半夜全滅的照

4、明方式；有的地方在后半夜采用亮一隔一或亮一隔二的節(jié)能措施，此種方式雖然節(jié)約了電費(fèi)支出，卻帶來(lái)了社會(huì)治安和交通安全問(wèn)題，不利于城市安全問(wèn)題。另一方面，在后半夜因行人稀少，而應(yīng)該降低路燈的亮度，以避免光源污染，影響居民的晚間的休息。但由于后半夜是用電低谷期，電力系統(tǒng)電壓升高，路燈反而比白天更亮了。這不僅造成了能源浪費(fèi)，還大大影響了設(shè)備和燈具的使用壽命。目前，路燈照 明廣泛采用高壓鈉燈，其設(shè)計(jì)壽命在 12000小時(shí)以上，在正常情況下至少可用 3年，但 是由于超壓使用，現(xiàn)在路燈的使用壽命僅僅只有 1年左右，有的甚至只有幾個(gè)月，造成 維護(hù)和材料的極大浪費(fèi)。較高的電壓不僅不能讓負(fù)載設(shè)備更好的工作，而且還會(huì)

5、造成發(fā) 熱及過(guò)早損壞，還會(huì)造成不必要的電費(fèi)開(kāi)支。而且，我國(guó)絕大多數(shù)地區(qū)的路燈關(guān)開(kāi)燈都是采用人工控制或者定時(shí)控制，這樣也有 許多不利之處：若采用人工控制，則路燈開(kāi)關(guān)存在著一定的不確定性，同時(shí)也占用了一 定的人力資源；定時(shí)控制則存在著夏冬季白黑晝時(shí)間不同的情況，使得天還沒(méi)黑路燈就 開(kāi)，天還沒(méi)亮路燈就滅的情況，大大影響了人們的日常出生活。本設(shè)計(jì)通過(guò)使用AT89C51 單片機(jī)對(duì)系統(tǒng)進(jìn)行智能控制，使系統(tǒng)達(dá)到自動(dòng)啟停及智能調(diào)壓。近年來(lái)，隨著科技的不斷發(fā)展，各種路燈控制器也被不斷的研究出來(lái)。其中，美國(guó) 和日本主要集中在研究緊湊型熒光燈和鎮(zhèn)流器熒光燈兩個(gè)方面。而我國(guó)目前的市場(chǎng)上有多種路燈節(jié)能控制產(chǎn)品，能達(dá)到一

6、定的節(jié)能效果，但就功能和效果上還不能盡如人意， 主要有以下幾種情況：第一種，采用自耦變壓器及磁飽和電抗器的降壓技術(shù)。具不足是 由于反應(yīng)速度較慢，用電高峰時(shí)電壓降到非穩(wěn)定區(qū)容易造成燈光閃滅，不能自動(dòng)調(diào)節(jié)， 同時(shí)如果電壓突然升高，則會(huì)對(duì)燈具造成損壞，相對(duì)來(lái)說(shuō)穩(wěn)壓效果較差；第二種是采用 電子器件構(gòu)成的可控硅式設(shè)備。該設(shè)備主要采取簡(jiǎn)單的相控技術(shù)，不足之處是元器件較 容易發(fā)熱損壞。而為了更好的達(dá)到控制的目的，現(xiàn)在國(guó)內(nèi)外都開(kāi)始采用智能控制方式， 如光控、聲控、時(shí)控等，國(guó)外甚至開(kāi)始采用太陽(yáng)能供能光控方式來(lái)控制路燈，基本可以 達(dá)到完全自給自足的效果。綜上所述，未來(lái)的智能路燈控制必將向著更安全、更環(huán)保、更節(jié)能、

7、更高效率的方 向發(fā)展。三、本課題的研究方案及工作計(jì)劃1、設(shè)計(jì)方案本次課程設(shè)計(jì)是由傳感器通過(guò)外界光信號(hào)的強(qiáng)弱來(lái)產(chǎn)生電壓信號(hào)，再由單片機(jī)控制實(shí)現(xiàn)路燈的自動(dòng)啟停及智能穩(wěn)壓。本設(shè)計(jì)通過(guò)使用AT89C51單片機(jī)芯片來(lái)設(shè)計(jì)電路，編制程序，仿真，調(diào)試，完成整個(gè)系統(tǒng)的功能。整個(gè)控制系統(tǒng)主要包括四個(gè)模塊：信號(hào) 采集模塊、數(shù)據(jù)處理模塊、穩(wěn)壓模塊和控制模塊。2、技術(shù)路線設(shè)計(jì)要求采集輸入電壓信號(hào)，通過(guò)A/D轉(zhuǎn)換后輸入控制器，當(dāng)外界光信號(hào)的強(qiáng)度低 于一定數(shù)值時(shí)，通過(guò)軟啟動(dòng)開(kāi)啟路燈。當(dāng)光信號(hào)強(qiáng)度高于一定數(shù)值時(shí)，通過(guò)軟啟動(dòng)關(guān)閉 路燈，并將采集輸入電壓信號(hào)，與已設(shè)定的標(biāo)準(zhǔn)電壓值進(jìn)行比較，并對(duì)輸入電壓進(jìn)行穩(wěn) 壓，再通過(guò)時(shí)鐘電路

8、對(duì)路燈亮度進(jìn)行調(diào)節(jié)，在午夜之后對(duì)路燈亮度進(jìn)行降低，最后達(dá)到 節(jié)電穩(wěn)壓。技術(shù)方案如下圖：外部光線強(qiáng)度光敏電阻A/D轉(zhuǎn)換器AT89C51I片機(jī)3、關(guān)鍵問(wèn)題信號(hào)采集電路設(shè)計(jì)該模塊需要檢測(cè)環(huán)境光的變化，根據(jù)環(huán)境光的明暗進(jìn)行路燈開(kāi)關(guān)的自動(dòng)控制?；?此要求采用由光敏電阻組成的分壓電路進(jìn)行檢測(cè)。光敏電阻器又稱光導(dǎo)管，特性是在 特定光的照射下，其阻值迅速減小，可用于檢測(cè)可見(jiàn)光。在不同的光強(qiáng)下，光敏電 阻的電阻值會(huì)發(fā)生明顯變化，光敏電阻器是利用半導(dǎo)體的光電效應(yīng)制成的一種電阻 值隨入射光的強(qiáng)弱而改變的電阻器；入射光強(qiáng)，電阻減小，入射光通過(guò)檢測(cè)不同光 強(qiáng)下電阻值的變化量來(lái)控制路燈的開(kāi)和關(guān)。(2)穩(wěn)壓模塊設(shè)計(jì)通過(guò)采

9、集三端穩(wěn)壓器輸出的電壓并將該電壓與設(shè)定電壓進(jìn)行比較，進(jìn)而調(diào)整輸出電壓的大小，達(dá)到穩(wěn)壓的目的。本設(shè)計(jì)使用美國(guó)國(guó)家半導(dǎo)體公司的三端可調(diào)正穩(wěn)壓器集成 電路LM317。時(shí)鐘電路設(shè)計(jì)為實(shí)現(xiàn)路燈對(duì)電壓進(jìn)行智能補(bǔ)償，從而達(dá)到智能調(diào)壓，本設(shè)計(jì)采用美國(guó)DALLAS公司的實(shí)時(shí)時(shí)鐘電路 DS1302,該芯片一種高性能、低功耗、帶 RAM的實(shí)時(shí)時(shí)鐘電 路，它可以對(duì)年、月、日、周日、時(shí)、分、秒進(jìn)行計(jì)時(shí)，具有閏年補(bǔ)償功能，工作 電壓為2.5V5.5V。采用三線接口與 CPU進(jìn)行同步通信，并可采用突發(fā)方式一次 傳送多個(gè)字節(jié)的時(shí)鐘信號(hào)或RAM數(shù)據(jù)。DS1302內(nèi)部有一個(gè)31X8的用于臨時(shí)性存放數(shù)據(jù)的RAM寄存器。另外該芯片有

10、備份電源引腳，可以在斷電后仍能工作，以保 證時(shí)鐘的準(zhǔn)確性。3、時(shí)間安排(1) 2012.2.20- 2012.2.29(2) 2012.3.1 2012.4.1(3) 2012.4.1 2012.4.20(4) 2012.4.20- 2012.5.10(5) 2012.5.10- 2012.5.30(6) 2012.6.12012.6.20查閱相關(guān)資料，理解設(shè)計(jì)任務(wù)書(shū)。搜索資料，完成開(kāi)題報(bào)告。硬件調(diào)試，排除故障直至滿足設(shè)計(jì)要求 軟件調(diào)試，排除故障直至滿足設(shè)計(jì)要求C 整理資料，按要求撰寫(xiě)論文，完成初稿C 論文整定，最終定稿，準(zhǔn)備答辯。四、主要參考文獻(xiàn)1 查兵，崔浩. 單片機(jī)原理J. 中國(guó)高新技術(shù)

11、,2011 年 1 期2 李健，蔣全勝，任靈芝. 智能路燈控制系統(tǒng)設(shè)計(jì)J. 工業(yè)控制計(jì)算機(jī),2010年 6期3 金仁貴 . 單片機(jī)應(yīng)用系統(tǒng)的開(kāi)發(fā)方法J. 電腦知識(shí)與技術(shù)：學(xué)術(shù)交流,2006 年 12期4 嚴(yán)懷龍 . 基于單片機(jī)的數(shù)據(jù)采集系統(tǒng)J. 廣西輕工業(yè),2006年 6期5 王虎城，周晉軍，皮依標(biāo)，葉振華. 基于光傳感器和單片機(jī)的校園路燈控制系統(tǒng)設(shè)計(jì) J. 科技廣場(chǎng),2011 年 1 期6 王立紅 . 基于單片機(jī)的智能路燈控制系統(tǒng)J. 網(wǎng)絡(luò)財(cái)富 ,2010年 6 期7 王皚， 佘丹妮 . 基于單片機(jī)的模擬路燈控制系統(tǒng)設(shè)計(jì)J. 儀表技術(shù),2011 年 11 期8 張毅剛 . 單片機(jī)原理及應(yīng)用M

12、 . 高等教育出版社,20039 閻石 . 數(shù)字電子技術(shù)基礎(chǔ)M . 高等教育出版社,200610 童詩(shī)白，華成英. 模擬電子技術(shù)基礎(chǔ)M . 高等教育出版社,200611 程德福，林君. 智能儀器M . 機(jī)械工業(yè)出版社,200912 刁鳴 . 常用電路模塊分析與設(shè)計(jì)指導(dǎo)M . 清華大學(xué)出版社,200813 Xu Jun, Peng Yonglong, Li Yabi. Study of Energy-saving Solar StreetLight Using LED Based on MCU-controlled (J). Test & measurementtechnology. 2

13、008, (10):29-3114 LIU Lianhao, A new street lamp controller design (J). ComputingTechnology and Automation, 1997, (4):61-6315 ZHANG Liqun, Single-chip single board controller from time to timein the street lamp factory control (J). Application of EnergyTechnologies, 1998, (4):33-3416 The Introductio

14、n of AT89C51英文原文：( From: The Introduction of AT89C51)The Introduction of AT89C51DescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel s-dheingshity nonvolatile

15、 memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atme

16、l AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five v

17、ector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing t

18、he RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC ： Supply voltage.GND ： Ground.Port 0Port 0 is an 8-bit open-drai

19、n bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In thi

20、s mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers

21、 can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address

22、bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2

23、 pins that are externally being pulled low will source current, becauseof the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pull

24、upswhen emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directi

25、onal I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the

26、 pullups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:Part PinAlternate FunctionsP3.0RXD (serial input iportjP3 vTXD (serial output port)P3.2INTO (external interrupt 0)P3.3INT1 (external interrupt 1)P3.4TO (1imer 0 external input)P3.5T1 (timer 1 xterrwl

27、 input)P3.6WR (external data memory write strobe)P3.7RD (external data memory read strobe)Port 3 also receives some control signals for Flash programming and verificationRSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch

28、Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or cloc

29、king purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Set

30、ting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When theAT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activati

31、ons are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally

32、 latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating cir

33、cuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used.

34、 To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minim

35、um and maximum voltage high and low time specifications must be observed.T CT 年XIAL2NCKTAL2Figure 1. Oscillator ConnectionsConfigurationXI7XL1GNDEXTERNALOSCILLATORSIGNALXTAL1GNDFigure 2. External Clock DriveIdle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain a

36、ctive. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the

37、device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected wr

38、ite to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the osc川ator is stopped, and the instruction that invokes power-down is the last instructio

39、n executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit frompower-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its norm

40、al operating level and must be held active long enough to allow the osc川ator to restart and stabilize.Status of External Pins During Idle and Pov/er'down ModesModeProgram MainuryALEPSENPORTOPORT1PORT2PORT3IdlQimerna11DataDataDataDataIdleExternal11FioaiataAddressDotaIRzwer-downIniernal00DataDataD

41、atflQataPcwor downExtW 同QQFtaiDataDataDaQProgram Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below.Lock Bit Protection ModesPiogram Lock BitsPiot»clion Typ«LB1LB2L日曰1UULNo

42、program lock lures2PUUMOVC； ndructlont oxocinod from oxtornal program marwy oro di® lad frem Mchhg cods bytei from InitrnAl mftriCfy. EA Is sampled and latched on nMH and fudhr ptogramiriing M 講電 Rash Is disabted3PPUSame as mooe aec- nfy is dialed4PPPSA(ne os mode 3, oh。external executiori a du

43、eledWhen lock bit 1 is programmed, the logic level at the EA pin is sampled and latchedduring reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with

44、the current logic level at that pin in order for the device to function properly.譯文 ：AT89C51 的介紹描述AT89C51 是一個(gè)低電壓，高性能 CMOS 8 位單片機(jī)帶有4K 字節(jié)的可反復(fù)擦寫(xiě)的程序存儲(chǔ)器（PENROM） 。這種器件采用ATMEL 公司的高密度、不容易丟失存儲(chǔ)技術(shù)生產(chǎn)， 并且能夠與MCS-51 系列的單片機(jī)兼容。片內(nèi)含有8 位中央處理器和閃爍存儲(chǔ)單元，有較強(qiáng)的功能的AT89C51 單片機(jī)能夠被應(yīng)用到控制領(lǐng)域中。功能特性AT89C51 提供以下的功能標(biāo)準(zhǔn)：4K 字節(jié)閃爍存儲(chǔ)器，128 字節(jié)隨

45、機(jī)存取數(shù)據(jù)存儲(chǔ)器， 32個(gè) I/O 口， 2 個(gè) 16 位定時(shí)/計(jì)數(shù)器，1 個(gè) 5向量?jī)杉?jí)中斷結(jié)構(gòu)，1 個(gè)串行通信口，片內(nèi)震蕩器和時(shí)鐘電路。另外，AT89C51 還可以進(jìn)行0HZ 的靜態(tài)邏輯操作，并支持兩種軟件的節(jié)電模式。閑散方式停止中央處理器的工作，能夠允許隨機(jī)存取數(shù)據(jù)存儲(chǔ)器、定時(shí) / 計(jì)數(shù)器、串行通信口及中斷系統(tǒng)繼續(xù)工作。掉電方式保存隨機(jī)存取數(shù)據(jù)存儲(chǔ)器中的內(nèi)容，但震蕩器停止工作并禁止其它所有部件的工作直到下一個(gè)復(fù)位。引腳描述VCC ：電源電壓GND:地P0 口P0 口是一組8位漏極開(kāi)路雙向I/O 口，即地址/數(shù)據(jù)總線復(fù)用口。作為輸出口時(shí)，每一個(gè)管腳都能夠驅(qū)動(dòng)8 個(gè) TTL 電路。當(dāng)“1”被

46、寫(xiě)入P0 口時(shí)，每個(gè)管腳都能夠作為高阻抗輸入端。P0 口還能夠在訪問(wèn)外部數(shù)據(jù)存儲(chǔ)器或程序存儲(chǔ)器時(shí)，轉(zhuǎn)換地址和數(shù)據(jù)總線復(fù)用，并在這時(shí)激活內(nèi)部的上拉電阻。P0 口在閃爍編程時(shí)，P0 口接收指令，在程 序校驗(yàn)時(shí)，輸出指令，需要接電阻。P1 口P1 口一個(gè)帶內(nèi)部上拉電阻的8位雙向I/O 口，P1的輸出緩沖級(jí)可驅(qū)動(dòng)4個(gè)TTL電 路。對(duì)端口寫(xiě)“ 1”，通過(guò)內(nèi)部的電阻把端口拉到高電平，此時(shí)可作為輸入口。因?yàn)閮?nèi) 部有電阻，某個(gè)引腳被外部信號(hào)拉低時(shí)輸出一個(gè)電流。閃爍編程時(shí)和程序校驗(yàn)時(shí)，P1口接收低8位地址。P2 口P2 口是一個(gè)內(nèi)部帶有上拉電阻的 8位雙向I/O 口，P2的輸出緩沖級(jí)可驅(qū)動(dòng)4個(gè)TTL 電路。對(duì)端

47、口寫(xiě)“ 1”，通過(guò)內(nèi)部的電阻把端口拉到高電平，此時(shí)，可作為輸入口。因 為內(nèi)部有電阻，某個(gè)引腳被外部信號(hào)拉低時(shí)會(huì)輸出一個(gè)電流。在訪問(wèn)外部程序存儲(chǔ)器或 16位地址的外部數(shù)據(jù)存儲(chǔ)器時(shí)，P2 口送出高8位地址數(shù)據(jù)。在訪問(wèn)8位地址的外部數(shù) 據(jù)存儲(chǔ)器時(shí)，P2 口線上的內(nèi)容在整個(gè)運(yùn)行期間不變。閃爍編程或校驗(yàn)時(shí)， P2 口接收高 位地址和其它控制信號(hào)。P3 口P3 口是一組帶有內(nèi)部電阻的 8位雙向I/O 口，P3 口輸出緩沖故可驅(qū)動(dòng)4個(gè)TTL電 路。對(duì)P3 口寫(xiě)如“1”時(shí)，它們被內(nèi)部電阻拉到高電平并可作為輸入端時(shí)，被外部拉低 的P3 口將用電阻輸出電流。P3 口除了作為一般的I/O 口外，更重要的用途是它的第

48、二功能，如下表所示：端口引腳第二功能P3.0RXDP3.1TXDP3.2INTOP3.3INT1P3.4T0P3.5T1P3.6WRP3.7RDP3 口還接收一些用于閃爍存儲(chǔ)器編程和程序校驗(yàn)的控制信號(hào)。RST復(fù)位輸入。當(dāng)震蕩器工作時(shí)，RET引腳出現(xiàn)兩個(gè)機(jī)器周期以上的高電平將使單片機(jī) 復(fù)位。ALE/ pR0G當(dāng)訪問(wèn)外部程序存儲(chǔ)器或數(shù)據(jù)存儲(chǔ)器時(shí)，ALE輸出脈沖用于鎖存地址的低 8位字 節(jié)。即使不訪問(wèn)外部存儲(chǔ)器，ALE以時(shí)鐘震蕩頻率的1/16輸出固定的正脈沖信號(hào)，因 此它可對(duì)輸出時(shí)鐘或用于定時(shí)目的。要注意的是：每當(dāng)訪問(wèn)外部數(shù)據(jù)存儲(chǔ)器時(shí)將跳過(guò)一 個(gè)ALE脈沖時(shí)，閃爍存儲(chǔ)器編程時(shí)，這個(gè)引腳還用于輸入編程

49、脈沖。如果必要，可對(duì) 特殊寄存器區(qū)中的8EH單元的D0位置禁止ALE操作。這個(gè)位置后只有一條 MOVX和 MOVC指令A(yù)LE才會(huì)被應(yīng)用。止匕外，這個(gè)引腳會(huì)微弱拉高，單片機(jī)執(zhí)行外部程序時(shí)， 應(yīng)設(shè)置ALE無(wú)效。PSEN程序儲(chǔ)存允許輸出是外部程序存儲(chǔ)器的讀選通信號(hào)，當(dāng)AT89C51由外部程序存儲(chǔ)器讀取指令時(shí)，每個(gè)機(jī)器周期兩次 PSEN有效，即輸出兩個(gè)脈沖。在此期間，當(dāng)訪問(wèn)外 部數(shù)據(jù)存儲(chǔ)器時(shí)，這兩次有效的 PSEN信號(hào)不出現(xiàn)。EA/VPP外部訪問(wèn)允許。欲使中央處理器僅訪問(wèn)外部程序存儲(chǔ)器，EA端必須保持低電平。需要注意的是：如果加密位 LBI被編程，復(fù)位時(shí)內(nèi)部會(huì)鎖存 EA端狀態(tài)。如EA端為高 電平，CPU則執(zhí)行內(nèi)部程序存儲(chǔ)器中的指令。閃爍存儲(chǔ)器編程時(shí)，該引腳加上 +12V的 編程允許電壓VPP,當(dāng)然這必須是該器件是使用12V編程電壓VPP。XTAL1 :震蕩器反相放大器及內(nèi)部時(shí)鐘發(fā)生器的輸入端。XTAL2 :震蕩器反相放大器的輸出端。時(shí)鐘震蕩器AT89C51中有一個(gè)用于構(gòu)成內(nèi)部震蕩器的高增益反相放大器，引腳 XTAL1和 XTAL2分別是該放大器的輸入端和輸出端。這