BIOS基本概念和架構(gòu)

1、訓(xùn)練課程學(xué)習(xí)BIOS基本概念和架構(gòu)主講: 趙呈學(xué) 2004.05.281簡(jiǎn)介 1. BIOS定義2. BIOS作用3. BIOS開(kāi)機(jī)時(shí)簡(jiǎn)易流程圖3. BIOS/CMOS設(shè)置4. POST CODE5. BIOS接手控制權(quán)原理6. 系統(tǒng)Memory address map21.BIOS定義Basic Input/Output System縮寫(xiě).A Firmware program存儲(chǔ)在ROM or EPROM or FlashROM內(nèi)存中,提供最基本的硬件初始化(initialize) and 外圍控制的必要程序代碼.通常使用匯編語(yǔ)言編寫(xiě).3Question: What is the BIOS?

2、 The BIOS on a PC is often referred to as FIRMWARE, which is software that is programmed onto a Read Only Memory (ROM) chip.The function of the BIOS is to initialize the motherboard hardware andother peripherals, and loading the operating system. Many of the Plug-n-Play and Power Management function

3、s are handled by the BIOS.The BIOS has specific functions, often referred to as BIOS I/O functions“ or calls, which the operating system and application software uses to carry out tasks or get information on system resources.The BIOS then communicates directly with the hardware to carry out thefunct

4、ions. This is how the BIOS isolates the details of a particularhardware implementation from the operating system or application software. The BIOS is very specifically designed to the hardware platform. A BIOSdesigned for one system generally will not operate properly (if at all)on another system un

5、less the two systems are identical in design. Simplyput, the BIOS is like a fingerprint. 4ROM種類(lèi)1. PROM (Programmable ROM) 可編程存儲(chǔ)器,出廠時(shí)每個(gè)字節(jié)數(shù)據(jù)都是FF,可以用燒寫(xiě)器將數(shù)據(jù)寫(xiě)入,只能寫(xiě)入一次.2. Mask ROM 出廠時(shí)就已經(jīng)有特定的程序/數(shù)據(jù)碼,內(nèi)容無(wú)法自行修改或燒寫(xiě).3. EPROM (Erasable PROM) PROM的改良,使用貲外線照射後所有字節(jié)恢復(fù)成FF.用戶可以重新燒寫(xiě)新的程序/數(shù)據(jù)碼.4. Flash ROM 快速只讀存儲(chǔ)器,是當(dāng)今最當(dāng)紅的內(nèi)

6、存種類(lèi).5Flash ROM1.先前寫(xiě)入的數(shù)據(jù)無(wú)法被擦除or破壞,即時(shí)關(guān)掉電源之後內(nèi)容仍舊存在.這一定是ROM的特性.2.不過(guò)在特殊工具程序的配合以及相關(guān)硬件的設(shè)置在某種特定電壓之下,內(nèi)部存儲(chǔ)的程序代碼/數(shù)據(jù)可以被擦除,並且可以重新修改寫(xiě)入新版本的程序/數(shù)據(jù).3.讀取的最小單位是一個(gè)byte,但擦除/寫(xiě)入的單位是以一個(gè)block,區(qū)塊的大小從4K,8K到16K不等.6BIOS的工作1. POST(Power On SelfTest,開(kāi)機(jī)自測(cè)試) 開(kāi)機(jī)系統(tǒng)將控制權(quán)交給bios時(shí),它會(huì)針對(duì)CPU各項(xiàng)寄存器,先檢查是否運(yùn)行正常,接下來(lái)檢查頻率發(fā)生器and可編程中斷控制器and DMA控制器的狀態(tài).2

7、. Initial(初始化) 針對(duì)動(dòng)態(tài)內(nèi)存DRAM and 主板芯片組 and 顯卡以及相關(guān)外圍的寄存器register做Initialize設(shè)置,並檢測(cè)是否能夠正常工作. 所謂初始化就是根據(jù)芯片組技術(shù)文件的規(guī)定,做一些寄存器填值/改位的動(dòng)作.7BIOS的工作(續(xù))3. 紀(jì)錄系統(tǒng)的設(shè)置值,並且存儲(chǔ)在非揮發(fā)性?xún)?nèi)存(Non-Volatile RAM),像CMOS或Flash Memory(ESCD區(qū)域)等.4. 將常駐程序庫(kù)(Runtime Program)常駐於某一段內(nèi)存中,提供給操作系統(tǒng)或應(yīng)用程序調(diào)用,像Int 10h,Int 13h之類(lèi)的函數(shù).Int 10h:屏幕I/O接口,提供顯示服務(wù)In

8、t 13h:磁盤(pán)I/O接口8BIOS開(kāi)機(jī)時(shí)的簡(jiǎn)易流程圖9BIOS/CMOS設(shè)置CMOS原指一種IC的製程,用CMOS製作的IC具有省電&低溫的特性.用來(lái)存儲(chǔ)計(jì)算機(jī)的設(shè)置和系統(tǒng)日期時(shí)間.RTC/CMOS RAM整合在南橋中,通過(guò)外部搭配的鋰電池供電.因?yàn)镃MOS製作的內(nèi)存耗電量很低,就算計(jì)算機(jī)一兩年都不開(kāi)電源,CMOS中紀(jì)錄的值也一樣可以得到完整的保存.10BIOS/CMOS設(shè)置(續(xù))開(kāi)機(jī)時(shí)檢測(cè)CPU的品牌&型號(hào)&頻率,以及內(nèi)存的型號(hào)&容量,及軟盤(pán)&硬盤(pán)&光驅(qū)等基本外圍設(shè)備偵測(cè)與驅(qū)動(dòng),BIOS將這些設(shè)置項(xiàng)目根據(jù)屬性用途分成大項(xiàng)目,用戶選擇大項(xiàng)目後就可以去調(diào)整每個(gè)參數(shù)的值,這些參數(shù)會(huì)存儲(chǔ)並記錄在C

9、MOS芯片內(nèi),在下次開(kāi)機(jī)之前,由BIOS讀取CMOS中保存的用戶設(shè)定值來(lái)激活/關(guān)閉某項(xiàng)功能,或者偵測(cè)某項(xiàng)設(shè)備.11POST CODE定義:當(dāng)BIOS程序代碼要進(jìn)行某一階段的作業(yè)時(shí),先將該作業(yè)所代表的Debug/POST code數(shù)值直接送到80h這個(gè)I/O端口,在新的診斷碼送出之前,這個(gè)診斷碼數(shù)值會(huì)一直保持著.Bootblock and POST 兩個(gè)階段都會(huì)送Checkpoints到80 Port.針對(duì)Port 80h譯碼,並且將送出的數(shù)據(jù)給Latch住,並且通過(guò)LCD顯示.我們通常使用Debug Card就是利用這個(gè)原理顯示post code的.不同的BIOS軟體廠商定義的Post cod

10、e有所不同,但啟動(dòng)的過(guò)程都大致相同,以AMI CORE 8.0為例介紹.12Bootblock Initialization Code Checkpoints (1)診斷碼所進(jìn)行到的程序代碼流程Before D1Early chipset initialization is done. Early super I/O initialization is done including RTC and keyboard controller. NMI is disabled. D1Perform keyboard controller BAT test. Check if waking up fr

11、om power management suspend state. Save power-on CPUID value in scratch CMOS. D0Go to flat mode with 4GB limit and GA20 enabled. Verify the bootblock checksum. D2Disable CACHE before memory detection. Execute full memory sizing module. Verify that flat mode is enabled.D3If memory sizing module not e

12、xecuted, start memory refresh and do memory sizing in Bootblock code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled.D4Test base 512KB memory. Adjust policies and cache first 8MB. Set stack.D5Bootblock code is copied from ROM to lower system memory and contro

13、l is given to it. BIOS now executes out of RAM.13Bootblock Initialization Code Checkpoints (2)診斷碼所進(jìn)行到的程序代碼流程D6Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. Main BIOS checksum is tested. If BIOS recovery is necessary, control flows to checkpoint E0. D7R

14、estore CPUID value back into register. The Bootblock-Runtime interface module is moved to system memory and control is given to it. Determine whether to execute serial flash.D8The Runtime module is uncompressed into memory. CPUID information is stored in memory.D9Store the Uncompressed pointer for f

15、uture use in PMM. Copying Main BIOS into memory. Leaves all RAM below 1MB Read-Write including E000 and F000 shadow areas but closing SMRAM.DARestore CPUID value back into register. Give control to BIOS POST (ExecutePOSTKernel). See POST Code Checkpoints section of document for more information.14Bo

16、otblock Recovery Code Checkpoints (1)診斷碼所進(jìn)行到的程序代碼流程E0Initialize the floppy controller in the super I/O. Some interrupt vectors are initialized. DMA controller is initialized. 8259 interrupt controller is initialized. L1 cache is enabled. E9Set up floppy controller and data. Attempt to read from flop

17、py.EBDisable ATAPI hardware. Jump back to checkpoint E9.EFRead error occurred on media. Jump back to checkpoint EB.E9 or EADetermine information about root directory of recovery media.F0Search for pre-defined recovery in root directory.F1Bootblock code is copied from ROM to lower system memory and c

18、ontrol is given to it. BIOS now executes out of RAM.當(dāng)BIOS偵測(cè)到Checksum錯(cuò)誤,或者用戶按Alt+F2時(shí),Bootblock Recovery Code獲得控制權(quán),開(kāi)始更新BIOS.15Bootblock Recovery Code Checkpoints (2)診斷碼所進(jìn)行到的程序代碼流程F2Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file.F3Start reading the recovery b

19、y cluster.F5Disable L1 cache.FACheck the validity of the recovery to the current configuration of the flash part.FBMake flash write enabled through chipset and OEM specific method. Detect proper flash part. Verify that the found flash part size equals the recovery .F4The recovery does not equal the

20、found flash part size.FCErase the flash part.FDProgram the flash part.FFThe flash has been updated successfully. Make flash write disabled. Disable ATAPI hardware. Restore CPUID value back into register. Give control to F000 ROM at F000:FFF0h.16POST Code Checkpoints (1)診斷碼所進(jìn)行到的程序代碼流程03Disable NMI, P

21、arity, video for EGA, and DMA controllers. Initialize BIOS, POST, Runtime data area. Also initialize BIOS modules on POST entry and GPNV area. Initialized CMOS as mentioned in the Kernel Variable wCMOSFlags.04Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK. Ver

22、ify CMOS checksum manually by reading storage area. If the CMOS checksum is bad, update CMOS with power-on default values and clear passwords. Initialize status register A. Initializes data variables that are based on CMOS setup questions. Initializes both the 8259 compatible PICs in the system05Ini

23、tializes the interrupt controlling hardware (generally PIC) and interrupt vector table.06Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt. Traps INT1Ch vector to POSTINT1ChHandlerBlock.17POST Code Checkpoin

24、ts (2)診斷碼所進(jìn)行到的程序代碼流程08Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt. Traps INT1Ch vector to POSTINT1ChHandlerBlock.C0Early CPU Init Start - Disable Cache - Init Local APICC1Set up boot strap proccessor I

25、nformationC2Set up boot strap proccessor for POSTC5Enumerate and set up application proccessorsC6Re-enable cache for boot strap proccessorC7Early CPU Init Exit0AInitializes the 8042 compatible Key Board Controller.0BDetects the presence of PS/2 mouse.0CDetects the presence of Keyboard in KBC port.18

26、POST Code Checkpoints (3)診斷碼所進(jìn)行到的程序代碼流程0ETesting and initialization of different Input Devices. Also, update the Kernel Variables. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompress all available language, BIOS logo, and Silent logo modules.13Early POST initia

27、lization of chipset registers.24Uncompress and initialize any platform specific BIOS modules.30Initialize System Management Interrupt.2AInitializes different devices through DIM.2CInitializes different devices. Detects and initializes the video adapter installed in the system that have optional ROMs

28、.2EInitializes all the output devices. 31Allocate memory for ADM module and uncompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM. Activate ADM module.33Initializes the silent boot module. Set the window for displaying text information.19POST Code

29、 Checkpoints (4)診斷碼所進(jìn)行到的程序代碼流程37Displaying sign-on message, CPU information, setup key message, and any OEM specific information. 38Initializes different devices through DIM.39Initializes DMAC-1 & DMAC-2.3AInitialize RTC date/time.3BTest for total memory installed in the system. Also, Check for DEL

30、or ESC keys to limit memory test. Display total memory in the system.3CMid POST initialization of chipset registers.40Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, etc.) successfully installed in the system and update the BDA, EBDAetc.50Programming the memory hole o

31、r any kind of implementation that needs an adjustment in system RAM size if needed.52Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory.20POST Code Checkpoints (5)診斷碼所進(jìn)行到的程序代碼流程60Initializes NUM-LOCK status and programs the KBD ty

32、pematic rate.75Initialize Int-13 and prepare for IPL detection.78Initializes IPL devices controlled by BIOS and option ROMs.7AInitializes remaining option ROMs.7CGenerate and write contents of ESCD in NVRam.84Log errors encountered during POST.85Display errors to the user and gets the user response

33、for error.87Execute BIOS setup if needed / requested.8CLate POST initialization of chipset registers.8DBuild ACPI tables (if ACPI is supported)8EProgram the peripheral parameters. Enable/Disable NMI as selected90Late POST initialization of system management interrupt.A0Check boot password if install

34、ed.A1Clean-up work needed before booting to OS.21POST Code Checkpoints (6)診斷碼所進(jìn)行到的程序代碼流程A2Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Disables the

35、 system configuration display if needed.A4Initialize runtime language module.A7Displays the system configuration screen if enabled. Initialize the CPUs before boot, which includes the programming of the MTRRs.A8Prepare CPU for OS boot including final MTRR values.A9Wait for user input at config displ

36、ay if needed.AAUninstall POST INT1Ch vector and INT09h vector. Deinitializes the ADM module.ABPrepare BBS for Int 19 boot.ACEnd of POST initialization of chipset registers.B1Save system context for ACPI.00Passes control to OS Loader (typically INT19h).22ACPI RUNTIME Checkpoints診斷碼所進(jìn)行到的程序代碼流程ACFirst

37、ASL check point. Indicates the system is running in ACPI mode. AASystem is running in APIC mode.01, 02, 03, 04, 05Entering sleep state S1, S2, S3, S4, or S5.10, 20, 30, 40, 50Waking from sleep state S1, S2, S3, S4, or S5.ACPI: Advanced Configuration and Power Interface 先進(jìn)電源/組態(tài)控制接口. 即系統(tǒng)省電處理設(shè)計(jì)的S1S5工作模式.23BIOS接受系統(tǒng)控制權(quán)原理當(dāng)Reset信號(hào)變成高電平時(shí),.CPU結(jié)束現(xiàn)行操作,各個(gè)內(nèi)部寄存器複位成初始值: CS=DS=ES=SS=0FFFFh, IP=0000h,將指令定位