數(shù)字集成電路電路、系統(tǒng)與設(shè)計(第二版)課后練習(xí)題第四章導(dǎo)線Chapter4TheWire

1、 in口m.Theminimumsizedevice,(0.25/0.25)forNMOSand(0.75/0.25)forPMOS,hastheonresistance35kQ.Determinethetimeittakesforachangeinthesignaltopropagatefromsourcetodestination(timeofflight).Thewireinductanceperunitlengthequals75*10-8H/m.Determinehowlongitwilltaketheoutputsignaltostaywithin10%ofitsfinalvalu

2、e.Youcanmodelthedriverasavoltagesourcewiththedrivingdeviceactingasaseriesresistance.Assumeasupplyandstepvoltageof2.5V.Hint:drawthelatticediagramforthetransmissionline.Resizethedimensionsofthedrivertominimizethetotaldelay.L=15cmMemoryZ=100QFigure0.3Thedriver,theconnectingcopperwireandthememoryblockbe

3、ingaccessed.M,None,4.xAtwostagebufferisusedtodriveametalwireof1cm.ThefirstinverterisaminimumsizewithaninputcapacitanceC=10fFandapropagationdelayt=175pswhenloadedwithanidenticalgate.Thewidthofthemetalwireis3.6口m.Thesheetresistanceofthemetalis0.08Q/,thecapacitancevalueis0.03fF/m2andthefringingfieldcap

4、acitanceis0.04fF/|im.Whatisthepropagationdelayofthemetalwire?Computetheoptimalsizeofthesecondinverter.Whatistheminimumdelaythroughthebuffer?M,None,4.xFortheRCtreegiveninFigure0.4calculatetheElmoredelayfromnodeAtonodeBusingthevaluesfortheresistorsandcapacitorsgiveninthebelowinTable0.1.Figure0.4RCtree

5、forcalculatingthedelayTable0.1ValuesofthecomponentsintheRCtreeofFigure0.4ResistorValue(Q)CapacitorValue(fF)R10.25C1250R20.25C2750R30.50C3250R4100C4250R50.25C51000R61.00C6250R70.75C7500R81000C8250M,SPICE,4.xInthisproblemthevariouswiremodelsandtheirrespectiveaccuracieswillbestudied.Computethe0%-50%del

6、ayofa500umx0.5umwirewithresistanceof0.08Q/,withareacapacitanceof30aF/um2,andfringingcapacitanceof40aF/um.Assumethedriverhasa100Qresistanceandnegligibleoutputcapacitance.Usingalumpedmodelforthewire.UsingaPImodelforthewire,andtheElmoreequationstofindtau.(seeChapter4,figure4.26).UsingthedistributedRCli

7、neequationsfromChapter4,section4.4.4.Compareyourresultsinparta.usingspice(besuretoincludethesourceresistance).Foreachsimulation,measurethe0%-50%timefortheoutputFirst,simulateastepinputtoalumpedR-Ccircuit.Next,simulateastepinputtoyourwireasaPImodel.Unfortunately,ourversionofSPICEdoesnotsupportthedist

8、ributedRCmodelasdescribedinyourbook(Chapter4,section4.5.1).Instead,simulateastepinputtoyourwireusingaPI3distributedRCmodel.M,None,4.xAstandardCMOSinverterdrivesanaluminumwireonthefirstmetallayer.AssumeRn=4kQ,Rp=6kQ.Also,assumethattheoutputcapacitanceoftheinverterisnegligibleincomparisonwiththewireca

9、pacitance.Thewireis.5umwide,andtheresistivityis0.08Q/.Whatisthecriticallengthofthewire?Whatistheequivalentcapacitanceofawireofthislength?(Foryourcapacitancecalculations,useTable4.2ofyourbook,assumetheresfieldoxideunderneathandnothingabovethealuminumwire)M,None,4.xA10cmlonglosslesstransmissionlineona

10、PCboard(relativedielectricconstant=9,relativepermeability=1)withcharacteristicimpedanceof50Qisdrivenbya2.5Vpulsecomingfromasourcewith150Qresistance.Iftheloadresistanceisinfinite,determinethetimeittakesforachangeatthesourcetoreachtheload(timeofflight).Nowa200Qloadisattachedattheendofthetransmissionli

11、ne.Whatisthevoltageattheloadatt=3ns?Drawlatticediagramandsketchthevoltageattheloadasafunctionoftime.Determinehowlongdoesittakefortheoutputtobewithin1percentofitsfinalvalue.C,SPICE,4.xAssumeVD=1.5V.Also,useshort-channeltransistormodelsforhandanalysis.VVDDDDL=350nH/mC=150pF/mininVSVS10cmVLFigure0.5Tra

12、nsmissionlinebetweentwoinvertersC=0.2pFTheFigure0.5showsanoutputdriverfeedinga0.2pFeffectivefan-outofCMOSgatesthroughatransmissionline.Sizethetwotransistorsofthedrivertooptimizethedelay.SketchwaveformsofVandV,assumingasquarewaveinput.Labelcriticalvoltagesandtimes.Sizedownthetransistorsbymtimes(misto

13、betreatedasaparameter).DeriveafirstorderexpressionforthetimeittakesforVtosettledownwithin10%ofitsfinalvoltagelevel.Comparetheobtainedresultwiththecasewherenoinductanceisassociatedwiththewire.PleasedrawthewaveformsofVforbothcases,andcomment.LUsethetransistorsasinparta).SupposeCischangedto20pF.Sketchw

14、aveformsofVandV,assumingasquarewaveinput.Labelcriticalvoltagesandinstants.Assumenowthatthetransmissionlineislossy.PerformHspicesimulationforthreecases:R=100Q/cm;R=2.5Q/cm;R=0.5Q/cm.GetthewaveformsofV,VandthemiddleSLpointoftheline.Discusstheresults.M,None,4.xConsideranisolated2mmlongand1口mwideMl(Meta

15、ll)wireoverasiliconsubstratedrivenbyaninverterthathaszeroresistanceandparasiticoutputcapccitance.Howwillthewiredelaychangeforthefollowingcases?Explainyourreasoningineachcase.Ifthewirewidthisdoubled.Ifthewirelengthishalved.Ifthewirethicknessisdoubled.IfthicknessoftheoxidebetweentheM1andthesubstrateisdoubled.E,None,4.xInanidealscalingmodel,wherealldimensionsandvoltagesscalewithafactorofS1:a.Howdoesthedelayofaninverterscale?b.Ifachipisscaledfromonetechnologytoano