數(shù)字芯片相關(guān)課件:lecture note3-new_第1頁(yè)
數(shù)字芯片相關(guān)課件:lecture note3-new_第2頁(yè)
數(shù)字芯片相關(guān)課件:lecture note3-new_第3頁(yè)
數(shù)字芯片相關(guān)課件:lecture note3-new_第4頁(yè)
數(shù)字芯片相關(guān)課件:lecture note3-new_第5頁(yè)
已閱讀5頁(yè),還剩108頁(yè)未讀 繼續(xù)免費(fèi)閱讀

下載本文檔

版權(quán)說(shuō)明:本文檔由用戶提供并上傳,收益歸屬內(nèi)容提供方,若內(nèi)容存在侵權(quán),請(qǐng)進(jìn)行舉報(bào)或認(rèn)領(lǐng)

文檔簡(jiǎn)介

DesignmethodologiesofdigitalcontrollerInstructorHaibingHuhuhaibing@Lab:A3-506OutlineModelingonSinglephaseDC/ACinverterAdesignexampleRoots-LocusMethodFrequencydomaindesignDirectDigitaldesignStatespacedesign

ModelingonSinglephaseDC/ACinverterPlantWithRincrease,rootsoftheplantwillbemuchclosertoimaginaryaxe.Therefore,forsingle-phaseinverterdesign,wedesignthecontrollerunderno-loadconditionDualloopcontrol-AnalogimplementationAssumingvoltagechangeismuchslowerthancurrentloop.Inthiscase,voltagecanbeconsideredasadisturbance.Orwecanuseoutputvoltagefeed-forwardtodecouplethesystem.DigitalcontrollerIfsamplingfs>>fsw,(fsw,controlbandwidth),thereisnodifferencebetweenanaloganddigitalsystems.DelayintroducedindigitalsystemAccordingtopreviousanalysis,thecomputationdelayisinevitablefordigitalcontroller.BasedonthedifferentPWMupdatescheme,thedelaytimecanbeTs/2

or

Ts.Thisistheside-effectintroducedbydigitalsystem.Ifsamplingfs>>fsw,fromthispointofview,wecandesigncontrollerinanalogdomainbyaddingthedelayunit,andthentransfertoZdomain.DetailedDC/ACmodelCurrentloopdesignDeterminecross-overfrequency(1/5-1/10fs)Determinephasegain(>30)Example-SinglephaseinverterSpecificationsL=4.3mHr=0.01oHmC=2.2uFUdc=400VSwitchingfrequency=20kHzPWM:DualupdateCurrentcontrollerDesignPIcontrollerCross-overfrequency2kHzPhasemargin45degreeComputationdelay:Td=25usTransferFunctionOpenlooptransferfunction:Basedonthesetwoequations,thecontrollerparameterscanbeachievedas:NextstepistodosimulationusingtheseparametersCurrentloopSimulationpuredelayunitgridDothesimulationSimulationindiscretedomainUnitdelayDiscretePIVoltageloopdesignTransferfunction1Cross-overfrequency1kHzPhasemargin40degreeSimulationverification16三相PWM整流器工作原理

單相電路整流運(yùn)行在uac的正半周,橋路中由L、S2、D4、D1和L、S3、D1、D4組成兩個(gè)Boost斬波電路17S2

導(dǎo)通,L充電

單相電路整流運(yùn)行在uac的正半周,橋路中由L、S2、D4、D1和L、S3、D1、D4組成兩個(gè)Boost斬波電路三相PWM整流器工作原理18

單相電路整流運(yùn)行S2

關(guān)斷,L和電源向Cs充電

在uac的正半周,橋路中由L、S2、D4、D1和L、S3、D1、D4組成兩個(gè)Boost斬波電路三相PWM整流器工作原理19三相電路純電感特性

正阻特性

純電容特性

負(fù)阻特性

多變量非線性強(qiáng)耦合三相PWM整流器工作原理靜止坐標(biāo)系下數(shù)學(xué)模型abc三相相加得:對(duì)于三相三線系統(tǒng):則有:變形得開(kāi)關(guān)矩陣方程:平均模型dq坐標(biāo)系下模型通過(guò)上式變化旋轉(zhuǎn)得:去掉0軸得:如何畫(huà)控制結(jié)構(gòu)框圖?非線性的?控制框圖

空間矢量鎖相維也納整流器功率開(kāi)關(guān)管開(kāi)關(guān)組態(tài)Sa00001111Sb00110011Sc01010101功率開(kāi)關(guān)管開(kāi)關(guān)組態(tài)Sa00001111Sb00110011Sc01010101(000)(001)(010)(011)(100)(101)(110)(111)數(shù)學(xué)模型功率因數(shù)校正的核心在于,將三相輸入電流通過(guò)坐標(biāo)變換和解耦,分離出其中的有功和無(wú)功分量,分別對(duì)其進(jìn)行控制。使有功電流跟隨電網(wǎng)電壓的變換,同時(shí)讓無(wú)功電流維持為零。這樣,輸入電流中將不含無(wú)功分量,也就實(shí)現(xiàn)了單位功率因數(shù)(PFC)。d軸電流控制框圖q軸電流控制框圖實(shí)際電網(wǎng)電壓存在擾動(dòng)控制策略為了減小或抵消實(shí)際電網(wǎng)波形畸變?cè)斐傻目刂茊?wèn)題,引入了電網(wǎng)電壓前饋的控制策略。其方法在于,通過(guò)對(duì)控制環(huán)路進(jìn)行補(bǔ)償,使電網(wǎng)電壓不再對(duì)電流產(chǎn)生影響。(以q軸電流為例)引入電網(wǎng)電壓前饋控制的q軸電流控制框圖控制策略VIENNA的數(shù)學(xué)模型建立是以輸出電容電壓相等為前提的。而實(shí)際情況中,輸出中點(diǎn)電位存在交流脈動(dòng),這就導(dǎo)致了數(shù)學(xué)模型的不精確,從而影響整個(gè)控制策略。因而,需要引入中點(diǎn)平衡的策略來(lái)彌補(bǔ)輸出電壓的不均衡。主體思想:在正弦調(diào)制波中注入零序分量正弦分量零序分量只有注入零序,才能使壓差變化率為零控制策略與優(yōu)化根據(jù)理論計(jì)算,我們可以計(jì)算出抵消中點(diǎn)電位波動(dòng)的零序分量的值。但是實(shí)際情況更為復(fù)雜,電路中參數(shù)不可能完全一致,例如直流側(cè)電容就不會(huì)完全相等。在這種情況下,理論計(jì)算出的零序值無(wú)法達(dá)到最好的補(bǔ)償效果。因此需要對(duì)這種控制策略進(jìn)行閉環(huán)的調(diào)節(jié)。最終的零序分量可以分成兩部分,一部分為理論計(jì)算出的最優(yōu)零序分量,另一部分則為閉環(huán)調(diào)控的補(bǔ)償零序分量。最優(yōu)零序分量補(bǔ)償零序分量最優(yōu)零序計(jì)算控制策略與優(yōu)化補(bǔ)償零序計(jì)算VIENNA的整體均壓策略控制策略與優(yōu)化VIENNA整流器最終控制框圖控制策略與優(yōu)化調(diào)制上采用SVPWM調(diào)制,主要考慮到如下優(yōu)點(diǎn):1.SVPWM的高電壓利用率。2.調(diào)制波本身就含有零序分量,可以一定程度地抑制中點(diǎn)電位波動(dòng)。VIENNA拓?fù)涔灿?5個(gè)開(kāi)關(guān)矢量,根據(jù)電流過(guò)零劃分為6個(gè)扇區(qū)。每個(gè)扇區(qū)中可以使用兩電平SVPWM的計(jì)算方法對(duì)開(kāi)關(guān)矢量進(jìn)行分配(詳見(jiàn)第四章的SVPWM調(diào)制方法推導(dǎo))??刂撇呗耘c優(yōu)化矢量[100]矢量[0-1-1]25組空間矢量中,共有6對(duì)短矢量,每對(duì)的大小和方向均相同,但其對(duì)應(yīng)的中點(diǎn)電流的流向則相反(這里以Ⅰ扇區(qū)為例)??刂撇呗耘c優(yōu)化LLC諧振變換器38SPRC諧振變換器39LLC存在兩個(gè)諧振頻率:fr1>fr2。LLC的直流特性可知:①當(dāng)fs>fr2時(shí),開(kāi)關(guān)管工作在

ZVS區(qū)域;②在輕載時(shí),LLC諧振變換器的

開(kāi)關(guān)頻率變化很小,即使在空

載時(shí)也具備零電壓開(kāi)關(guān)能力。LLC變換器工作原理40

根據(jù)LLC諧振變換器的直流增益特性可以將其分為三個(gè)工作區(qū)域。

通常將LLC諧振變換器設(shè)計(jì)工作在區(qū)域1

和2,實(shí)現(xiàn)ZVS,而工作區(qū)域3是ZCS工作區(qū)。工作區(qū)域2模態(tài)分析41江蘇省新能源發(fā)電與電能變換重點(diǎn)實(shí)驗(yàn)室①M(fèi)1:(t0<t<t1)t0時(shí)刻,Q2恰好關(guān)斷,諧振電流Ir<0,IDR1=0。Ir流經(jīng)D1,使VQ1=0,為Q1d的ZVS開(kāi)通創(chuàng)造條件。

在這段時(shí)間中,驅(qū)動(dòng)Q1上使其ZVS開(kāi)通。Vin加在諧振腔上,Ir增大到0,副邊DR1導(dǎo)通。副邊電壓為輸出電壓,原邊電壓為恒定值np*Vo/ns,Lm處于恒壓儲(chǔ)能狀態(tài),電流線性上升。(Ir從左向右為正)工作區(qū)域2模態(tài)分析42②M2:(t1<t<t2)t0~t1時(shí)段,Q1已經(jīng)開(kāi)通。Lr與Cr串聯(lián)諧振。Lm上電壓被箝位,不參與諧振。諧振電流Ir從0開(kāi)始以近似正弦規(guī)律正向增大。副邊DR1依然導(dǎo)通,副邊電壓為輸出電壓,原邊電壓是恒定值np*Vo/ns,電流ILm線性上升。

在這個(gè)時(shí)段里,有Ir=ILm+Inp。在t2時(shí)刻,Ir=ILm。工作區(qū)域2模態(tài)分析43③M3:(t2<t<t3)t2時(shí)刻,Inp=0,則副邊電流為0,即DR1被ZCS關(guān)斷,不存在反向恢復(fù)。在這個(gè)時(shí)段,Q1依然導(dǎo)通。此時(shí),Lr+Lm與Cr形成串聯(lián)諧振,但由于時(shí)間較短,而且Lm+Lr也很大,認(rèn)為電流保持不變,Ir=ILm。

在t3時(shí)刻,Q1關(guān)斷,電流Ir(大于0)為ZVS開(kāi)通Q2創(chuàng)造條件。工作區(qū)域2模態(tài)分析44

從這個(gè)模態(tài)可知,開(kāi)關(guān)管關(guān)斷電流即為激磁電流,通過(guò)變壓器的合理設(shè)計(jì),使激磁電流比負(fù)載電流小的多,就可以降低開(kāi)關(guān)損耗。同時(shí),ZVS開(kāi)通是由激磁電流決定,與負(fù)載電流無(wú)關(guān),那么即使在零電流負(fù)載的條件下也能實(shí)現(xiàn)ZVS開(kāi)通。下半周期,與上半周期類(lèi)似分析。工作區(qū)域1模態(tài)分析45①M(fèi)1(t0<t<t1)t0時(shí)刻,Q2恰好關(guān)斷,此時(shí)Lr的電流Ir<0。Ir流經(jīng)D1,Q1實(shí)現(xiàn)ZVS。Ir以正弦規(guī)律減小到0。

t1時(shí)刻,副邊DR1導(dǎo)通,副邊電壓為輸出電壓Vo,原邊電壓為np*Vo/np。Lm上電壓為定值,ILm線性上升到0。Lr與Cr諧振。在這段時(shí)間里Q1開(kāi)通。(Ir從左向右為正)工作區(qū)域1模態(tài)分析46②M2(t1<t<t2)Q1已經(jīng)開(kāi)通,Ir依然以正弦規(guī)律增大,ILm依然線性上升。

在t2時(shí)刻,Q1關(guān)斷,但I(xiàn)r>ILm。在Q1關(guān)斷時(shí),副邊二極管依然導(dǎo)通,Ins依然有電流。同時(shí)Ir的存在,為Q2的ZVS開(kāi)通創(chuàng)造了條件。工作區(qū)域1模態(tài)分析47

當(dāng)f>fr1時(shí),依然有ZVS開(kāi)通的特點(diǎn),但是整個(gè)工作過(guò)程中,只有Lr與Cr參與諧振,而激磁電感Lm沒(méi)有參與。此時(shí),它就是一串聯(lián)諧振變換器,具備了串聯(lián)諧振的優(yōu)缺點(diǎn)。開(kāi)關(guān)管關(guān)斷電流較大,開(kāi)關(guān)損耗也大;副邊整流二極管沒(méi)有ZCS關(guān)斷,存在反向恢復(fù)問(wèn)題,比工作區(qū)域2的效率要低。區(qū)域3是開(kāi)關(guān)管的ZCS工作區(qū),因?yàn)樵趂<fr2時(shí),諧振腔阻抗呈容性,電壓滯后于電流。在諧振變換器中,一般不設(shè)計(jì)在這個(gè)區(qū)域,所以這里將不詳細(xì)講解。LLC直流增益特性48LLC的諧振網(wǎng)絡(luò)等效如右圖。圖中Req為折算到原邊的負(fù)載,其值為:網(wǎng)絡(luò)的傳遞函數(shù):LLC變換器直流增益特性50進(jìn)行歸一化處理,令k=Lm/Lr,fn=f/fr,帶入G(jw)化簡(jiǎn)得:因此LLC諧振變換器的輸入輸出直流特性記為:LLC諧振變換器的輸入輸出直流特性可以記為:LLC變換器直流增益特性51從增益特性曲線上可以看出:①當(dāng)開(kāi)關(guān)頻率f在fr右邊時(shí),工作在

ZVS狀態(tài);②當(dāng)輸入電壓降低,可以降低開(kāi)關(guān)頻率使其增益增大;③當(dāng)負(fù)載加重時(shí),諧振頻率會(huì)升高。增益特性曲線LLC變換器直流增益特性52k=1k=2

在輸入輸出功率一定的變換器下,匝比n固定,在某一個(gè)Q下,直流增益曲線隨k的變化情況:①當(dāng)k增大時(shí),其最大增益值在減小,那么在低輸入電壓下可能達(dá)不到要求的輸出電壓;②

當(dāng)k增大時(shí),在一定的電壓范圍內(nèi)為了達(dá)到要求的輸出電壓,LLC變換器的工作頻率范圍加寬,這對(duì)磁性元件的工作不利;不同k值下的直流增益曲線LLC變換器直流增益特性53k=1k=2③當(dāng)k減小,即Lm的值減小時(shí),由于輸出電壓一定,那么電感Lm的電壓是定值,電感電流的峰值變大。而原邊開(kāi)關(guān)管關(guān)斷電流為激磁電流,則關(guān)斷損耗較大;但是若峰值電流過(guò)小,可能會(huì)影響零電壓的開(kāi)通。不同k值下的直流增益曲線LLC變換器過(guò)載保護(hù)54過(guò)載內(nèi)在機(jī)理:LLC變換器過(guò)載保護(hù)55江蘇省新能源發(fā)電與電能變換重點(diǎn)實(shí)驗(yàn)室正常波形過(guò)載波形LLC變換器過(guò)載保護(hù)56過(guò)載保護(hù)的方法:1、提高開(kāi)關(guān)頻率。

開(kāi)關(guān)頻率設(shè)置的很高,開(kāi)關(guān)管電流應(yīng)力增加,器件損耗增加。2、PFM&PWM聯(lián)合控制策略。

開(kāi)關(guān)頻率設(shè)置相對(duì)可以低一些,但開(kāi)關(guān)管ZVS丟失,開(kāi)關(guān)損耗明顯增加。另外,兩種模式下平滑切換的過(guò)渡過(guò)程要迅速。全橋LLC充電器參數(shù)設(shè)計(jì)57設(shè)計(jì)指標(biāo):Vin400V(360V~440V)Vo40V~60VIo40A(5A~50A)fr220KHzfmax300KHzfPWM350KHz蓄電池充電方式先40A恒流,達(dá)到60V后再恒壓全橋LLC充電器參數(shù)設(shè)計(jì)58增益曲線:工作區(qū)域1工作區(qū)域2ZCSZVS開(kāi)通ZCS關(guān)斷全橋LLC充電器參數(shù)設(shè)計(jì)59設(shè)計(jì)步驟:1、確定變壓器變比:考慮額定工作區(qū)域盡量在ZVS區(qū)域,將fr對(duì)應(yīng)的額定工作點(diǎn)選取為:根據(jù)額定工作點(diǎn)選取變壓器變比:變比選為92、確定諧振電感與激磁感比值k:空載,頻率為無(wú)窮時(shí):理論約束條件:實(shí)際中,頻率有限制,可以根據(jù)允許的最高頻率實(shí)現(xiàn)空載來(lái)計(jì)算:全橋LLC充電器參數(shù)設(shè)計(jì)603、確定實(shí)現(xiàn)ZVS的滿載Q值:Q值一定時(shí),LLC變換器ZCS和ZVS工作區(qū)域分界點(diǎn)為增益曲線頂點(diǎn),諧振回路呈現(xiàn)純阻性。結(jié)合M(k,x,Q)方程可以推導(dǎo)出Qmax1:諧振回路的輸入阻抗:選取時(shí)留有一定裕量:一般情況下,還會(huì)要求變換器空載時(shí)實(shí)現(xiàn)ZVS。尤其當(dāng)空載處在工作區(qū)域1,會(huì)形成另一個(gè)約束Qmax2:工作區(qū)域1本設(shè)計(jì)的輕載情況不同,可以考慮用來(lái)校驗(yàn)全橋LLC充電器參數(shù)設(shè)計(jì)614、計(jì)算等效阻抗:5、計(jì)算各元件參數(shù):最終選取的參數(shù):全橋LLC充電器參數(shù)設(shè)計(jì)626、繪制增益曲線:

控制時(shí),可以將低壓輸入滿載輸出時(shí)頻率設(shè)置為最低頻率,防止進(jìn)入ZCS區(qū)域;HowtomapfromsimulationtoDSPUnitfeedbackParameterscalculatedbasedonunitfeedback10bit/12bitADCDigitalPWMimplementationCont’AssumingADC12bit(4096)ADCinputrange3.3VDSPfrequency150MHzVoltageconditioningcircuit:[-400V,400]->[03.3V]Currentconditioningcircuit:[-40A,40A]->[03.3V]Cont’Forcurrent40A->2048feedbackcoef=2048/40Forvoltage400V->2048feedbackcoef=2048/400

NewPIparametersCont’NewPIparametersNewreferenceOriginalPWMDigitalPWMinDSPMatchPIparametersinDSPSimulationConsideringADCquantizationandnoiseSeethesimulationOutlineModelingonSinglephaseDC/ACinverterRoots-LocusMethodFrequencydomaindesignDirectDigitaldesignStatespacedesign

IntroductionofRoots-LocusMethodThedesignbytheroot-locusmethodisbasedonreshapingtherootlocusofthesystembyaddingpolesandzerostothesystem’sopen-looptransferfunctionandforcingtherootlocitopassthroughdesiredclosed-looppolesinthesplane.Thecharacteristicoftheroot-locusdesignisbasedontheassumptionthattheclosed-loopsystemhasapairofdominantclosed-looppoles.(Zerosandadditionalpolesaffecttheresponsecharacteristic).First,let’sreviewtheroots-locusinsplant.Assumethatthecontrolblockofasystemisasbelow:

Gc(s)meansthecompensator,

G(s)meansthecontrolobject,

H(s)meansthefeedbackloop.Letdrawtheroots-locusnext.IntroductionofRoots-LocusMethodTheopentransferfunctionofsystemwithoutcompensatorisIfthetransferfunctioniswrittenasbelow:Usingmatlabcaneasilydrawtherootslocusjustlikewhatshowedintherightside.Therootslocusisdrawnbytheopentransferfunction,butitshowstherootsofcloseloopsystemwhosetrackisvaryingwiththeopenloopgainK.Thedirectionofarrowshowedinthepictureindicatesthedirectionofrootslocus.HeretheMAXKis1230.IntroductionofRoots-LocusMethodWehavementionedthatroots-locusmethodisawaytoaddpolesorzeros(orpolesandzeros)tothesystem,buthowwillthepolesandzerosaffectthesystem?Again,usetheaforementionedexampleandaddpolesorzerostothesystem,seewhatchangeitwillhappen.Ifapoleisadded.HeretheMAXKis658.AddedPoleIfazeroisadded.HeretheKis5790.AddedZeroIntroductionofRoots-LocusMethodFromtheexample,wecanseethataddingpolesorzeroswillhavedifferenteffectonthesystem.Ageneralconclusionisshowedbelow:EffectsoftheAdditionofPoles.

Theadditionofapoletotheopen-looptransferfunctionhastheeffectofpullingtherootlocustotheright,tendingtolowerthesystem’srelativestabilityandtoslowdownthesettlingoftheresponse.EffectsoftheAdditionofZeros.Theadditionofazerototheopen-looptransferfunctionhastheeffectofpullingtherootlocustotheleft,tendingtomakethesystemmorestableandtoshortenthesettlingtime.So,ifitisneeded,wecanaddpolesorzerostothesystemwhichiscalledcompensatorintherightsideblock.Commonlyusedcompensators(orcontrollers)arelead,lag,andlag-leadcompensators,whichwillbeintroducedindetailslater.DesignProcedureFromtheroots-locus,wecanseetherootsofcloseloopsystemisvaryingwiththeopenloopgainK.

So,settingthegainisthefirststepinadjustingthesystemforsatisfactoryperformance.Usually,settingthegaincannotfullysatisfythedemand,thus,secondstep,wecanaddcompensatorslikelead,lag,orlead-lag.Thepoleandzeroplacementisshowedasbelow:Compensator’stransferfunction

is:Lagnetworka>b(b)Leadnetworka<bAlsocanbewrittenas:whereLag-leadnetworkcanbeachievedbycombiningthesetwoer.DesignProcedureParametersList2kW2mH30uF25Ω380V220V(RMS),50Hz10kHz0.20.01TopologyofsingleinverterAgain,weuseanexampletointroducethedesignmethodwhichisshowedintherightside.Still,weneedtodesigntwoloops(currentandvoltageloop).Themainstepsarewrittenasbelow:First,fromtheperformancespecifications,determinethedesiredlocationforthedominantclosed-looppoles.Second,drawingtheroot-locusplotoftheuncompensatedsystem,ascertainwhetherornotthegainadjustmentalonecanyieldthedesiredclosed-looppoles.(ifnot,goingtothethirdstep.)Third,choosingacompensatoraccordingtothepracticalsystem,whichwillbeintroducedindetails.Forth,determinetheopen-loopgainofthecompensatedsystem.DesignProcedureNext,wewillreviewthecharacteristicsofroot-locuswhichwillbeusedinstepthree.Asshowedintherightpicture,ifs1isintheroot-locus,itshouldhavethecharacteristicsasbelow.HereKmeanstheopen-loopgainAccordingtothesecharacteristics,thestepthreecanbeintroducedindetail.Stepthree:1)Afterdeterminethedominantpoles,calculatetheangledefinedas?.2)choosingthepropercompensatoraccordingtotheanglecharacteristics.3)accordingtheangleneededtocompensate,determinethepoleandzeroofthecompensator.LeadcompensatorLagcompensatorAnExampleFirst,designofthecurrentloop.Theroot-locusofcurrentopen-loopcanbeachievedusingmatlab,andfortheroot-locus,thegainadjustmentcanmeetpracticaldemandsasshowedintherightside.Inthiscondition,thepolesandgainareasbelow:LeadorLagcompensatorcanalsobeadoptedifonewanttomakethecurrentloopperformancebetter.CurrentLoopVoltageLoopAfterdesignthecurrentloop,wecometodesignthevoltageloop.Tomakethesystemhavebetterperformanceandlessstaticerror,acompensatorwillbeadopted.First,drawtheroot-locusofvoltageloop.Seethedetailsoftheredcircuit.Stophere,wemustchooseproperdominantclose-polesforthesystem.Usually,thedesiredlocationisdeterminedfromtheperformancespecification.Here,tomakethesystembetterresponseandlessstaticerror,choosedominantpolesasbelow:DesignProcedureofCompensatorCalculatetheangle?.Theopen-loop’spolesandzerosarelistedinrightside:PolesZeros0-666670-8000080000-33285±2551i80000Tomaketheangleisequalto(2k+1)π,thustheanglecontributedbycompensatedisnegative50°.(-50°)So,lagcompensatorisadopted.DesignProcedureofCompensatorNext,determinethepoleandzeroofcompensator.Accordingtothecertainangle,onceoneofthetwoisdetermined,theotherwillbedetermined.Here,wedeterminepoletobe-300,thenzerois-4100.Laststep,calculateopen-loopgaintodetermineKc.CalculatetheequationintherightsidetogetKc.Here,Kcis25.Tothisend,wehavegotthecompensatorasbelow:Someadditionalremarks:Usually,thecompensatordesignedusingroots-locuswillensuregoodstability,butitmaynotensurelessstaticerror.Ifaparticularstaticerrorconstantisspecified,itisgenerallytousethefrequency-responseapproach.Here,alsodrawtheBodeplotoftheopen-loop.SimulationResultsHeregivessomesimulationresultsgotbymatlab\simulink.Simulationwaves.(a)isthesteadywaveofnon-load(b)isthewavefromfullloadtonon-load(Redlinevrefmeansthevoltagereferencewhileblacklinevomeanstheoutputvoltage)(a)(b)Sofar,thewholedesignprocedureofroot-locushasbeendone.Fromthesimulationresults,wecanseethesystemhasperfectstabilityanddynamicresponse.Butifwedonotgetproperparameters,weneedchoosethezeroandpoleagain.OutlineModelingonSinglephaseDC/ACinverterRoots-LocusMethodFrequencydomaindesignDirectDigitaldesignStatespacedesign

DesignmethodologiesofdigitalPIcontrollerPIcontrollerismostwidelyusedcontrollerinPowerElectronics,itsdesignhasbeenacommonissue.HerewillshowthedesignmethodsusingtheBodeplot.

Oftenithastwomainwaysaslistedbelow:1)DesignthePIcontrollerinAnalogdomainusingBodeplot;2)TransfertheAnalogcoefficientstoDiscretizingdomainwithacertainmethod.DesignoftheAnalogPIControllerusingtheBodeplotisaessentialprocedureinthewholemethod,properdesigncanmakethesystemmorestableaswellasbetterperformance(fastresponseandsmallstaticerror).Discretizingmethodalsohaseffectonthesystem,sochoosingaproperdiscretizingmethodisimportant.DigitalControlDiagramTypicalorganizationofasingle-phaseinverter(StronglineisPowercircuitwhilelightlineiscontrolloops)Tointroducethedesignmethod,anexampleischosen.Therightsidediagramisasingle-phaseinverterincludingthemainpowercircuitandthedigitalcontrolloops.Itcanbeseenfromthediagram,twocontrollooparebeenusedtogetbetterperformance.ItiscalledMulti-loopcontrolorganization,theinnerloopisoftenacurrentloop,theexternalloopisoftenavoltageloop,sowehavetodesignbothcontrollersforthetwoloops.AnExampleParametersList2kW2mH30uF25Ω380V220V(RMS),50Hz10kHz0.20.01Therightpictureisthemaincircuitofsinglephaseinverter.Here,wechooseasevereconditiontodesignthecontrollerparameterswheretheloadresistanceislargeenough,thismeansnon-loadcondition.Themainparametersofthecircuitislistedintherighttable.Inpracticaldesign,someESRwillbeconsideredincludingtheinductance’sESRandthecapacitor’sESR.DesignProcedureTypicalorganizationofasingle-phaseinverter(StronglineisPowercircuitwhilelightlineiscontrolloops)Sincebothloopneedtobedesigned,weshoulddesignstepbystep.Usually,Theresponsespeedofcurrentloopisfastthanvoltageloop,soitisreasonabletodealtheoutputvoltageasadisturbancewhenmodelingthecurrentloop.Inthiscase,thefirststepismodelingthecurrentloopanddesigncurrentcontroller.Currentloopofasingle-phaseinverter(StronglineisPowercircuitwhilelightlineiscontrolloops)DesignofinnerCurrentloop

Fromtheformerdiagram,thecurrentcontrolloopcanbeyielded.Currentcontrolloopofasingle-phaseinverterCurrentloopblockdiagramcontrolblockinsdomainTherightsideiswholetransferfunctionwithPIcontroller.Theopentransferfunctionisasfollow.

DesignProcedureofPIParametersThewaytodesignPIparametersinfrequencydomainisasfollow:

1)DrawtheBodeplotofopenlooptransferfunction(withoutPIcontroller);

2)chooseproperCrossoverFrequencyandPhaseMarginafteraddingPIcontrolleraccordingtothedrawnBodeplot;

3)calculatethePIcoefficients.BodeplotTrans-functioninfrequencydomainCrossoverFrequencyPhaseMarginStepone:DesignProcedureofPIParametersSteptwo:

Stepthree:DesignProcedureofPIParametersAfterdesigningthePIcontroller,theBodeplotofthecurrentopenloopcanbeobtained.CrossoverFrequencyPhaseMarginBodeplotofcurrentopenlooptrans-functionSincethePIparametersaregotinsdomain,thelaststepistotransformthemtozdomain.Heregivessomecommondiscretizingmethod.Afterthisstep,thePIparametersareeventuallygot.METHODZ-FORMBackwardEulerForwardEulerTustinDesignofexternalVoltageloopSameasthedesignprocedureofCurrentloop,getthecontrolblockatfirst.

Still,theoutputloadcurrentIoistreatedasadisturbancewhenmodelingtheloop.Intheend,thePIcoefficientscanbeobtained.ControlblockofVoltageloop

SimulationResultsHeregivessomesimulationresultsgotbymatlab\simulink.Simulationwaves.(a)isthesteadywaveoffullload(b)isthewavefromfullloadtonon-load(vrefmeansthevoltagereferencewhilevomeanstheoutputvoltage)(a)(b)Sofar,thewholedesignprocedureofPIcontrollerhasbeendone.Fromthesimulationresults,wecanseethesystemhasperfectstabilityanddynamicresponse.OutlineModelingonSinglephaseDC/ACinverterRoots-LocusMethodFrequencydomaindesignDirectDigitaldesignStatespacedesign

ControllerdesignindiscretedomainDirectdesignofdigitalcontrolleroffersseveraladvantages:Considerablechoiceofstragegies:digitalPID、Poleplacement、Repetitivecontroller、Dead-beatcontroller、Predictivecontroller

etc.Possibilityofadirectdesignofcontrolalgorithmsspeciallytailoredtothediscretizedplantmodels.Samplingfrequencycarefullychoseninaccordancewiththebandwidthofthecontinous-timesystem.Digitalcontrolleriswellsuitedforthecontrolsystemsandwhichhasnocontinousequivalent.DigitalcontrollercanonicalstructureDigitalcontrollertobedesignedDiscretizedplantmodels

PolePlacementPolePlacementStrategy:

canbeusedtospecifytheclosedlooppoles.ClosedlooppolesClosedloopzeros

canbeusedtospecifythetrackingproperties.Twofreedoms:Withoutrestrictiononthedegreesofpolynomialsofdiscret-timeplantmodel.

WithoutrestrictiononthetimedelayWithoutrestrictionontheplantzerosNosimplificationofplantzeors

PolePlacement:ProceduretofollowProcedures:Determinethediscrete-timeplantmodel:Zdomainanalysis、Z

transformSpecifythedesiredregulationperformances,,andcalculate

Specifythedesiredtrackingperformances,andcalculateAgain,wewilltakethesinglephaseDC/ACinverterasadesignexampleAnexample:DetermineplantmodelInternalcurrentloopPulseWidthModulatorismodifiedbythezero-orderhold(ZOH)AnextradelayisaddedtomodelsampleandcomputationdelayAnexample:SpecifyclosedlooppolesTheclosedloopcharacteristicequationisusuallychosenintheformof:Dominatedpoles:resultsfromthediecretizationofaseconde-ordercontinous-timesystemwithHighfrequencyauxiliarypolesforsystemrobustnessAnexample:SpecifytrackingpropertiesTrackingpropertiescanbeachievedbyshapingUsually,theregulationdynamicsisthesameasthetrackingdynamics,canbereplacedbyagainwhichensuringaunitstaticgainbetweenreferencetrajectoryandtheoutput.Uptonow,allunkownparametersareobtained.Anexample:parameterscalculationDeterminecontrolplantSpecifyclosedlooppolesSpecifytrackingdynamicsAnexample:parameterscalculationInternalcurrentloopBodeplotPole-zeromapAnexample:parameterscalculationExternalvoltageloopBodeplotPole-zeromapAnexample:Matlab/SimulinkSimulationConclusionRemarks:PolePlacementmakesitpossibletoobtainthedesiredtrackingandregulationbehavior.Thelimitationisthatitmakesnosimplificationofplantzeros.OutlineModelingonSinglephaseDC/ACinverterRoots-LocusMethodFrequencydomaindesignDirectDigitaldesignStatespacedesign

ControllerdesigninstatespaceDesignofcontrolsystemsinstatespace:Generallytwodesignmethods:thepole-placementmethodandthequadraticoptimalregulatormethod.Generallytwofeedbackmethods:statefeedbackandoutputfeedback;wefocusonstatefeedback.Inthestatefeedback,thestateobserver,full-orderorreduced-orderisoftenrequired.Necessaryandsufficientconditionforarbitrarypoleplacment;Necessaryandsufficientconditionforstateobservation.StatefeedbackOutputfeedbackControllerdesigninstatespaceWithfeebackgainmatrix:

Overview:Pole-placementwithstatefeedbackControlplant:Feebackgainmatrix:Conclusions:Theeigenvaluesofstatematrixisalteredandst

溫馨提示

  • 1. 本站所有資源如無(wú)特殊說(shuō)明,都需要本地電腦安裝OFFICE2007和PDF閱讀器。圖紙軟件為CAD,CAXA,PROE,UG,SolidWorks等.壓縮文件請(qǐng)下載最新的WinRAR軟件解壓。
  • 2. 本站的文檔不包含任何第三方提供的附件圖紙等,如果需要附件,請(qǐng)聯(lián)系上傳者。文件的所有權(quán)益歸上傳用戶所有。
  • 3. 本站RAR壓縮包中若帶圖紙,網(wǎng)頁(yè)內(nèi)容里面會(huì)有圖紙預(yù)覽,若沒(méi)有圖紙預(yù)覽就沒(méi)有圖紙。
  • 4. 未經(jīng)權(quán)益所有人同意不得將文件中的內(nèi)容挪作商業(yè)或盈利用途。
  • 5. 人人文庫(kù)網(wǎng)僅提供信息存儲(chǔ)空間,僅對(duì)用戶上傳內(nèi)容的表現(xiàn)方式做保護(hù)處理,對(duì)用戶上傳分享的文檔內(nèi)容本身不做任何修改或編輯,并不能對(duì)任何下載內(nèi)容負(fù)責(zé)。
  • 6. 下載文件中如有侵權(quán)或不適當(dāng)內(nèi)容,請(qǐng)與我們聯(lián)系,我們立即糾正。
  • 7. 本站不保證下載資源的準(zhǔn)確性、安全性和完整性, 同時(shí)也不承擔(dān)用戶因使用這些下載資源對(duì)自己和他人造成任何形式的傷害或損失。

最新文檔

評(píng)論

0/150

提交評(píng)論