半導體行業(yè)職位招聘表

SalaryBudge'sSetTopBoxproductssalesinGreaterChinaregion.Developssalesstrategies,AccountManagementandPlanningandforcastssalesvolumesforallSetTopBoxproductsinGCregion.LiaizewithSetTopBoxBUtoformandimplementGCsalesstrategy.Manageagroupof7KeyAccountManagersinGCareaandisresponsibleforallsalesandprofitabilityachievementinthisregion.100kBSEngineeringandabovehave8-10+yearsofSTBsalesand/ormarketingexperienceinGCareaandisveryfamiliarwithChineseKeySetTopBoxaccounts.PreviousengagementwithSARFTand/orChineseOperatorisamajorplus.MustdemonstratesuccessfultrackrecordsandcanshowwaystobringResponsibleforallaspectsofSOCdigitaldesign,includingmicroarchitecture,logicdesign,synthesis,andverification.Provideleadershiptoagrowinggroupof20-30engineersandengineeringmanagers.Leadtheteamtodevelopmultipleproductsthroughallstagesofthedevelopmentprocess.Continuouslyimprovemethodologies,processesandprocedures.MSEEand8+yearsexperienceinsemiconductordesignmanagement,atleast2yearsatdirectorlevelforaWorkingknowledgeofindustrystandardlogicdesignandverification.UnderstandingofDigitalTVcontrollerchips.Inthisroleyouwillberesponsibleforchip/blocklevelfloorplanning,powerplanning,timing-drivenplaceandroute,congestionanalysisandrepair,clocktreesynthesis,timingclosureandphysicalverification(DRC/LVS).Performcircuitcustomlayoutdesignandpowerplanning.職位要求：JobRequirement:LookforSoftwareManagerforSoftwareConfigurationManagementandProjectManagement?Justificationofapplication:DTVsoftwareconfigurationmanagementincludingsoftwarereleasecontrol,DevTestandprojectmanagementSCMwillberesponsibleforestablishingtheconfigurationmanagementenvironment,softwarereleasecontrol,versioncontrol,buildautomation,softwaredevelopmenttest,Wikiservermaintenanceandprojectsmanagementetc.SCMalsoneedsexcellentcommunicationandbusinessprocessmanagementskillswithexpertiseinmanagingprojectschedule,softwarereleaseprocess,applicationdevelopments,deploymentsandconfiguringdevelopmenttools(JIRA,SVN,Coverity,FishEye)etc.SoftwareManager?MSinCS/EEwith5+yearsexperienceinITorsoftwareapplicationdevelopmentorprojectmanagement.ExperienceworkingunderLinuxsystemandextensivelyfamiliarwithconfigurationmanagementdisciplines?ExperienceinApplicationDevelopmentusingaformalmethodologyprocessandexperiencewithsoftwarereleasecontrolanddevelopmenttest?ExperienceinProjectManagementusingMSprojecttoolstotrackprojectschedule,monitorthecriticalpathandtakeproperactionstopreventscheduledelay?ExperiencewithmanagetheLinuxserversandnetworksetupandwritingBatchfilesorscripts(MSBatchfiles,Linuxshellscripts,Python,Lua)toperformautomationandconsistencyExperiencewithDTVorMultimediasoftwaredevelopment,sourcecodecontrolsystems,bugtrackingtoolsandstaticcodeanalysis–SVN,JIRA,Coverityarebigplus2.2+Yearsprojectmanagementexperiencerequired,includingexperiencemanagingdevelopmentteams.3.B.SORM.Sincomputerscience,engineering,telecommunicationorequivalent.4.StrongexperienceinsoftwaredevelopmentusingC/C++.5.Workexperienceonembeddedsoftware,TVorSTBdevelopmentexperiencepreferred.6.WorkexperienceonsecuritymoduleforTV/STB.7.Strongabilityofcommunication,goodEnglishskillsinwritingandreading.8.Ahighdegreeofresponsibilityandteamspirit,willingtoacceptthechallengingwork,timelyandefficientcompletionoftasks.ResponsibleformanagingagroupofTE’stoprovidecost-effectiveandhighcoverageATEtestsolutionformultimediaSOCproducts.Developteststrategyandplansformanufacturing,qualification,andcharacterization.ImplementATEhardwareandprogramasplan.InterfacewithShanghaionsitedevelopmentfunctionssuchasmarketing,design,DFT,validation,systemandproductengineeringonnewproductdevelopmentandproductionrelease.Providetechnicalsupport,mentoringandtrainingforjuniorengineers.DrivetestengineeringbestpracticeswithinthePEandTEgroup.Definedevelopmentschedule,trackingandreportingprogresstoProductandTestEngineeringdirector.B.S.orM.SdegreeinElectricalEngineeringwith6-10yearsofexperienceinTestEngineering.ExperiencewithVerigy93KATE,PinScaleandmixed-signalinstrumentationdesired.C/C++programmingskillsrequired.Verilog/VHDLexperienceisaplus.ExperiencewithDFT,SCAN,BISTandDFMmethodology.ExperiencewithtestdevelopmentforARM,DSP,memory,PLL,ADC,DAC,andinterfacesuchasUSBandDDRaplus.Excellentcoachingandpeoplemanagementskills.GoodverbalandwrittencommunicationskillsinEnglishandMandarin.SCMwillberesponsibleforestablishingtheconfigurationmanagementenvironment,softwarereleasecontrol,versioncontrol,buildautomation,DevTest,Wikiservermaintenanceandprojectsmanagementetc.SCMalsoneedsexcellentcommunicationandbusinessprocessmanagementskillswithexpertiseinsoftwarereleaseprocess,applicationdevelopments,deploymentsandconfiguringdevelopmenttools(JIRA,SVN,Coverity,FishEye)etc.Sr.SCM1.BS/MSinCS/EEwith3+yearsexperienceinITorsoftwareapplicationdevelopmentorprojectmanagement.ExperienceworkingunderLinuxsystemandextensivelyfamiliarwithconfigurationmanagementdisciplines.2.ExperienceinApplicationDevelopmentusingaformalmethodologyprocessandexperiencewithsoftwarereleasecontrolanddevelopmenttest.3.ExperiencewithmanagetheLinuxserversandnetworksetupandwritingBatchfilesorscripts(MSBatchfiles,Linuxshellscripts,Python,Lua)toincreaseautomationandconsistency.4.Experiencewithsourcecontrolsystems,bugtrackingtoolsandstaticcodeanalysis-SVN,JIRA,Coverity.JobDuties:Writeand/orreviewfunctionalspecifications;ImplementSoftwarecomponentsbasedonspecification;Developalgorithms;Define,implementandcarry-outtests;Releasesoftwaremodulesasrequiredbyprojecttargetsandschedule;Contributetoconfigurationmanagement,buildmanagementandsoftwarequalityassurancetasks;Createandmaintaininternaldocuments;Reviewandhandlechangerequest;Assistapplication/customersupportgroupwithcustomerintegrationandsolvingfiledissues;Pointoutissuesandpotentialimprovementsinthesoftwarearchitecture,developmentmethodsandtools.3+yearssoftwaredevelopmentexperience;Experiencedwithdesign,developmentandtestofembeddedsoftware;Hardwareoriented,familiarwithdigitalsignalprocessingandDSPequipment;ExperiencewithC/C++;Demodulatorknowledgeisaplus;Enthusiasticandhands-onattitude,keentolearn;Self-driven,capabletoworkautonomously;Goodteamspirit;GoodcommandofEnglish(writingandspeaking);M.Sc.levelbyeducationorbyexperience.2.Experience:Experienceon3Dgraphicsdriver,and/or3Dgraphicsapplication.3.Knowledgeof/SkillsandAbilities?BSorMSinComputerScienceorrelatedfieldwith3+yearspracticalexperiencewithsoftwaredevelopmentandprocessspecificallyfordevicedriversandsoftwareapplicationdevelopmentinLinuxenvironments.MinimumRequirements:?Thoroughunderstandingandpracticeintheuseofobject-orienteddesignpatternsandlanguages.?Goodunderstandingofalgorithms,datastructures,andperformanceoptimizationtechniques.?WorkingexperiencewithCandC++and3yearsprogrammingofamodernprogramminglanguagehighlydesiredEngineer?Excellentteamplayer,andproactiveandresponsiveonprojectrequest.?ThoroughknowledgeofsoftwareengineeringprinciplesandpreviousexperiencewithTVdevelopment.?ExperiencecoordinatingactivitiesbetweenHW/SWorganizationshighlydesirable.?Experiencewithsemiconductorbringupandvalidationaplus.1.BringupsystemforSDplatform.3.Fixbuginthesystemespeciallyrelatedtolowlayerdriver.4.DesigncodinganddebugdriversforSTBchiponembeddedlinuxplatform,includingdemux,audio/videodecoderandsoon.5.DevelopBSPandcodeloaderforSTBboardusingARMassemblelanguageandClanguage6.On-sitesupportourcustomersabouttheissuesofdriversandapplicationsonSTBproject1.BachelororabovemajorinEEorComputer3.HaveexperienceinembeddedsystemdevelopmentespeciallyinLinuxJobDuties:Softwareapplication/Middleware/Firmwaredevelopmentbasedoncustomerrequirement;Addressanddebugthesoftwarebugs/issues;SupportglobalcustomersforSTBproducts;ManagethecommunicationbetweensalesandR&D.Qualifications:(Education,Experience,etc.)Bachelordegreeoraboveofthe"ComputerScience","CommunicationEngineering"or"ElectronicEngineering".Atleast1-3yearsexperienceofembeddedsoftwaresystemorSet-Top-Boxsoftwaredevelopment.BefamiliarwithMPEG&DVBprotocol.GoodatEnglishinreading,writing,speaking,passedCET-6.Goodprogrammingcapability(C,C++,assembler,etc),bettertohaveexperienceswithARM/MIPScoreproducts.Goodcommunication,teamworkspirit.Attentiontocustomerrequirementsandcapabilitytopushthesolutionacrossorganizationboundariesarerequired.1.Develop,simulate,andimplementDFTdesignfornewchipsandmeetthetapeoutschedule.2.Developthehighcoverageandcosteffectivetestpatternsfortheproductiontest.HighQualifications:4.Capableofindependentstudy,projectmanagementandbringinnewmethodology.1.LeadaDFTteamtodefineDFTflowandbuildDFTlogicandtestpatternsforSTB/DTVproduct.DFTManagerHigh2.Alsoworkwithtestengineertobringuptestandassistfailureanalysis.1.BS/MESSplus6+yrworkingexperienceinDFTflowandtestlogicdevelopment4.ChineseandEnglishwritten&verbalcommunicationkillsimportant.3.Participateinthecontinueddevelopmentofverificationstrategies;evaluateandintegratecuttingedgeverification/emulationmethodologiesintothetoolflow.4.WorkwithothercrossfunctionalteamsinChinaandoverseatospecify,verifyandimproveSoCqualityandtimelinesstoproduction.2.Teamdevelopment1.BSEEorMSEEwithaminimumof7yearsrelevantcomplexSoCdesignorverificationexperience2.Projectorteamleaderexperienceisamust;projectorpeoplemanagementexperienceof>2yearsispreferred.3.GoodEnglishandcommunicationskills;willneedfrequentcommunicationwithforeignteam.4.ExperienceforSOCdesignswithembeddedprocessorcoresandtheirintegrationwithothersystemcomponentsincludingmemorysubsystemsandperipherals.5.FamiliarwithHDLlanguages,simulationtoolsandtestbenchdesign,lowlevelassemblerlanguagesandC,orC++,scriptinglanguageDemonstratedproblemsolvingskillscoupledwithattentiontodetailandenthusiasmfordebuggingbasedonarightfirsttimeapproach.ReportingtoVerificationmanager,thecandidateisexpectedtoberesponsibleforfollowingtasks:+ApplyspecialistskillsandknowledgeinbothhardwareandsoftwaretoperformPre-Siliconverificationtasksforcomplex45nmMediaProcessorSOCdevices+Performco-verificationofprocessormodelsandRTLincludingapplicationsoftwareandfirmwareverification+Supportthedevelopmentofmultiabstraction/viewstoenableathoroughSocverificationfromunitleveltosystemlevel+WorkwithothercrossfunctionalteamsinChinaandoverseatospecify,verifyandimproveSoCqualityandtimelinesstoproduction+ProficientandexperiencedwiththeC/C++program.+BachelordegreeinElectricalEngineeringorrelatedarea,MSEEispreferred.+3yearsoraboveexperienceinASIC/complexSoCdesignorverification.+ExperienceofSOCdesignswithembeddedprocessorcoresandtheirintegrationwithothersystemcomponentsincludingmemorysubsystemsandperipherals.+FamiliarwithMicroprocessorand/orDSPinstructionsetsandhowlowleveldriversoftwareintegratesintoSOCarchitecture.+FamiliarwithHDLlanguages,simulationtoolsandtestbenchdesign,lowlevelassemblerlanguagesandC,orC++,scriptinglanguages+GoodEnglishandcommunicationskills;willneedfrequentcommunicationwithforeignteam.+Experiencerelatedtovideo/audiodecoding,processtechnologyandreliabilityqualificationisaplus1.MajorinEEorCS,Masterorabove;2.1~3yearsexperienceofIClogicdesign;3ormoreyearexperienceofIClogicdesignforaudio/videosystem;Engineer3.Self-motivated,goodcommunicationskills;1.Education:Masterdegreeorabove,majorinCS,EE,orrelated.2.Experience:Experienceonhardwarec-modeling,3Dgraphicsdriver,and/or3Dgraphicsapplication.3.Knowledgeof/SkillsandAbilitiesKnowledgeofcomputergraphics,OpenGL,and/orother3Dstandards;Knowledgeofcomputerarchitectureandlogicdesignisgoodplus.JobDuties:SOC/BEsilicon/systemvalidation,responsibleforvarioussiliconproducts,includingDDR/MDMI/DTVetc,shortteamonbusinesstravelindomesticorabordisnecessary.Qualifications:(Education,Experience,etc.)BachelororEEofcomputerscience.FamiliarwithbasicSW/HWstractureofTVsystem.KnowledgeandexperienceinFPGAorotherrealtimedesignanddevelopment,siliconknowledgeonAudio/videoencoding,suchasMPEG,AACTormp3.FamiliarwithtestanddevelopmentequipmentsuchasLA,Osciloscope.Goodteamworkspirit;self-mofivatedandabletoworkindependently/effectively1.DevelopSWtoolforSystemValidation.2.DevelopSWtoolforChipValidation.3.DevelopSWtoolforautomatictesting.3.DebugandtraceSWorSWrelatedHWissuewhichcomesfromcustomerorinternalgroup.SystemHigh1.AskillfulClanguageSWprogrammerandC++isaplusinbothLinuxandWindow.2.Hastheabilitytoreadanddevelopassembledcode3.BasicDTV/ATVknowledgeandbefamiliarwithMPEG2,especiallyinTS/PES/ESandwholestructure4.BefamiliarwithBorlandC++builderVC6andVisualstudio2005isaplus.9.Goodteamwork,hastheabilitytostudy/learningnewknowledge10.Cantakeshorttermbusinesstripinbothdomesticandabroad.-Masterorbachelordegreemajoringinelectronicengineeringorcomputerscienceispreferred-2yearsworkingexperienceformasterdegreeor5yearsworkingexperienceforbachelordegreeB.S/M.SdegreeinComputerScienceorMicro-electronicsorequivalents-Familiarwithvideocompression/decompressionalgorithmsandmultimediaapplications.-FamiliarwithvideocodecstandardssuchasHEVC,H.264,MPEG2,AVS,etc-SkillfulinC/C++programminglanguage.-Teamplayerandself-driven.-GoodcommandofEnglish,andgoodenoughtoattendmeeting貴司有招聘需求的，歡迎和我聯(lián)系；1.2.持續(xù)的分析用戶的特定行為和特征，建設用戶角色模型，為產(chǎn)品運營和設計創(chuàng)新提供指引或依據(jù)；3.指導、評估團隊的可用性工作，對問題提出修改建議，并加以改進；3.對軟件應用產(chǎn)品的交互設計、易用性研究有認識；4.技能，能完成描述性的數(shù)據(jù)統(tǒng)計；崗位職責:2.ICverificationengineer（video）ThecandidatewilltakepartinHEVC/H265videocodecIPdevelopmentteamasverificationplayer.Heorshewilltakepartoftheseresponsibilities:1.Co-workwitharchitectanddesignerstounderstandarchitecturespecificationandmicroarchitecturespecification.1.3+yearsexperiencewithMasterdegree,or5+yearsexperiencewithBachelordegree.2.VideocodecASICexperienceandknowledge,likeMPEG2/4,H264,etc.HEVC/H265wouldbeabigplus.3.VeteraninASICverification,especiallyinUVM/SystemVerilog/SystemCetc.4.Familiarwithscripts,likeperl/shell/MakefileandLinuxOS.5.SolidC/C++knowledgeandexperienceinmodelingwouldbeabigplus.6.Goodteamplayerandquicklearner,selfmotiveandquickproblemsolvingskills.7.FluentoralandwrittenEnglish.2.LogicimplementationwithVerilogHDL;3.Block-levelverification;11.Familiarwithallfront-endflowsincludingLINTcheck,simulation,synthesis,STA,formalandpoweranalysis,etc.;4.BSwith5+yearsorMS/Ph.Dwith2+yearsexperiencesinelectronicengineering/computerscience;5.Proactive,creativeandteamplayer;6.Proficientinvideoandimageprocessingtechniques,in-depthunderstandingofalgorithmandimplementationforvideocodingstandardssuchasMPEG-2,MPEG-4,H.263,H.264/AVC;7.Provenrelatedengineeringexperiencesinarchitecture/micro-architecturedefinitionforvideocodecdevelopmentwithsuccessfultape-outs/production;8.SolidprogrammingskillswithC/C++;(Sr.)ASICDesignVerificationEngineerPositionDescription:Hands-onexperiencedinCPUverification,includingtestplanandtestbenchdevelopment,testcasedevelopmentandtestcoverageassessmentwouldbeagreatplus;Familiarwithfront-endASICdesignflow;Sr.PhysicalDesignEngineerDESCRIPTIONOFDUTIESINADDITIONTOTHOSEINJOBDESCRIPTION:WorkwithglobalFront-EnddesignteamandphysicaldesignteamforlargescaleASICchipphysicalimplementation.Focusonphysicaldesignofdeepsub-micronGPUchipsincludingblocklevel(fullchip)floorplanning,timingclosure,place&route,physicalverificationetc.-PhDwith1+yearsofindustrialexperienceorMSEEwith3+yearsofindustrialexperienceinASICdesign-Expertiseinplaceandrouting,signalintegrity,poweranalysis,CTSdesign,DFT,designruleandconnectivityverification,timingclosure.-Successfullygonethroughcompleteproductdevelopmentcycle.Goodanalyticalanddebuggingskills-Goodlistening,writingandspeakingEnglish.-Goodcommunicationskills,stronginterpersonalskillsandtheflexibility.Dedicated,hardworkingandgoodteamplayer-FamiliarwithBack-End(physicaldesign)EDAtools(synopsys,cadence,magma)-FamiliarwithFront-EndEDAtoolsorcircuitdesignisaplus-FamiliarwithUnix/LinuxenvironmentandgoodatscriptsRoleandChance-ParticipateIPandSoClevelarchitecturedefinition,derivefunctionalanddesignspecificationsandanalyzefeasibilityoftechnicalandarchitectures.-ImplementdesignwithVerilogtoachievespecificationgoals.Simulateanddebugthecodesincodingstage.-GothroughtheFEdesignflowtodeliverqualifiednetlist.FeedbacktoPhysicalDesignteamtohelptoclosetimingandcheckfloorplan.-WriteASICspecificpartoftestplan.Co-workwithverificationengineerstoprovefunctionalcorrectnessfromblockleveltoSoClevel-SupportFW/SWbring-upanddebugging-WorkingasthetechnicalpointofcontactontheASICarea.PreferredExperience:-MajorinEE&CS-ProvenASIC/SoCDesignExperience(5+yearsasabachelor,3+yearsasamaster).-MusthavestrongbackgroundonIPdevelopment-MustbeproficientinVerilogcoding,debuggingandmodeling-MustbeskilledinASICdesignflow,suchassynthesis,DFT,timinganalysis,ECOetc.-MustbeskilledinmainstreamEDAtoolsfordesignandsimulationsuchasncsim/vcs,RC/DC,PT,Formality/LECandDFT.-MustbefamiliarwithverificationmethodologiesforfromblockleveltoSoClevel.-Shouldbefamiliarwithshell/perl/tclprogramminginLinuxOS.-ShouldbefamiliarwithP&RandManufacturetech.-GoodEnglishhearing,speaking,readingandwritingcapabilities.-Willbeabigplusifhavingmassproductiontapeoutexperience.-WillbeaplusifhavingC/C++/SystemVerilogexperience-Bachelor/MasterDegreeinElectricalorComputerEngineering.-ProvenASIC/SoCDesignVerificationExperience(5+yearsasabachelor,3+yearsasamaster).-AdvancedC/C++/SystemVerilog,RTLcodingtechniques.-PCIe,BIOS,KernelDriverexperiencewouldbeanasset.-Designforverification(assertionbaseddesignstrategies,codecoverage,functionalcoverage,-Abilitytobeflexibleintermsofresponsibilitiesandhours.WorkwithglobalFront-EnddesignteamandphysicaldesignteamforlargescaleASICchipphysicalimplementation.Focusonphysicaldesignofdeepsub-micronGPUchipsincludingblocklevel(fullchip)floorplanning,timingclosure,place&route,physicalverificationetc.-CanguaranteefulltimeworkfromMondaytoFridayfor6months(MUST)-MasterofEE.-KnowledgeableinallaspectsofdeepsubmicronASICdesignflow-FamiliarwithBack-End(physicaldesign)EDAtools-FamiliarwithUnix/Linuxenvironmentandgoodatscripts3.Canactasprojectbackendworkpackageleader,manageworkpackageexecutionfromdefinitiontoqualificationwithinscheduleandqualitystandard-B.Sc.degreeoraboveinSemiconductor,ElectronicsEngineeringareas-8yearoraboveexperienceinbackendSoCdesignwithprovenSoCtapeoutexperience-Havebackendteam/projectmanagementexperienceTheBU(BusinessUnit)AnalogMixedSignalwithin3GPdevelops,producesandsellsadvanced,highlyintegratedCMOSsystemPortablePowerSolutionsforMultimedia&Platforms.OurmaincustomersareNokia,SamsungandSonyEricsson.TheBUhasit’sheadquarterinGrenobleandit’sdesignoperationsinGrenoble,Catania,PragueandShanghai.Currentlyitemploysabout300persons.AsaDigitalDesignEngineeryouarememberofoneorourPMUproductdevelopmentteams.Youwillbedevelopingdigitalcontrolcircuitsforinnovativemixedsignalhighvoltage(20V)CMOSICs.YoufulfillanimportantroleintheintegrationofthesemodulesintoPMUs(top-leveldesignandsimulations).TherolewillcoverthefullICdesigncyclefromspecificationthroughtotestingofengineeringsamples.1．Design&Development(powerusage,functionality,timing,size)?TakingcareofconfigurationdatamanagementonIPandIClevelandabletofulfillroleasprojectintegratorforproductsnotperformingtospecificationbothonIPandIClevel?Analysesdesignflaws?Isresponsibleforqualityofowndesign.?Improvesdesignsovertime,byapplyinglessonslearned.?Ensurescompletenessofthe(module)documentation.?Isco-responsibleforreviewofownwork.4.Schedule&Efficiency?Reportsprogressofownactivities.?Makesoptimallyuseofknownandverified(sub)modulesinordertoreduceprojectrisksanddevelopmenteffort.?Contributestobalancingamountofworkamongpeerdevelopers.?Communicateswithclarity,structureandconcisenessbothverballyandinwritingfor.?Knowstechnologytrendsanddeploysthem-Ateam-workerwithapro-activeattitude;Openincommunication-Determinestrategyandtacticsforexecutingproductsolutionsfrombusiness/designawardtoproduction.-Translatecustomerrequirementsintospecifictasksforallfunctionalareasandproactivelycapture,trackanddriveallissuestoclosure.-Developacloseworkingrelationshipwiththecustomersdevelopmentteamandusecreativitytofindsolutionstotheirissues.-Developandmaintainpertinentmetrics/KPIsformeasuringprogramandprocesshealth/effectiveness.-ProvenhistoryofProject/ProgramManagementofsoftwareandhardwareproducts-StrongtechnicalbackgroundandexperienceworkingwithcustomersinanOEMenvironment-Experiencemanagingglobalprojects-Excellentverbalandwrittencommunicationskills(EnglishandMandarin)-BS/MSEngineeringorComputerSciencepreferred3.PHYSICALDESIGNENGINEER-ResponsibleforallaspectsofphysicaldesignandimplementationofGraphicsprocessors,integratedchipsetsandotherASICstargetedatthedesktop,laptop,workstation,set-topboxandhomenetworkingmarkets-ParticipatingintheeffortsinestablishingCADandphysicaldesignmethodologies,flowautomation,chipfloorplan,power/clockdistribution,chipassemblyandP&R,timingclosure-Workingonstatictiminganalysis,powerandnoiseanalysisandback-endverificationacrossmultipleprojects-2+yearsofexperienceinlargeVLSIphysicaldesignimplementationon0.15u,0.13u,90nm,or65nmtechnology-Successfultrackrecordofdeliveringproductstoproductionisamust.-UnderstandingofcustommacroblockssuchasRAMs,CAMs,high-speedIOAsaseniormemberofourASIC-PDteam,you'llbeworkingonstreamliningthechipinfrastructureprocessacrossproductdesigns,focusingonsuchtasksasclocks/timing/convergence/designfortestandscriptingofflows.You’llbefocusingonfullchiplayoutplanning(partitioning,planningclockdistributionandotherstructure,methodology),partition/fullchiptimingclosure(primetimescripts,othertools,etc)andgate-leveldesignofhigh-speedlogic-WorkinconjunctionwithPlaceandRouteEngineerstoachievetimingclosureforbothpartitionlevelandfullchiplevel-DevelopandenhanceentiretimingflowfromFrontend(pre-layout)tobackend(post-layout)atbothchipandblocklevel.-Developcustomtimingscriptsusingtcl/primetimeforclockskewanalysis,specialcircuitssuchasclockdividers,corelogic<->IOmacrosinterfacessuchasPCI-E,Frame-Buffer/Memory,TMDS,etc.-ChiplevelIntegration-Developflowtophysicallypartitionandfloorplantheentirechip.-Developanddc-shellscriptsforperformingECO's.-Abilitytomultiplexmanyissues,setpriorities,andworkinateamenvironment-Keepuptodatewithleadingedgetechnologies5.ASICVerificationEngineer?Blending,colorspaceconversion-Strongproblemsolvingandanalyticalskills-MustbeproficientinVerilogHDL-Strongproblemsolvingandanalyticalskills-Develop/maintaintheproprietaryinternaltoolsforthebuildingprocessonvariousfunctionalandperformancesimulationsoffuturechips.-Strongscriptinglanguage(Perlpreferred)programmingability,wellversedindeveloping/debuggingonLinux/Unix.?Softwareintegration/testing/incrementalbuilding/versioncontrol.?Largescalescriptingsystemdevelopment.-Familiarwithoneversioncontroltool,perforcepreferred.-ExperienceonLinuxclusterisaplus.-ExperienceonCygwinisaplus.-ExcellentEnglishwriting/speakingskills.-DesignanddevelopstateoftheartGPUhardware,intheareaofgraphicsmodules,computationunits,datacommunicationunits,ormemorycontrollers-WorkingwithinateamofgraphicsarchitectsandASICengineerstodocument,design,developandverifyfunctionalandperformancemodelsforNVIDIA’snewchips.-Developtests,testplans,andtestinginfrastructuretovalidatetheperformanceandfunctionalcorrectnessofASICsmodeledinC++,RTLandrealsilicon.-Developtestsandtoolstocollectusefulinformationfor3Dgraphicsperformanceanalysis.SystemlevelprogrammingexperienceinOS,Compiler,softwaretools,virtualmemorysystem-ExcellentEnglishwritingforengineeringdocumentation,Englishoralwellenoughtoattendmeetings-ASICDesignfordisplaysubsystem-Micro-architecturedefinition;workingcloselywithvideo/graphics/systemarchitects.-Knowledgeableindesigningimagepostprocessingsystem(colorspaceconversion,up/downscaling,sharpening,de-interlacingandetc.)The3DPerformanceToolsSoftwareEngineerwillhavetheprimaryresponsibilitytodesignandimplement3DgraphicsprofilinganddebuggingapplicationsforthePC,EmbeddedandMobile3Ddevelopmentcommunity.Thesuccessfulcandidatewilldevelopapplicationsthatwillassistdeveloperswithidentifyingbottlenecksandinconsistenciesintheir3DgraphicsapplicationbyexposingDriver