北科大853電路理論與自動控制原理電子數(shù)電課件digitale chap

8-3Up/DownSynchronousCounters

（加/減同步計數(shù)器）8-3-13-bitup/downsynchronouscounter8-3-2Up/downdecadesynchronouscounter8-3-13-BitUp/DownSynchronousCounter0123454323456765…Figure8–24

a4-bitsynchronousbinaryup/downcounter.ThomasL.Floyd

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Allrightsreserved.8-3-2Up/DownDecadeSynchronousCounterAnIntegratedCircuit:The74HC190

Anup/downsynchronousdecadecounter.Timingexamplefora74HC190.特點:異步置數(shù)

利用已有的計數(shù)器產(chǎn)品經(jīng)過外電路的不同連接方式得到。已有計數(shù)器： N進制需要得到的計數(shù)器： M進制 分兩種情況進行討論M<NM>N8-4Cascadedcounter---designofcounters任意進制計數(shù)器的構(gòu)成方法1.M<N思考:在N進制計數(shù)器的順序計數(shù)過程中,設(shè)法使之跳過不需要的狀態(tài)(多余的狀態(tài))方法:有幾種?結(jié)合芯片的功能表進行考慮.獲得任意制進計數(shù)器的兩種方法

（a）置零法(復(fù)位法)

（b）置數(shù)法(置位法)

（1）置零法(復(fù)位法):利用置零端適用于:異步置零的器件瞬時出現(xiàn)當(dāng)?shù)贛個脈沖出現(xiàn)時，迅速置零例:用置零法將十進制計數(shù)器74LS160接成六進制計數(shù)器

分析：74160具有異步置零、同步置數(shù)功能功能表

CPRDLDETEP工作狀態(tài)01111011101110置0預(yù)置數(shù)保持保持但C=0計數(shù)例:用置零法將74LS160接成六進制計數(shù)器例:用置零法將74LS160接成六進制計數(shù)器011060110譯碼產(chǎn)生低電平電路的狀態(tài)轉(zhuǎn)換圖*電路的改進：考慮到置零信號可能太短，有的來不及動作，可以增加一個RS觸發(fā)器

增加電路可靠性獲得任意制進計數(shù)器的兩種方法（a）置零法(復(fù)位法)

（b）置數(shù)法(置位法)利用置位端去掉多余的N-M個狀態(tài)可以保留原芯片的進位輸出（2）置數(shù)法(置位法)例用置數(shù)法將74160接成六進制計數(shù)器注意：74160為同步置數(shù)（a）置入00001010用置數(shù)法將74160接成六進制計數(shù)器50101（b）置入10011001用置數(shù)法將74160接成六進制計數(shù)器00102.M>N此時,一個芯片就不夠用了,考慮用N片。分兩種情況考慮：M可以進行分解：M=N1×N2M為素數(shù),無法分解第一種情況:M=N1×N2串行進位并行進位兩種方法Figure8–38Twocascadedcounters(allJandKinputsareHIGH).

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Allrightsreserved.例如:100=10×10,60=6×10Figure8–39TimingdiagramforthecascadedcounterconfigurationofFigure8–38.

ThomasL.Floyd

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Allrightsreserved.4×8=32例:試用兩片同步十進制計數(shù)器74LS160

接成百進制計數(shù)器方法一:電路的并行進位方式：CP同步0000000010011001時自動置零、進位百進制計數(shù)器方法二、電路的串行進位方式：CP異步0000000010011001時自動置零、進位百進制計數(shù)器思考:如果用十六進制的計數(shù)器組成百進制,如何做?Figure8–40Amodulus-100counterusingtwocascadeddecadecounters.

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Allrightsreserved.Figure8–41Threecascadeddecadecountersformingadivide-by-1000frequencydividerwithintermediatedivide-by-10anddivide-by-100outputs.

ThomasL.Floyd

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Allrightsreserved.Figure8–42

ThomasL.Floyd

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Allrightsreserved.Figure8–43Adivide-by-100counterusingtwo74F162decadecounters.

ThomasL.Floyd

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Allrightsreserved.第二種情況:M為素數(shù),無法分解整體置零方式整體置數(shù)方式兩種方法例:試用兩片同步十進制計數(shù)器74LS160

接成二十九進制計數(shù)器分析:二十九是一個素數(shù),要用…電路的整體置零方式先接成百進制,再整體置零29001010010100100100000000譯碼產(chǎn)生低電平電路的整體置數(shù)方式先接成百進制,再整體(同步)置數(shù)28001010000100000100000000下一個CPFigure8–44Adivide-by-40,000counterusing74HC1614-bitbinarycounters.Notethateachoftheparalleldatainputsisshowninbinaryorder(the

right-mostbitD0istheLSBineachcounter).

ThomasL.Floyd

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Allrightsreserved.說明:四個十六進制共有:16×16×16×16=65,536種狀態(tài),要組成40,000進制,多余的狀態(tài):65536-40000=25536,對應(yīng)的十六進制數(shù):(63c0)16任意進制計數(shù)器的構(gòu)成方法小結(jié):

已有計數(shù)器：N進制,需要得到的計數(shù)器：M進制分兩種情況進行討論M<NM>N置零法(復(fù)位法)置數(shù)法(置位法)M=N1×N2M為素數(shù)串行進位并行進位整體置零整體置數(shù)8-5DesignofSynchronousCounters

（同步計數(shù)器的設(shè)計）REVIEW：Generalclockedsequentialcircuit.MooreType&MealyType;StateMachine同步時序邏輯電路的設(shè)計過程STEP1:StateDiagramThomasL.Floyd

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Allrightsreserved.Designa3-bitGraycodecounterThomasL.Floyd

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Allrightsreserved.STEP2:Next-StateTableThomasL.Floyd

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Allrightsreserved.STEP3:Flip-FlopTransitionTableThomasL.Floyd

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Allrightsreserved.STEP4:KarnaughMapsThomasL.Floyd

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Allrightsreserved.STEP5:LogicExpressionsforFlip-FlopInputsSTEP6:CounterImplementationThomasL.Floyd

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Allrightsreserved.STEP6:CounterImplementationSummarySpecifythecountersequenceanddrawastatediagram.Deriveanext-statetablefromthestatediagram.Developatransitiontableshowingtheflip-flopinputsrequiredforeachtransition.TransfertheJandKstatesfromthetransitiontabletoKarnaughmaps.GrouptheKarnaughmapcellstogenerateandderivethelogicexpressionforeachflip-flop.Implementtheexpressionswithcombinationallogic,andcombinewiththeflip-flopstocreatethecounter.P308:Example8-5ThomasL.Floyd

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Allrightsreserved.Designacounterwiththeirregular(無規(guī)律的)binarycountsequenceshowninthestatediagram.UseJ-Kflip-flops.Step1:StateDiagramStep2:Next-StateTableStep3:Flip-FlopTransitionTableStep4:ThomasL.Floyd

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Allrightsreserved.ThomasL.Floyd

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Allrightsreserved.Step6:CounterImplementation

Step5:LogicExpressionsforFlip-FlopInputsP308:Example8-6ThomasL.Floyd

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Allrightsreserved.Developasynchronous3-bitup/downcounterwithaGraycodesequence.ThecountershouldcountupwhenanUP/DOWNcontrolinputsis1andcountdownwhenthecontrolinputis0.MooreTypeorMealyType?ThomasL.Floyd

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Allrightsreserved.TheThree-bitup/downGraycodecounter補例1：設(shè)計一個串行數(shù)據(jù)檢測器。對它的要求是：連續(xù)輸入3個或3個以上的1時輸出為1，其他輸入情況下輸出為0。步驟一：邏輯抽象并畫出狀態(tài)轉(zhuǎn)換圖確定輸入變量：輸入數(shù)據(jù)，用X表示。確定輸出變量：檢測結(jié)果，用Y表示。對狀態(tài)編號：沒有輸入1以前的狀態(tài)為S0，輸入一個1以后的狀態(tài)為S1，連續(xù)輸入兩個1以后的狀態(tài)為S2，連續(xù)輸入3個或3個以上1以后的狀態(tài)為S3。根據(jù)題意畫出原始的狀態(tài)轉(zhuǎn)換表X01S0S1S2S3S0/0S0/0S0/0S0/0S1/0S2/0S3/1S3/1步驟二：狀態(tài)化簡合并等價狀態(tài)——相同的輸入下有相同的輸出，并轉(zhuǎn)換到同樣的次態(tài)。等價狀態(tài)X01S0S1S2S0/0S0/0S0/0S1/0S2/0S3/1簡化步驟三：狀態(tài)分配（狀態(tài)編碼）根據(jù)化簡后的狀態(tài)數(shù)M確定觸發(fā)器的個數(shù)N。按一定的規(guī)律對化簡后的每一個狀態(tài)都選定一個N位二進制代碼來表示。此電路M=3，則N=2。取觸發(fā)器狀態(tài)Q1Q0的00、01和10分別代表S0、S1、S2。步驟四：選定觸發(fā)器的類型，并求出電路的狀態(tài) 方程、輸出方程和驅(qū)動方程。根據(jù)狀態(tài)轉(zhuǎn)換表畫出電路次態(tài)和輸出的卡諾圖。000001110100011110

X00/000/0xx/x00/001/010/0xx/x10/1將此卡諾圖分解為Q1、Q0和Y的3個卡諾圖。000001110100011110

X00x001x1000001110100011110

X00x010x0000001110100011110

X00x000x1000001110100011110

X00x001x1000001110100011110

X00x010x0000001110100011110

X00x000x1化簡3個卡諾圖，得到狀態(tài)方程和輸出方程。比照選定觸發(fā)器的特性方程，變換狀態(tài)方程的形式，以得出驅(qū)動方程。本檢測電路選用JK觸發(fā)器構(gòu)成則驅(qū)動方程為：變換：步驟五：根據(jù)驅(qū)動方程、輸出方程畫出邏輯圖。步驟六：檢查設(shè)計的電路能否自啟動。畫出完整的狀態(tài)轉(zhuǎn)換圖來檢驗。能自啟動，設(shè)計完畢；不能自啟動，重新修改邏輯設(shè)計。補8-2時序邏輯電路的自啟動設(shè)計000001110100011110

X00/000/0xx/x00/001/010/0xx/x10/1由前面的例題可知，次態(tài)為任意項的狀態(tài)是無效狀態(tài)。如左圖中的11狀態(tài)為無效狀態(tài)。若使全部無效狀態(tài)的次態(tài)為有效狀態(tài)，則此電路必能自啟動。000001110100011110

X0