專業(yè)外語教學(xué)資料專業(yè)英語－4digitalelectronics

1、English in Electric Automation,Sunny Shen,4 Digital Electronics,prime praim n. 上撇號 trigger trig v.引起，觸發(fā) inversion inv:n n.反相，反轉(zhuǎn) quadruple kwdrupl adj.四合一 fabricate fbrikeit v.制造 integrated circuit 集成電路 capsule kpsju:l n.封裝 compatible kmptbl adj. 兼容的 obsolete bsli: t adj.廢棄的 threshold rehuld n.閥門， 門限

2、 zener diode 齊納二極管 adjacent deisnt adj.鄰近的，接近的 arc welding 電弧焊 intimately intimitli adv.密切地 recast ri:k:st v.重做 bistable circuit 雙穩(wěn)電路 cutoff kt:f 截止，關(guān)閉,Vocabulary,patriot peitrit, pt- n. 愛國者 envision invin v.預(yù)見 alphabet lfbet n.字母表 validity vliditi n.正確性 proposition .prpzin n. 命題 binary bainri n.二進(jìn)制

3、 nevertheless .nevles conj.然而 reveal rivi:l v.展現(xiàn)，揭示 complement kmplimnt n.補(bǔ)碼 truth table 真值表 algebraical adj.代數(shù)的 trial and error 試錯(cuò)法，試湊法 mechanism meknizm n.機(jī)械裝置，機(jī)構(gòu) elapse ilps v.（時(shí)間）流逝 enumerate inju:mreit v.列舉 expire ikspai, eks- v.期滿，終止 brute bru:t adj.僵化的,symmetry simitri n.對稱 label leibl v. 為標(biāo)號

4、 equilibria n.平衡 lever li:v, lev n. 桿，杠桿 latch circuit 鎖存電路 memory memri n.存儲器 depress dipres v.壓下 set set v.置位 calculator klkjuleit n.計(jì)算器 flip-flop flipflp n.觸發(fā)器 glitch glit n.干擾 synchronize sikrnaiz v.同步 leading edge 上升沿 lagging(trailing) edge lgi 下降沿 inhibit inhibit v.禁止 hitherto .hitu: adv.迄今，至今

5、 toggle tgl v.（來回）切換 Impulse impls n.推動(dòng)力 lever actuated switch杠桿傳動(dòng)開關(guān) toggle switch：扳鈕開關(guān)、撥動(dòng)開關(guān) frequency devider分頻器,HTL=high threshold logic：高閾值邏輯、 DTL=diode transistor logic：二極管晶體管邏輯、 TTL=Transistor-Transistor Logic：晶體管-晶體管邏輯(電路) CMOS= Complementary Metal-Oxide -Semiconductor Transistor：互補(bǔ)金屬氧化物半導(dǎo)體、 E

6、CL Emitter-coupled logic：射極耦合邏輯 vice versa 反之亦然 make out of 用.制造出. lower 早期的 Gate and Clocked Flip-Flops：門控和鐘控觸發(fā)器 timing problems定時(shí)問題（競爭冒險(xiǎn)） cross coupled交叉耦合 gating 選通,開啟 gating pulse 選通脈沖 gating signal 選通信號 coupling capacitors 耦合電容,A Historical Example. “Listen my children and you shall hear / Of t

7、he midnight ride of Paul Revere”According to Longfellow s poem, Paul Revere was sent riding through the New England countryside by a signal from the bell tower of the Old North Church in Boston. “One if by land and two if by sea. That is, one light was to be displayed if the British forces were adva

8、ncing toward Concord by the road from Boston, and two lights were to be displayed if they were crossing the Mystic River to take an indirect route. 這是一個(gè)歷史上的例子，“聽吧，我的孩子們，你們將會(huì)聽到/黑夜里保羅里維爾的馬蹄聲”朗費(fèi)羅的詩歌中描述，保羅里維爾將根據(jù)波士頓老北教堂鐘樓的信號騎馬越過新英格蘭鄉(xiāng)間，“一盞燈是陸地，兩盞燈是水路”，也就是說，如果英國軍隊(duì)通過陸地從波士頓開往康珂，就用一盞燈表示；如果他們越過神秘河走捷徑的話就用兩盞燈表示。

9、,難句參考翻譯,Background,This is a historical story about the War of Independence of America Relative materials: Road to Revolution.txt Road to Revolution.mp3,The message received by the Patriot was coded in digital form. We would say today that the two “bits” of information were conveyed by the code (str

10、ictly speaking, two bits could indicate four possible message and would require distinguishable lights, say one red and one white). The first light signaled that the British were advancing. The second light indicated by what route they were coming. Because only two routes of advance were envisioned,

11、 this second bit of information could be interpreted as indicating one of the two routes. 愛國者們收到的信號是數(shù)字編碼的形式，今天我們將說，是用編碼表示兩位信息（嚴(yán)格地說，兩位可以顯示四種可能的信息，并且要求兩種不同的燈，比如一盞為紅一盞為白）。第一盞燈表示英國人已經(jīng)出發(fā)，第二盞燈表示他們所走的路徑。因?yàn)橹挥袃蓷l可預(yù)見的路線，信息的第二位可以解釋為指示兩條路徑中的一條。,Information can be communicate in digital form if the massage is cap

12、able of being defined by a series of yes /no statements. There can be only two states of each variable used in conveying the information. Reducing information to a series of yes/no statements might appear to be a severe limitation on this method, but the method is in fact quite powerful. Numbers can

13、 be represented in base 2 and the alphabet by a digital code. 如果信息可以被定義為一系列的是否狀態(tài)，那么信息就可以用數(shù)字的形式進(jìn)行通信。每個(gè)變量只有兩種狀態(tài)用于表達(dá)信息。將信息簡化為一系列的是否狀態(tài)似乎是一種嚴(yán)格的限制，但事實(shí)上它卻是一種非常有效的方法。數(shù)字能以2為基數(shù)表示，而且字母也可以用它編碼。,Indeed, any situation with a finite number of outcomes can be reduced to a digital code. Specifically, n digital bits

14、can represent 2n states of possible outcomes. Digital communication takes a well-defined code known to the parties at both ends, as in our historical example. 毫無疑問的是，任何具有有限位數(shù)字的結(jié)果都可以用數(shù)字編碼表示。明顯地，2n數(shù)字位可以表示結(jié)果的2n種可能的狀態(tài)。像我們的歷史上的例子一樣，兩端的參與者使用明確定義的編碼進(jìn)行通信。 That is, it is desirable to broaden the range of val

15、ues in the regions for 1 and 0 to allow for variations in transistors, power supply voltage, noise that might get mixed in with the signal, and the like. 也就是希望擴(kuò)展1和0區(qū)間的有效范圍，以考慮到晶體管、電源電壓、混雜在信號中的噪聲、以及類似因素的變化。 allow vi 提供可能性，顧及，考慮到某種可能性,The door on a typical elevator has a timer on it which closes the d

16、oor automatically if no one enters the elevator and pushes a button for another floor. 典型的電梯門上有一個(gè)定時(shí)器，其作用是當(dāng)沒有人進(jìn)入電梯，并且按下到其它樓層的按鈕時(shí)可自動(dòng)關(guān)閉電梯門。 This accounts of four of the eight states. 這考慮到八個(gè)狀態(tài)中的四個(gè)。 The truth-table method is a brute-force way for describing a binary function. 真值表是一種描述二進(jìn)制功能的僵化方法。 The NOT

17、S function is represented algebraically by a prime added to the variable or expression to be NOTed: S means NOT S. 對S取反的代數(shù)表達(dá)法是在變量或要取反的表達(dá)式上加撇號：S表示對S取反。,If we were to draw a circuit diagram for such a system, including all the resistors, diodes, transistors, and interconnections, we would face an over

18、whelming task, and an unnecessary one. The task would be unnecessary because anyone who read the circuit diagram would in their mind group the components together into standard circuits and think in terms of the “system” functions of the individual gates. 如果我們畫出這種系統(tǒng)的電路圖，包括所有三極管、二極管和相互連接，我們將面臨的是一個(gè)不可能

19、完成的，而且是不必要的任務(wù)，之所以說是不必要，是因?yàn)槿魏巫x電路的人都會(huì)在心中將這些元器件組織在一起成為標(biāo)準(zhǔn)電路，并且從每個(gè)門電路的“系統(tǒng)”功能角度來考慮問題。 第一句中使用了虛擬語氣，表示不會(huì)有人真的會(huì)這么做。,What will happen if we connect the output of the two-stage amplifier to its input? Fig.4.16 (a) shows the circuit redrawn with this connection made and with turned around to emphasize the symmet

20、ry of the resulting circuit. We have also added inputs, which we shall discuss presently. 如果我們將兩級放大器的輸入和輸出相連，將會(huì)發(fā)生什么呢？圖4.16（a）給出了這樣一個(gè)電路，它為了強(qiáng)調(diào)改動(dòng)后電路的對稱性而重新繪制過。我們還增加了輸入端，我們不久將對此加以討論。,Mathematically, this connection requires Ui= U0, which defines a straight lines passing through the origin and having a s

21、lope of unity. In Fig.4.16 (b) we have drawn this line on the amplifier characteristic, which also has to be satisfied. This straight line is not a load line, but the same reasoning applies here as we followed in thinking about load lines: to satisfy both characteristics, the solution must lie at th

22、eir intersection(S). 從數(shù)學(xué)上看，這種連接要求Ui=Uo，它定義了一條通過原點(diǎn)，具有相同斜率的直線，圖4.16（b）中，我們在放大器特性中畫出了這條直線，而放大特性也應(yīng)當(dāng)被滿足。這條直線不是負(fù)載線，但是我們在考慮負(fù)載線時(shí)所遵守的同樣的前提也適合于這里：要滿足兩種特性，解必須位于它們的交點(diǎn)（S）。 as we followed in thinking about load lines為狀語從句。 reasoning：前提follow：遵守， follow the rules; follow ones instincts. 遵守規(guī)則；順從直覺,This logic family

23、 is useful where electrical noise is a problem, to prevent moderate noise signals, which might leak into the circuit, from affecting the circuit as valid digital signals. 當(dāng)電噪聲成為問題時(shí)，這個(gè)系列的邏輯器件可用于抑制適度的進(jìn)入電路的噪聲信號，以避免其成為有效數(shù)字信號而影響電路的性能。 We may accomplish a simpler realization by manipulating the expression

24、 for D into a more convenient form. 通過將表達(dá)式D變換為一種更方便的形式可以獲得一個(gè)更簡單的（電路）實(shí)現(xiàn)方法。 英語中，后置的定語、狀語等在翻譯時(shí)一般應(yīng)當(dāng)前置。 D= (T + B)S=(T+B)+S=(T+B)+S,In Eq. (4.2) the first form is the same expression for D as in Fig.4.12, except that we NOTed it twice. We do this because we want the final result for D to be primed, that

25、is, to be the NOT of something. This is required if we are to realize the final operation with a NOR or NAND gates. The second form results from using De Morgans theorem to distribute one of the NOTs to the individual terms. The third form is the same as the second, except that we have removed the d

26、ouble complement from S. 方程4.2中第一個(gè)表達(dá)式（步）除了我們?nèi)×藘纱畏且酝?，與圖4.12中D的表達(dá)式一樣，這么做是因?yàn)槿绻覀円门c“非和”和“與或”門實(shí)現(xiàn)最終的運(yùn)算的話，我們要將最后的D的結(jié)果加“撇”，也就是取反。第二個(gè)表達(dá)式來源于德摩根定理的應(yīng)用，以將“非”用于單獨(dú)的各項(xiàng)。第三步除了我們從S中去掉了雙取反號外，與第二步一樣。,This final form proves convenient for realization with NOR gates. Fig.4.13 shows the realization. Note that we made a NO

27、T out of NOR similar to the way we realized a NOT with a NAND earlier. De Morgans theorem thus leads to a simpler realization. 這一最后的表達(dá)式能很方便地用或非門實(shí)現(xiàn)。注意我們用或非門得到非門的方法與早前用與非門得到非門的方法類似，從而德摩根定理導(dǎo)致了更簡單的電路實(shí)現(xiàn)。 In this section we show how memory is developed in logic circuits and how memory elements increase gr

28、eatly the possible applications of logic circuits. 在這一節(jié)中，我們將展示在邏輯電路中存儲器如何被逐步引入，以及存儲單元如何大大地增加了邏輯電路的應(yīng)用可能性。,Another problem with the basic R-S flip-flop is the forbidden state at the input. This can be eliminated by ANDing the inputs with the output of the flip-flop, thus blocking one of the inputs, as

29、 shown in Fig.4.23. 基本RS觸發(fā)器的另一個(gè)問題是輸入的禁止?fàn)顟B(tài)，這可以通將觸發(fā)器的輸出和輸入進(jìn)行與運(yùn)算，封鎖其中一個(gè)輸入的方法來消除，如圖4.23。,The symbol for an edge triggered（邊緣觸發(fā)） flip-flop is shown in Fig.4.22 for both leading and lagging edge triggering. The distinguishing mark for edge triggering is triangle at the clock input. Triggering at the edge

30、of the waveforms limits the time during which the inputs are active and thus server to eliminate glitches. By using circuits that trigger at either the leading or trailing edges（上升或下降沿）, the designer can pass signals in a circuit at two times in each clock cycle. 邊緣觸發(fā)觸發(fā)器，包括上升沿觸發(fā)和下降沿觸發(fā)的符號見圖4.22，邊緣觸發(fā)的

31、區(qū)別標(biāo)志是時(shí)鐘輸入端的三角形。在觸發(fā)的時(shí)間里輸入打開，在波形的邊緣觸發(fā)限制了時(shí)間，因此減少了干擾。通過在上升沿和下降沿使用電路，設(shè)計(jì)者可以在每一個(gè)時(shí)鐘周期內(nèi)兩次通過信號。,The J-K flip-flop thus gives us, in addition to a latched memory of the input, the capacity to “toggle” (A lever-actuated switch, like the ordinary light on-off switch, is called a toggle switch. Thus to toggle means to switch from one state to another) when both inputs are 1. This toggle feature reveals why we must