VHDL語(yǔ)言設(shè)計(jì)4選1多路選擇器

1、4選1多路選擇器的VHDL描述要求：THEN語(yǔ)句和CASE語(yǔ)句實(shí)現(xiàn)4選1多路選擇器，其中選擇控制信號(hào)s1和s0的數(shù)據(jù)類型為STD_LOGIC_VECTOR;當(dāng)s1=0,s0=0；s1=0,s0=1；s1=1,s0=0和s1=1,s0=1時(shí),分別執(zhí)行y<=a、y<=b、y<=c、y<=d。一、 解法1：用IF_THEN語(yǔ)句實(shí)現(xiàn)4選1多路選擇器（1）程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY mux41 ISPORT (a,b,c,d: IN STD_LOGIC;s0: IN STD_LOGIC;s1: IN STD

2、_LOGIC;y: OUT STD_LOGIC);END ENTITY mux41;ARCHITECTURE if_mux41 OF mux41 ISSIGNAL s0s1 : STD_LOGIC_VECTOR(1 DOWNTO 0);-定義標(biāo)準(zhǔn)邏輯位矢量數(shù)據(jù) BEGINs0s1<=s1&s0; -s1相并s0,即s1與s0并置操作PROCESS(s0s1,a,b,c,d)BEGINIF s0s1 = "00" THEN y <= a;ELSIF s0s1 = "01" THEN y <= b;ELSIF s0s1 = &quo

3、t;10" THEN y <= c;ELSE y <= d;END IF;END PROCESS;END ARCHITECTURE if_mux41;(2)編譯的結(jié)果如下：編譯報(bào)告：二、 解法2：用CASE語(yǔ)句實(shí)現(xiàn)4選1多路選擇器（1）程序:LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY mux41 ISPORT (a,b,c,d: IN STD_LOGIC;s0: IN STD_LOGIC;s1: IN STD_LOGIC;y: OUT STD_LOGIC);END ENTITY mux41;ARCHITECTURE ca

4、se_mux41 OF mux41 ISSIGNAL s0s1 : STD_LOGIC_VECTOR(1 DOWNTO 0);-定義標(biāo)準(zhǔn)邏輯位矢量數(shù)據(jù)類型 BEGINs0s1<=s1&s0; -s1相并s0,即s1與s0并置操作PROCESS(s0s1,a,b,c,d)BEGINCASE s0s1 IS -類似于真值表的case語(yǔ)句WHEN "00" => y <= a;WHEN "01" => y <= b;WHEN "10" => y <= c;WHEN "11" => y <= d;WHEN OTH