ST7567lcd控制器

1、Ver1.0a #/452008/02/20Ver1.0a /452008/02/20SitronixST756765x732DofMatrixLCDController/Driver1lNTRODUCTIONST7567isasingle-chipdotmatrixLCDdriverwhichincorporatesLCDcontrollerandcommon/segmentdriversST7567canbeconnecteddirectlytoamicroprocessorwith8-bitparallelinterfaceor4-lineserialinterface(SPI-4).D

2、isplaydatasentfromMPUisstoredintheinternalDisplayDataRAM(DDRAM)of65x132bits.ThedisplaydatabitswhicharestoredinDDRAMaredirectlyrelatedtothepixelsofLCDpanel.ST7567contains132segment-outputs,64common-outputsand1icon-common-output.Withbuilt-inoscillationcircuitandlowpowerconsumptionpowercircuit,ST7567ge

3、neratesLCDdrivingsignalwithoutexternalclockorpower,sothatitispossibletomakeadisplaysystemwiththefewestcomponentsandminimalpowerconsumption.Ver1.0a #/452008/02/20Ver1.0a #/452008/02/20Ver1.0a #/452008/02/20Ver1.0a #/452008/02/202.FEATURESSingle-chipLCDController&DriverOn-chipDisplayDataRAM(DDRAM)Capa

4、city:65x132=8580bitsDirectlydisplayRAMpatternfromDDRAMSelectableDisplayDuty(bySEL2&SEL1)1/65duty:65commonx132segment1/55duty:55commonx132segment1/49duty:49commonx132segment1/33duty:33commonx132segmentMicroprocessorInterfaceBidirectional8-bitparallelinterfacesupports:8080-seriesand6800-seriesMPUSeria

5、linterface(SPI-4)isalsosupported(writeonly)AbundantFunctionsDisplayON/OFF,Normal/ReverseDisplayMode,SetDisplayStartLine,ReadICStatus,SetallDisplayPointsON?SetLCDBias,ElectronicVolumeControl,Read-modify-Write,SelectSegmentDriverDirection,PowerSavingMode?SelectCommonDriverDirection,SelectVoltageRegula

6、torResistorRatio(forVO).ExternalHardwareResetPin(RSTB)Built-inOscillationCircuitNoexternalcomponentrequiredLowPowerConsumptionAnalogCircuitVoltageBooster(4X,5X&6X)High-accuracyVoltageRegulatorforLCDVop:(ThermalGradient:-0.05%/C)VoltageFollowerforLCDBiasVoltageWideOperationVoltageRangeVDD1-VSS1=1.8V-

7、3.3VVDD2-VSS2=2.4V-3.3VRecommendVopRange:4V9.5VTemperatureRange:-30-85CPackageType:COGVer1.0a #/452008/02/20Ver1.0a #/452008/02/20Ver1.0a #/452008/02/20Ver1.0a #/452008/02/20ST75676800,8080,4-LineVer1.0a #/452008/02/20Ver1.0a #/452008/02/20SitronixlechnologyCorp,reservestherighttochangethecontentsin

8、thisdocumentwithoutpriornotice.ST7567ST7567Ver1.0a /452008/02/20Ver1.0a #/452008/02/20ST7567ST7567Ver1.0a #/452008/02/20Ver1.0a /452008/02/203-1.ST7567COGOUTLINEChipSize:4840X660(+/-15)BumpHeight:15D9I1CB?許%105X10目冋回|warxH石340：二ri20(241740140申2/1112117CO76112一二&h一5:.k:4:pF一T54山I乂I157.5of嚇4IFig1.Chip

9、OutlineBumpSizePADNo.Size1-12,76-26116X138.51355,65、7550X45566445X45BumpPitch(minimum)PADNo.Size1-12,7687,88-108,109-240,241-261RefertoFig11355,65、751556641055-56?64-6512.5*RefertosectionPADCENTERCOORDINATES0forITOlayout.PassNo:ST7567-G4ChipThickness:300Unit:umST7567ST7567Ver1.Oa /452008/02/20Ver1.O

10、a #/452008/02/20ST7567ST7567Ver1.Oa #/452008/02/20Ver1.Oa /452008/02/203-2.PADCENTERCOORDINATES65DutyPADNO.PINNameXY1COM53-2363.00-74.252COM54-2336.00-227.753COM55-2309.00-74.254COM56-2282.00-227.755COM57-2255.00-74.256COM58-2228.00-227.757COM59-2201.00-74.258COM60-2174.00-227.759COM61-2147.00-74.25

11、10COM62-2120.00-227.7511COM63-2093.00-74.2512COMS1-2066.00-227.7513CL-1970.00-274.5014CSB-1905.00-274.5015RSTB-1840.00-274.5016AO-1775.00-274.5017RWR-1710.00-274.5018ERD-1645.00-274.5019VDDH-1580.00-274.5020DO-1515.00-274.5021D1-1450.00-274.5022D2-1385.00-274.5023D3-1320.00-274.5024D4-1255.00-274.50

12、25D5-1190.00-274.5026D6-1125.00-274.5027D7-1060.00-274.5028VDD1-995.00-274.5029VDD1-930.00-274.5030VDD2-865.00-274.5031VDD2-800.00-274.5032VDD2-735.00-274.5033VDD3-670.00-274.5034VSS1-605.00-274.5035VSS1-540.00-274.5036VSS3-475.00-274.5037VSS2-410.00-274.5038VSS2-345.00-274.5039VSS2-280.00-274.5040V

13、Oin-215.00-274.50ST7567ST7567Ver1.Oa /452008/02/20Ver1.Oa /452008/02/20PADNO.PINNameXY41VOin-150.00-274.5042VOs-85.00-274.5043VOout-20.00-274.5044VOout45.00-274.5045XVOout110.00-274.5046XVOout175.00-274.5047XVOs240.00-274.5048XVOin305.00-274.5049XVOin370.00-274.5050VMO435.00-274.5051VMO500.00-274.50

14、52VGin565.00-274.5053VGin630.00-274.5054VGs695.00-274.5055VGout760.00-274.5056T6820.00-274.5057T7875.00-274.5058T8930.00-274.5059TFCOM985.00-274.5060T11040.00-274.5061T21095.00-274.5062T31150.00-274.5063T41205.00-274.5064T51260.00-274.5065Vref1320.00-274.5066VSSL1385.00-274.5067VDDH1450.00-274.5068C

15、861515.00-274.5069PSB1580.00-274.5070SEL11645.00-274.5071VSSL1710.00-274.5072SEL21775.00-274.5073VDD11840.00-274.5074VDD21905.00-274.5075VDD31970.00-274.5076COM312066.00-74.2577COM302093.00-227.7578COM292120.00-74.2579COM282147.00-227.7580COM272174.00-74.25PADNO.PINNameXY81COM262201.00-227.7582COM25

16、2228.00-74.2583COM242255.00-227.7584COM232282.00-74.2585COM222309.00-227.7586COM212336.00-74.2587COM202363.00-227.7588COM192363.0074.2589COM182336.00227.7590COM172309.0074.2591COM162282.00227.7592COM152255.0074.2593COM142228.00227.7594COM132201.0074.2595COM122174.00227.7596COM112147.0074.2597COM1021

17、20.00227.7598COM92093.0074.2599COM82066.00227.75100COM72039.0074.25101COM62012.00227.75102COM51985.0074.25103COM41958.00227.75104COM31931.0074.25105COM21904.00227.75106COM11877.0074.25107COM01850.00227.75108COMS21823.0074.25109SEG01768.50227.75110SEG11741.5074.25111SEG21714.50227.75112SEG31687.5074.

18、25113SEG41660.50227.75114SEG51633.5074.25115SEG61606.50227.75116SEG71579.5074.25117SEG81552.50227.75118SEG91525.5074.25119SEG101498.50227.75120SEG111471.5074.25PADNO.PINNameXY121SEG121444.50227.75122SEG131417.5074.25123SEG141390.50227.75124SEG151363.5074.25125SEG161336.50227.75126SEG171309.5074.2512

19、7SEG181282.50227.75128SEG191255.5074.25129SEG201228.50227.75130SEG211201.5074.25131SEG221174.50227.75132SEG231147.5074.25133SEG241120.50227.75134SEG251093.5074.25135SEG261066.50227.75136SEG271039.5074.25137SEG281012.50227.75138SEG29985.5074.25139SEG30958.50227.75140SEG31931.5074.25141SEG32904.50227.

20、75142SEG33877.5074.25143SEG34850.50227.75144SEG35823.5074.25145SEG36796.50227.75146SEG37769.5074.25147SEG38742.50227.75148SEG39715.5074.25149SEG40688.50227.75150SEG41661.5074.25151SEG42634.50227.75152SEG43607.5074.25153SEG44580.50227.75154SEG45553.5074.25155SEG46526.50227.75156SEG47499.5074.25157SEG

21、48472.50227.75158SEG49445.5074.25159SEG50418.50227.75160SEG51391.5074.25PADNO.PINNameXY161SEG52364.50227.75162SEG53337.5074.25163SEG54310.50227.75164SEG55283.5074.25165SEG56256.50227.75166SEG57229.5074.25167SEG58202.50227.75168SEG59175.5074.25169SEG60148.50227.75170SEG61121.5074.25171SEG6294.50227.7

22、5172SEG6367.5074.25173SEG6440.50227.75174SEG6513.5074.25175SEG66-13.50227.75176SEG67-40.5074.25177SEG68-67.50227.75178SEG69-94.5074.25179SEG70-121.50227.75180SEG71-148.5074.25181SEG72-175.50227.75182SEG73-202.5074.25183SEG74-229.50227.75184SEG75-256.5074.25185SEG76-283.50227.75186SEG77-310.5074.2518

23、7SEG78-337.50227.75188SEG79-364.5074.25189SEG80-391.50227.75190SEG81-418.5074.25191SEG82-445.50227.75192SEG83-472.5074.25193SEG84-499.50227.75194SEG85-526.5074.25195SEG86-553.50227.75196SEG87-580.5074.25197SEG88-607.50227.75198SEG89-634.5074.25199SEG90-661.50227.75200SEG91-688.5074.25ST7567ST7567Ver

24、1.0a #/452008/02/20Ver1.0a #/452008/02/20PADNO.PINNameXY201SEG92-715.50227.75202SEG93-742.5074.25203SEG94-769.50227.75204SEG95-796.5074.25205SEG96-823.50227.75206SEG97-850.5074.25207SEG98-877.50227.75208SEG99-904.5074.25209SEG100-931.50227.75210SEG101-958.5074.25211SEG102-985.50227.75212SEG103-1012.

25、5074.25213SEG104-1039.50227.75214SEG105-1066.5074.25215SEG106-1093.50227.75216SEG107-1120.5074.25217SEG108-1147.50227.75218SEG109-1174.5074.25219SEG110-1201.50227.75220SEG111-1228.5074.25221SEG112-1255.50227.75222SEG113-1282.5074.25223SEG114-1309.50227.75224SEG115-1336.5074.25225SEG116-1363.50227.75

26、226SEG117-1390.5074.25227SEG118-1417.50227.75228SEG119-1444.5074.25229SEG120-1471.50227.75230SEG121-1498.5074.25231SEG122-1525.50227.75232SEG123-1552.5074.25233SEG124-1579.50227.75234SEG125-1606.5074.25235SEG126-1633.50227.75236SEG127-1660.5074.25237SEG128-1687.50227.75238SEG129-1714.5074.25239SEG13

27、0-1741.50227.75240SEG1311768.5074.25PADNO.PINNameXY241COM32-1823.00227.75242COM33-1850.0074.25243COM34-1877.00227.75244COM35-1904.0074.25245COM36-1931.00227.75246COM37-1958.0074.25247COM38-1985.00227.75248COM39-2012.0074.25249COM40-2039.00227.75250COM41-2066.0074.25251COM42-2093.00227.75252COM43-212

28、0.0074.25253COM44-2147.00227.75254COM45-2174.0074.25255COM46-2201.00227.75256COM47-2228.0074.25257COM48-2255.00227.75258COM49-2282.0074.25259COM50-2309.00227.75260COM51-2336.0074.25261COM52-2363.00227.75Note:Unit:umThisisthedefaultPADCenterCoordinateTablewith1/65Duty.Otherdutyoutputmappingcanbefound

29、inSection6.FUNCTIONDESCRIPTIONandFig9.Tblerance:+/0.05um.ST7567ST7567Ver1.Oa #/452008/02/20Ver1.0a /452008/02/20ST7567ST7567Ver1.Oa /452008/02/20Ver1.0a #/452008/02/204.BLOCKDIAGRAMSEG0.SEG131COMO.COM63COMSVMOVGinVVGoutVGs-XVOinXVOoutXVOs-VOinVOoutVVOs-VDD2VSS2VDD3VSS3PowerSystemVoltageFollowerXVOGe

30、neratorVOGeneratorVGVMxvoVDD1VSS2SEGMENTCOMMONDriversDriversIDisplayDataLatchsCOMMONOutputControllerDisplayDataRAM(DDRAM)132X65DataRegisterAddressCounter工TimingGeneratorOscillatorD6(SCL)D5D4D3D2tsDoERDRWRI0CSBC86PSBssmmlri2Fig3.BlockDiagramST7567ST7567Ver1.Oa #/452008/02/20Ver1.0a /452008/02/205.PIN

31、DESCRIPTIONLCDDriverOutputPinsPinNameTypeDescriptionNo.ofPinsSEGOtoSEG1310LCDsegmentdriveroutputsThedisplaydataandtheframecontroltheoutputvoltage.132DisplaydataFrameSegmentDriverOutputVoltageNormalDisplayInverseDisplayH+VGVSSH-VSSVGL+VSSVGL-VGVSSDisplayOFF,PowerSaveVSSVSSCOMOtoCOM630LCDcommondrivero

32、utputsTheinternalseanningsignalandtheframecontroltheoutputvoltage.64ScansignalFrameCommonDriverOutputVoltageNormalDisplayInverseDisplayH+xvoH-VOL+VML-VMDisplayOFF,PowerSaveVSSCOMS1,COMS2(COMS)0LCDcommondriveroutputsforicons.Theoutputsignalsofthesetwopinsarethesame.Wheniconfeatureisnotused,thesepinss

33、houldbeleftopen.2MicroprocessorInterfacePinsPinNameTypeRSTBCSBDescriptionNo.ofPinsHardwareresetinputpin.WhenRSTBis“L：intemalinitializationisexecutedandtheinternalregisterswillbeinitialized.Chipselectinputpin.InterfaceaccessisenabledwhenCSBisULWhenCSBisnon-active(CSB=MHW),D7:0pinsarehighimpedance.Itd

34、etermineswhethertheaccessisrelatedtodataorcommand.ST7567ST7567Ver1.Oa #/452008/02/20Ver1.0a #/452008/02/20AORWRC86MPUTypeRWRDescriptionH6800seriesR/WRead/Writecontrolinputpin.R/W-H”：read.R/W-V:write.L8080series/WRWriteenableinputpin.SignalsonD7:0willbelatchedattherisingedgeof/WRsignal.Read/Writeexec

35、utioncontrolpin.WhenPSBis“H；RWRisnotusedinserialinterfaceandshouldfixto“ITbyVDD1orVDDH.AO=UH,?:IndicatesthatsignalsonD7:0aredisplaydata.A0=uLn:IndicatesthatsignalsonD7:0arecommand.ST7567ST7567Ver1.Oa /452008/02/20Ver1.0a /452008/02/20PinNameERDD7:0DescriptionC86MPUTypeERDDescriptionH6800seriesERead/

36、Writecontrolinputpin.R.zW=nHu:WhenEis“H：D7:0areinoutputmode.R/W二L“：SignalsonD7:0arelatchedatthefallingedgeofEsignal.L8080series/RDReadenableinputpin.When/RDis“L：D7:0areinoutputmode.Read/Writeexecutioncontrolpin.WhenPSBis“H；ERDisnotusedinserialinterfaceandshouldfixtouHnbyVDD1orVDDH.Whenusing8-bitpara

37、llelinterface:(6800or8080mode)8-bitbi-directionaldatabus.Connecttothedatabusof8-bitmicroprocessor.WhenCSBisnon-active(CSB=HHM),D7:0pinsarehighimpedance.Whenusingserialinterface:4-LINED7=SDA:Serialdatainput.D6=SCL:Serialclockinput.D5:0arenotusedandshouldconnecttoITbyVDD1orVDDH.WhenCSBisnon-active(CSB

38、=HHM),D7:0pinsarehighimpedance.No.ofPinsNote:1AfterVDD1isturnedON,anyMPUinterfacepinscannotbeleftfloating.ConfigurationPinsPinNameTypeDescriptionNo.ofPinsVDDH1Logic“1”levelforoptionpinswhichshouldconnecttoIT.2VSSL1Logical*0levelforoptionpinswhichshouldconnectto“L”.2PSB1PSBselectstheinterfacetype:Ser

39、ialorParallel.1C861C86selectsthemicroprocessortypeinparallelinterfacemode.1PSBC86SelectedInterfaceParallel6800SeriesMPUInterface“L”Parallel8080SeriesMPUInterface“X”Serial4-LineSPIInterfacePleaserefertoAPPLICATIONNOTESandMicroprocessor(Section6)fordetailedconnectionoftheselectedinterface.InterfaceSEL

40、2:11ThesepinsselectthedisplaydutyandbiasofST75672SEL2SEL1DutyBias“L”純L”1/651/9or1/71/491/8or1/6“L”1/331/6or1/51/551/8or1/6PowerSystemPinsPinNameTypeDescriptionNo.ofPinsVDD1PowerDigitalpower.IfVDD1=VDD2?connecttoVDD2externally.3VDD2PowerAnalogpower.IfVDD1=VDD2?connecttoVDD1externally.4VDD3PowerPowerf

41、orrefereneevoltagecircuit.2VSS1PowerDigitalground.ConnecttoVSS2externally.2VSS2PowerAnalogground.ConnecttoVSS1externally.3VSS3PowerGroundforreferencevoltagecircuit1VOoutVOinVOsPowerV0istheLCDdrivingvoltageforcommoncircuitsatnegativeframe.VOoutistheoutputofV0regulator.VOsisthefeedbackofV0regulator.VO

42、inistheV0inputofcommoncircuitsBesurethat:V0VGVMVSSXV0(underoperation)VOout,VOin&VOsshouldbeseparatedinITOlayoutVOout,VOin&VOsshouldbeconnectedtogetherinFPClayout.221XVOoutXVOinXVOsPowerXV0istheLCDdrivingvoltageforcommoncircuitsatpositiveframe.XVOoutistheoutputofXV0regulator.XVOsisthefeedbackofXV0reg

43、ulator.XVOinistheV0inputofcommoncircuitsXVOout,XVOin&XVOsshouldbeseparatedinITOlayout.XVOout,XVOin&XVOsshouldbeconnectedtogetherinFPClayout.221VGoutVGinVGsPowerVGistheLCDdrivingvoltageforsegmentcircuitsVGoutistheoutputofVGregulator.VGsisthefeedbackofVGregulator.VGinistheVGinputofsegmentcircuitsVGout

44、,VGin&VGsshouldbeseparatedinITOlayout.VGout,VGin&VGsshouldbeconnectedtogetherinFPClayout.1.24VGVDD2.121VMOPowerVMistheLCDdrivingvoltageforcommoncircuits0.62VVMVDD2.2TestPinsPinNameTypeDescriptionNo.ofPinsVrefTTestpinforpowersystem.Thispinmustbeleftopen(withoutanykindsofconnection).1T1T8TDoNOTuse.Res

45、ervedfortesting.Mustbefloating.8TFCOMTDoNOTuse.Reservedfortesting.Mustbefloating.1CLTDoNOTuse.Reservedfortesting.Mustbefloating.1ST7567ST7567Ver1.Oa /452008/02/20Ver1.Oa #/452008/02/20RecommendITOResistancePinNameITOResistanceVMO,Vref,T1:8?TFCOM,CLFloatingVDD1,VDD2,VDD3,VSS1?VSS2,VSS3100QV0(V0in,VOo

46、ut,VOs),VG(VGin,VGout,VGs),XV0(XV0in,XVOout,XVOs)300QAO,RWR;ERD,CSB,D7:01KQPSB,C86,SEL2:15KQRSTBr10KQNote:1.TopreventtheESDpulseresettingtheinternalregister,applicationsshouldincreasetheresistaneeofRSTBsignal(addaseriesresistororincreaseITOresistanee).Thevalueisdifferentfrommodules.Theoptionsettingt

47、obeuHnshouldconnecttoVDD1orVDDH.Theoptionsettingtobe“LshouldconnecttoVSS1orVSSL.ST7567ST7567Ver1.Oa /452008/02/20Ver1.Oa /452008/02/206-FUNCTIONDESCRIPTIONMicroprocessorInterfaceChipSelectInputCSBpinisusedforchipselectionWhenCSBis”L”，themicroprocessorinterfaceisenabledandST7567caninterfacewithanMPU.

48、WhenCSBis“H：theinputsofAO,ERDandRWRwithanycombinationwillbeignoredandD7:0arehighimpedanee.In4-Lineserialinterface,theinternalshiftregisterandserialcounterareresetwhenCSBis“H”InterfaceSelectionTheinterfaceselectioniscontrolledbyC86andPSBpins.TheselectionforparallelorserialinterfaceisshowninTable1Tabl

49、e1.Parallel/SerialInterfaceModePSBC86CSBAOERDRWRD7:0MPUInterface“FTCSBAOER/WD7:06800-seriesparallelinterface/RD/WR8080-seriesparallelinterlaceXRefertoserialinterface4-LineSPIinterfaceTheun-usedpinsaremarkedasandshouldbefixedtoMHWbyVDD1orVDDH.ParallelInterfaceWhenPSB=H：the8-bitbi-directionalparalleli

50、nterfaceisenabledandthetypeofMPUisselectedbyuC86npinasshowninTable2.ThedatatransfertypeisdeterminedbysignalsonAO,ERDandRWRasshowninTable3.Table2.MicroprocessorSelectionforParallelInterlacePSBC86CSBAOERDRWRD7:0MPUInterface“H”，CSBAOER/WD7:06800-seriesparallelinterface/RD/WR8080-seriesparallelinterlace

51、Table3.ParallelDataTransferTypeCommonPins6800-Series8080-SeriesDescriptionCSBAOE(ERD)R/W(RWR)/RD(ERD)/WR(RWR)“L”甘曽MH64L”計Displaydatareadout“L”DisplaydatawriteL”MH64L”InternalstatusreadrrWritestointernalregister(instruction)SettingSerialInterfaceSerialModePSBC86CSBAOERDRWRD7:04-LineSPIinterfaceXCSBAO

52、SDA,SCLK,Theun-usedpinsaremarkedasandshouldbefixedtoMHWbyVDD1orVDDH.C86ismarkedasXandcanbefixedtoMHWorNote:1TheoptionsettingtobeUHMshouldconnecttoVDD1orVDDH.2.Theoptionsettingtobe“L”shouldconnecttoVSS1orVSSL.4-lineSPIinterface(PSB=T；C86Kor皆)WhenST7567isactive(CSB-L),serialdata(SDA)andserialclock(SCL

53、K)inputsareenabled.WhenST7567isnotactive(CSB-H”)，theinternal8-bitshiftregisterand3-bitcounterarereset.SerialdataonSDAislatchedattherisingedgeofserialclockonSCLK.Afterthe8:hserialclock,theserialdatawillbeprocessedtobe8-bitparalleldataTheaddressselectionpin(AO),whichislatchedatthe8:hclock,indicatesthe

54、8-bitparalleldataisdisplaydataorinstruction.The8-bitparalleldatawillbedisplaydatawhenAOisITandwillbeinstructionwhenAOisULThereadfeatureisnotavailableinthismode.TheDDRAMcolumnaddresspointerwillbeincreasedbyoneautomaticallyaftereachbyteofDDRAMaccess.PleasenotethattheSCLKsignalqualityisveryimportantand

55、externalnoisemaybecausesunexpecteddata/instructionlatch.csbrSDAXD7XD6XD5XD4XD3XD2XD1XDO丫丫D7*SCLK-mjrmjrmjrumm2nd滬爐5916th滬眇AO)Fig4.4-LineSPIAccessNote:SomeMPUwillsettheinterfacetobeHi-Z(highimpedanee)modewhenpowersavingmodeorafterhardwarereset.ThisisnotallowedwhentheVDDlofST7567isturnedON.Becausethef

56、loatinginput(especiallyforthosecontrolpinssuchasCSB,RSTB,RWRorERD.)maybecauseabnormallatchandcauseabnormaldisplay.ST7567ST7567Ver1.Oa #/452008/02/20Ver1.Oa /452008/02/20DataTransferST7567usesbuslatchandinternaldatabusforinterfacedatatransfer.WhenwritingdatafromMPUtotheDDRAM,dataisautomaticallytransf

57、erredfromthebuslatchtotheDDRAMasshowninFig5.Whenreadingdatafromtheon-chipDDRAMtoMPU,thefirstreadcyclereadsthecontentinbuslatch(dummyread)andthedatathatMPUshouldreadwillbeoutputatthenextreadcycleasshowninFig6.Thatmeans:aftersettingthetargetaddress,adummyreadcycleisrequiredbeforethefollowingread-opera

58、tion.Therefore,thedataofthespecifiedaddresscannotbereadatthefirstreadofdisplaydatarightaftersettingtheaddress,butcanbereadatthesecondreadofdisplaydataWriting二了WRQ.JDATAG-EPBuchatLN+23+NXT-eujcwrsigitenaST7567ST7567Ver1.Oa #/452008/02/20Ver1.Oa #/452008/02/20ST7567ST7567Ver1.Oa #/452008/02/20Ver1.Oa

59、#/452008/02/20Fig5.DataTransfer:WriteAddressPreset/WRReadingReadSignalColumnAddressBusLatchST7567ST7567Ver1.Oa #/452008/02/20Ver1.Oa #/452008/02/20ST7567ST7567Ver1.Oa #/452008/02/20Ver1.Oa #/452008/02/20Fig6.DataTransfer:ReadST7567ST7567Ver1.Oa /452008/02/20Ver1.Oa /452008/02/20DisplayDataRAM(DDRAM)

60、ST7567isbuilt-inaRAMwith65X132bitcapacitywhichstoresthedisplaydata.ThedisplaydataRAM(DDRAM)storethedotdataoftheLCD.Itisanaddressablearraywith132columnsby65rows(8with8-bitand1withbit).TheX-addressisdirectlyrelatedtothecolumnoutputnumber.Eachpixelcanbeselectedwhenthepageandcolumnaddressesarespecified(