CMOS集成電路設(shè)計(jì)1

StateoftheArtintheAnalogCMOSCircuitDesignYann-YongcaiHUProfessorInstitut

PluridisciplinaireHubertCurien,Strasbourg,FranceUniversityofStrasbourg,FranceWhyAnalogProcessing?The“real”

or“physical”worldisanalog.Analogisaninterfacetechnology.Inmanyapplications,it’sinthecriticalpathExample:RFreceiverPre-processingFiltering,amplification,frequencyTranslationDSPDemodulation,decodingPostprocessingReconstructionfilter,amplificationAnalogPreprocessingA/DConversionDSPD/AConversionAnalogPostprocessingAnalogInputAnalogOutputJune20-July20,20052DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUUniqueChallengesofAnalogueDesignTelecommunicationsandmultimedia:RF,MicrowavecommunicationsPortabletelephonyPC,InternetSystemonchip(SOC):MEMSImagersScientificInstrumentations:SpaceApplicationsBiomedical,HighEnergy,andAstrophysicalapplicationsMEMSAcceleromoterMEMSsensorC/VconversionAmplificationA/DconversionDSPAccelerationDigitaloutputJune20-July20,20053DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUBipolarandCMOStechnologiesBipolarprocess:AninherentlowinputreferrednoiseLowinputoffsetvoltageHighvoltagegainHighoutputdriveandhighfrequencycapabilityCMOSprocess:LowpowerconsumptionHighpackingdensityHighnoiseimmunityCompatibilitywithCMOSdigitalsystemsJune20-July20,20054DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUAnalogueDesign

ConflictsandCompromisesCertaindesignconflicts:BandwidthandpowerconsumptionIntermodulationandnoiseContributionsofvoltageandcurrentAreaandcostCompromises:Eachdesigninvolvescomplex,multi-variableinteractions,andcompromisesareinevitable.June20-July20,20055DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HURobustness,OptimisationandTrade-OffsChoiceofarchitecture(topology):

toachievethemostsatisfactoryoverallperformancesChoiceofTechnology:Bipolarprocess:SiGeHBTCMOSprocess:deepsub-micrometer90nmindeed65nmBiCMOSJune20-July20,20056DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUTrade-OffsinCMOSCircuitsMoore’sLaw:Itwasnotedin1965byGordonMoorethatthenumberoftransistorsonachipdoublesabouteveryyear.Inanupdatearticlein1975,Mooreadjustedtheratetoeverytwoyearstoaccountforthegrowingcomplexityofchips.Rapidlyimprovingcircuitperformances:E.g.microprocessors:Clockratedoublesin2.3yearsPerformancedoublesevery1.5yearsEnablesnewfunctions,e.g.Digitalvideo,WirelessJune20-July20,20057DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUEvolutionofDesignGoalsinCMOSICsTime1970s1980s1990s2000sareaspeed/areapowerspeedspeed/powerultra-lowpowerspeed/power/noiseJune20-July20,20058DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUMainDesignCriteriaandAnalogCircuitChallengesPowerSpeed-frequencyNoisetoleranceArea-costTestabilityReliabilityPackagingJune20-July20,20059DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUAnalogCircuitNonlinearityVinDout,rawDout,rawDoutNonlinearAnalog-to-DigitalConverterDigitalSignalProcessor(DSP)DoutDout,rawVinJune20-July20,200510DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUSubmeterCMOSTransistorPerformanceSupplyVoltage:Deviceperformanceimproves:Currentefficiency(gm/ID)Speed(fT)GainNoise

ShortgateeffectsJune20-July20,200511DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUCMOSTransistorsCMOScrosssection:P-substrate(～10+10)N-well(～10+10)P+diffusion(～10+18)N+diffusion(～10+18)Dimensions:700mm1.2mmJune20-July20,200512DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUCMOSProcessDeviceswhichcanbeused:Active:NMOS,PMOSLateralPNPDiodesPassive:resistorscapacitorsinductorsJune20-July20,200513DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUIntegratedResistors(1)StandardCMOSprocess:Sheetresistanceof availablelayers:Example:100kWpolyresistor→1mmwideby20000mmlongSpecialprocessoptions:Non-silicidedlayershavelargersheetresistance.Resistornonidealities:Temperaturecoefficient:R=f(T)Voltagecoefficient:R=f(V)LayerSheetResistanceAluminium60mW/Polysilicon5W/N+/P+difusion5W/N-well1kW/LayerR/[W/)TCppm/°C25°CVC[ppm/V]BC[ppm/V]N+poly100-8005050P+poly1802005050N+diffu501500500-500P+diffu1001600500-500N-well1000-15002000030000June20-July20,200514DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUIntegratedResistors(2)Temperaturecoefficient:CombinationofN+andP+polyresistorinseriesVoltagecoefficient:Appliedvoltagemodulatesdepletionwidth(cross-sectionofconductivechannel)June20-July20,200515DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUResistorMatchingTypesofmismatch:SystematicRun-to-runvariationsRandomvariationsbetweendevicesAbsoluteresistorvalue:Example:filtertimeconstant,biascurrent(bandgapreference)15percentvariations(ormore)Resistorratios:Example:opampfeedbacknetworkInsensitivetoabsoluteresistorvalue0.1～1percentmatchingpossiblewithcarefullayoutJune20-July20,200516DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUResistorLayoutSerpentinelayoutforlargevalues:Betterlayout:June20-July20,200517DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUMOSFET’sasResistorsTrioderegion:Smallsignalresistance:Voltagecoefficient:for

for

June20-July20,200518DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUResistorSummaryCostly:Largearea(comparedtoFETs)Non-idealities:Largerun-torunvariationsTemperaturecoefficientVoltagecoefficientAvoidthemwhenyoucanEspeciallyincriticalareas:AmplifierfeedbacknetworksElectronicfiltersA/DconvertersJune20-July20,200519DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUIntegratedCapacitors(1)CapacitoroptionsLargevalue:BypasscapacitorsFrequencycompensationHighaccuracy,linearityFeedbackandsamplingnetworksfiltersTypeCapa.[aF/mm2]VC[ppm/V]TC[ppm/°C]Gate5300hugebigPoly-poly(option)10001025Metal-metal502030Metal-substrate30Metal-poly50Poly-substrate120Junctioncapacitors~1000bigbigJune20-July20,200520DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUIntegratedCapacitors(2)Poly-PolyCapacitor:GoodlinearityBottomparasiticsApplicationsFeedbacknetworksFilter(SCandcontinuoustime)ChargeredistributionDACs&ADCsCapacitorlayout:UnitelementsShieldsJune20-July20,200521DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUMOSCapacitorsHighcapacitanceininversion:LinearregionStronginversionHighnon-linearityTemperaturecoefficientUsefulonlyfornon-criticalapplications:MillercompensationcapacitorBypasscapacitor(supply,bias)June20-July20,200522DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUIntegratedInductorsSpiralinductorsonsilicon:D:diameterW:widthofaspiralS:spacingbetweenN:numberofturnsDesignparameters:Diameter,D,ismainlydecidedfromarearestriction.Othersparameters,W,SandNareoptimisedtogetDesiredinductanceLHighqualityfactorQHighself-resonantfrequencyfSR

SWDJune20-July20,200523DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUSpiralInductorsImplementations:SpiralinductorisimplementedusingmetallayersinSitechnology.Topmostmetalispreferredbecauseofitslowresistivity.Morethanonemetallayerscanbeconnectedtogethertoreduceresistanceorarea.Theaccurateanalysisofaspiralinductorrequirescomplexelectro-magneticsimulation.P-siliconSubstrateOxideVia2M2M3M2M3WWDnJune20-July20,200524DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUInductorModelling(1)Alumpedcircuitmodel:L:totalinductance:RS:Low-frequencyresistivelossofametalandskineffectCP:arisesfromtheoverlapofthecross-underwiththerestofthespiral.CPRSLCOX/2COX/2R1R1C1C1mo=410-7,sistheconductivityofthematerial.aisthedistancefromthecenteroftheInductortomiddleofthewindings.istheskindepth.Tisthethicknessofthemetal.June20-July20,200525DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUInductorModelling(2)

COX:capacitancebetweenthespiralandthesubstrateR1:substratelossC1:capacitanceofthesubstrateGsubandCsubareprocess-dependentparameters.Gsub:～10-7S/mm2Csub:10–3～10-2

fF/mm2June20-July20,200526DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUDesignGuidelines(1)Designspecifications:L:desiredinductancevalueQ:qualityfactorfsr:self-resonantfrequency.Inductoroperationfrequencyshouldbelowerthanfsr.Usingaanalysisandsimulationtool

“ASITIC”forspiralinductorsD:outerdiameter:D–QforsmallD,butfsrasparasiticcapacitancebetweensubstrateandthespiralincreases.AgooddesignusuallyhasD<200mmJune20-July20,200527DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUDesignGuidelines(2)W:metalwidth:Medalwidthshouldbeaswideaspossible.W–QasRs

However,W>Wopt,skineffectsappearinmetaltraces,increasingRs.Agooddesignuses10mm<W<20mmS:spacingbetweenturnsSpacingshouldbeassmallaspossible.S–Lasmutualinductancedecreases.UseminimummetalspacinginthetechnologyN:numberofturnsUseavaluethatgivesalayoutconvenienttoworkotherpartsofcircuitsJune20-July20,200528DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUMOSTransistorModelsVDSN+VGSSDGN+p-siliconsubstrateorbulkpolysiliconSiO2GDSVDSVGSIGIDISIG=0ID=ISEnhancementandDepletionMOSTransistorsJune20-July20,200529DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUEnhancementMOSCharacteristicsIDSVGSVTVDS=CVDSIDSVGS=C4VGS=C3VGS=C2VGS=C1VDsat=VGS-VTIIITransfercharacteristicsOutputcharacteristicsJune20-July20,200530DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUTransferCharacteristicsFortransfercharacteristics:VGS>VT,(conductionregion),thetransistorworksinstronginversion.VGS<VT,(cut-offregionIDS=0),thetransistorworksinweakinversion.Theamplifierscanberealisedwithverylowpowerconsumption.Foroutputcharacteristics:VDS<VDSat,linearregion,thetransistorcanbeconsideredasaresistor.VDS>VDSat,saturationregion,thetransistorcanbeconsideredasacurrentsource.June20-July20,200531DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HULarge-SignalModelGBSDThemoreimportantparameteristhecurrentID.GBSDIDIBDIBSCBSCGBCBDCGDCGSJune20-July20,200532DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUDiscussionsaboutCurrentIDCut-offregion: forVGS<VT

ID

0,infirstapproximationLinearregion: for

0<VDS<Vdsat

=VGS-VTSaturationregion:June20-July20,200533DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUSmall-signalModelCgdGDSSCgsgmvgsgdsvgsvdsTransconductance:Outputresistance:June20-July20,200534DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUDiscussionsabouttransconductanceandoutputresistance

Toincreasethetransconductance:W/LBiascurrentIDElectricalchargemobilitymOxidecapacitanceperunitareaCoxTomodifiertheoutputresistance:ThebiascurrentIDThegatelengthlJune20-July20,200535DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUFigureofMeritforaMOSProcessTransitfrequency:Transconductanceefficiency:Intrinsicgain:DSGJune20-July20,200536DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUTransistorSizingforanAnalogDesignerDependingonthedesiredperformances,sizing(W/L)willbeacompromisebetweendesiringparameterssuchas:Biascurrent:IDOverdrivevoltage:VGS–VTTransconductancegm

→thermalnoiseOutputconductance

→intrinsicgainGatearea→frequencyJune20-July20,200537DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUMOSParameters—TypicalDispersionParametersLot-to-LotTemperatureCoefficientDeviceMatching(areadependent)Vt±100mV-2mV/°C1～10mVmCOX±20%-0.33%/°C±0.2%Rpoly2

(50W/?)±20%200ppm/°C±0.1%Rnwell

(1kW/?)±40%-1500ppm/°C±1%Cpoly-poly2±15%25ppm/°C±0.1%June20-July20,200538DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUNoiseintransistorMOSThermalnoise(strongversion):Draincurrentg=2/3forsmallfields(longL)gcanbe2...3orevenlargeFlickernoise:Kf,NMOS=2.010-29AFKf,PMOS=3.510-30AFStronglyprocessdependent(alsomodel)Example:ID=10mA,L=1mm,Cox=5.3fF/mm2,fhi=1MHz,flo=1Hz,Flickernoise=722pA

rmswith(A2/Hz)(A2/Hz)June20-July20,200539DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUFlickerNoiseCornerFrequencyDefinition(MOS)Example:ID/gm=200mV,g=2/3L=0.35mm→192kHzforNMOS,34kHzforPMOSL=1.00mm→24kHzforNMOS,4kHzforPMOSJune20-July20,200540DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUSPICENoiseAnalysisJune20-July20,200541DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUNoiseinatransistorMOSGDSSCgdCgsgmvgsgdsvgsvdsBecausethethermalandflickernoiseisnotcorrelated,thecurrentNoiseattheoutputcanbecalculatedbyJune20-July20,200542DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUEquivalentInputNoiseTheequivalentinputnoiseinvoltagecanbewrittenby(V2/Hz)GDSSCgsgmvgsgdsvgsvdsCgd(A2/Hz)June20-July20,200543DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUEquivalentInputNoiseffa100–200HzThermalnoise1/fnoiseInordertoreducethermalnoise:Inordertoreduceflickernoise:-IncreasebiascurrentID——PDincreaseIncreaseW

——

area

increasedecreaseL

——limitedbytechnologyincreasethegateareaWL

——increaseofthecapacitanceCgs

——

reducethebandwidth-topreferuseofPMOSJune20-July20,200544DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUElementaryCMOSStagesActiveresistance:GDSNMOSGSDPMOSAsVGS=VDS

VDS>Vdsat=VGS-VTThetransistorworksautomaticallyinthesaturationregion.June20-July20,200545DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUIDSVGS=VDSVTVDS=CDSgmvgdsvdsSGvIInsaturationregion:Theactiveresistance:WecancontrolthecurrentIDandW/Ltoobtainanactiveresistor.June20-July20,200546DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUBiascircuits(currentmirrors):M1M2IRIOVOIR:thereferencecurrentgivenbytheexternalcircuitIO:theoutputcurrenttobiastheothercircuitsForM1,itworksinthesaturationregion.IfM2operatealsoinsaturationregion,wecanobtainAbiascurrentcanbeobtainedbychoiceofW2/L2andW1/L1.VOIOlargeLsmallLTheoutputresistance:June20-July20,200547DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUExampleforbiascurrentM1M2IRIOVOMVDDVSSForthetransistorM,ForthetransistorM1,Plus:ThecurrentIRcanbecalculatedJune20-July20,200548DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUElementaryAmplifier’sTopologiesCommonSourceStructure:vinVINvoutVOUTRLMVDDVSSMb1M1IRIOMb2VDDVSSM2voutVOUTvinVINThistopologyisusedfrequentlybyanamplificationstage.June20-July20,200549DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUSmallsignalcharacteristics:Cgd1Cgs1vgs1vinRggm1vgs1gds1voutgds2Outputresistance:Outputcapacitance:Inputcapacitance:Cgd1Cgs1vgsvinRggmvgsgds1voutgds2Cgd1(1-AVO)MillerEffectJune20-July20,200550DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUAvfAVOP1/2pP2/2p-20dB/dec-40dB/decThebandwidthislimitedbythefirstpole.Inordertoincreasethegain,wecanreducethebiascurrentIO.andCommonDrainStructure(SourceFollower):Mb1M2IRIOMb2VDDVSSM1voutVOUTvinVINvinVINvoutVOUTRLM1VDDVSSIOJune20-July20,200551DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUCgd1Rgvingm1vgs1gds1voutgds2DGSCgs1vgs1Thegain:withP>>P1,thebandwidthismorelargethanthecommonsourcestructure.-20dB/decfAvAVOP/2pOutputresistance:Outputcapacitance:Inputcapacitance:GainequaltounitLargebandwidthHighinputimpedanceLowoutputimpedanceThesourcefollowercanbeusedasanoutputstageorisolationstage.June20-July20,200552DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUCommonGateStructure:VOUTVINvinvoutRLMVDDVSSIOvbVINM2IOVb1M1voutVbVb2vinMVOUTVDDVSSCgs1Rgvingm1vgs1gds2voutgds3GSDCgd1gds1vgs1Thegain:June20-July20,200553DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUSummarytoCS,CDandCGCommonSourceCommonDrainCommonGateGainAVOHighLowHighBandwidthSmallLargeMediumInputimpedanceHighHighLowOutputimpedanceHighLowMediumJune20-July20,200554DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUDifferentialStages:M1M2ID2ID1IOVG1VG2Differenceoftheinputsignals:whereDifferenceofthecurrentsintheoutput:TransconductanceatVID=0:VIDDIDIO-IOJune20-July20,200555DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUTheInputvoltageoffsetVOS:IfID1=ID2,VGS1=VGS2VOS=DVGS=0ButVT1≠VT2andb1

≠b2

wecanobtainavoltagedifferenceattheoutputwhentheinputsarezero.Itmeansthatthereisavoltagesignalattheinput,i.e.anoffset.b1=bb2=b+DbVT1=VTVT2=VT+DVTInordertoreduceoffset,weliketouseNMOSandtochoosealargeWandL.June20-July20,200556DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUCascodeStructure(CS-CG):M2IOVb1M1voutVbVb2vinVINMVOUTVSSVDDClassicalcascode

MVDDVSSM1M2M3Vb1Vb2Vb3vinVINvoutVOUTfoldedcascode

Cascodestructurecanbeusedasanamplifier’sstagetoreduceMillerEffectandtoincreasethebandwidth.June20-July20,200557DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUConceptsinAmplifierTheoryTheidealAmplifier(Tellgenin1954):AninfinitypowergainV1=0,I1=0V2,I2arbitraryTheNullorConfiguration(Carlinin1964):Nullator(V1=0andI1=0)Norator(V2andI2canindependentlytakeanyvalue.)Two-portI1I2V1V2NullatorNoratorI1I2V1V2June20-July20,200558DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUNullorwithFeedbackNetworkThetransferpropertiesofthenulloraredefinedifanexternalnetworkprovidesforfeedbackfromtheoutputtotheinput.ExternalnetworkNullorI1I2V1V2NullorVinVoutR1R2NullorIoutIinR1R2Thetransferfunctionisindependentofanysourceandload.June20-July20,200559DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUTheIdealAmplifierSetVoltageAmplifiers(VCVS):Opencircuitinputport(Rin=∞)andshortcircuitoutputport(Rout=0)Anopen–loopvoltagegain(V2=AvV1)CurrentAmplifiers(CCCS):Shortcircuitinputport(Rin

=0)andopencircuitoutputport(Rout=∞)Anopen–loopcurrentgain(I2=AiI1)TransresistanceAmplifiers(CCVS):Ashortcircuitinputandoutputports(Rin=Rout=0)Anopen–looptransresistancegain(V2=Rt

I1)TransconductanceAmplifiers(VCCS):Aopencircuitinputandoutputports(Rin=Rout=∞)Anopen–looptransconductancegain(I2=GtV1)June20-July20,200560DalianInstituteofTechnology,ChinaYannHUofTechnology,China

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Y.HUPracticalAmplifierImplementationsTheamplificationofsignalsisperhapsthemostfundamentaloperationinanalogsignalprocessing.Voltageop-amplifiersCurrentconveyorsVoltage-modeprocessingCurrent-modeprocessingJune20-July20,200561DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUVoltageOperationalAmplifiersPrincipalcharacteristicsinopenloop:ZIN=∞(IIN=0)ZOUT=0GainA=∞

(VIN→0)BandwidthB→∞NoiseVnandIn

→0Closedloop:IINVINZINZOUTAVINVOUT-+V1Z1ZfJune20-July20,200562DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUVoltageOperationalAmplifiersDCcharacteristics:DCgainAVOisnotinfinite(AVO=60—80dB)Voltageoffsetatinput(MOSVOS3—5mV)Biascurrentsatinput(Bi-transistorIB10nA)CMR(Common-ModeRange)CMRR(Common-ModeRejectionRatio)AVD:GainindifferentialmodeandAVC:GainincommonmodeIdealAmpli:CMRRisinfiniteandrealAmpli:CMRR=60—80dBJune20-July20,200563DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUVoltageOperationalAmplifiersACcharacteristics:Inputimpedances:ZIN=1010

—1012

WOutputimpedance:ZOUT=20—200WACgainandgain-bandwidthproduct(GB)AVO-60dB/decfAV(dB)-20dB/dec-40dB/decwoWithfrequencycompensation:GB=AVO

fO

=fT

fT:unity-gainfrequencyJune20-July20,200564DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUVoltageOperationalAmplifiersLarge-signalcharacteristics:Inordertocharacterizethelarge-signalperformancesofOP,wehavetwomethods.StepinputsLargeamplitudesinusoidalsignalstinputFortheoutput,wehave:-delaytd-slewrateSr-settlingtimetsVO+0.1%VOtoutputVOtdtsVO-0.1%VODVDt(V/ms)June20-July20,200565DalianInstituteofTechnology,ChinaYannHUofTechnology,China

Prof.

Y.HUTheinputsignalissinusoidal,e(t)=Esin(wt).Atoutput,thesignalissinusoidal,s(t)=Ssin(wt+f).Theslewratecanbecalculatedby

Inordertoavoidadeformationofthesignal,wehavetoensure:Sr>Sw

Example:Sr=0.5V/ms,S=10V———f<50kHz

Sr=0.5V/ms,S=2.5V———f<200kHzJune20-July20,200566DalianInstituteofTechnology,ChinaYann