單片機(jī)畢業(yè)參考英文文獻(xiàn)及翻譯

附錄：英文技術(shù)資料翻譯英文原文：StructureandfunctionoftheMCS-51seriesStructureandfunctionoftheMCS-51seriesone-chipcomputerMCS-51isanameofapieceofone-chipcomputerserieswhichIntelCompanyproduces.Thiscompanyintroduced8top-gradeone-chipcomputersofMCS-51seriesin1980afterintroducing8one-chipcomputersofMCS-48seriesin1976.Itbelongtoalotofkindsthislineofone-chipcomputerthechipshave,suchas8051,8031,8751,80C51BH,80C31BH,etc.,theirbasiccomposition,basicperformanceandinstructionsystemareallthesame.8051dailyrepresentatives-51serialone-chipcomputers.Anone-chipcomputersystemismadeupofseveral

followingparts:(1)Onemicroprocessorof8(CPU).(2)At

slicedatamemoryRAM(128B/256B),itusenotdeposittingnot

canreading/datathatwrite,suchasresultnotmiddleof

operation,finalresultanddatawantedtoshow,etc.(3)

ProcedurememoryROM/EPROM(4KB/8KB),isusedtopreservethe

procedure,someinitialdataandforminslice.Butdoesnot

takeROM/EPROMwithinsomeone-chipcomputers,suchas8031,

8032,80C,etc..(4)Four8runsidebysideI/Ointerface

P0fourP3,eachmouthcanuseasintroduction,mayuseas

exportingtoo.(5)Twotimer/counter,eachtimer/counter

maysetupandcountintheway,usedtocounttotheexternal

incident,cansetupintoatimingwaytoo,andcanaccording

tocountorresultoftimingrealizethecontrolofthe

computer.(6)Fivecutoffcuttingoffthecontrolsystemof

thesource.(7)OneallduplexingserialI/OmouthofUART

(universalasynchronousreceiver/transmitter(UART)),isit

realizeone-chipcomputerorone-chipcomputerandserial

communicationofcomputertousefor.(8)Stretchoscillator

andclockproducecircuit,quartzcrystalfinelytuneelectric

第1頁capacityneedouter.Allowoscillationfrequencyas12megahertasnowatmost.Everytheabove-mentionedpartwasjoinedthroughtheinsidedatabus.Amongthem,CPUisacoreoftheone-chipcomputer,itisthecontrolofthecomputerandcommandcentre,madeupofsuchpartsasarithmeticunitandcontroller,etc..Thearithmeticunitcancarryon8personsofarithmeticoperationandunitALUoflogicoperationwhileincludingone,the1storingdevicetemporariliesof8,storingdevice2temporarily,8'saccumulationdeviceACC,registerBandprocedurestateregisterPSW,etc.PersonwhoaccumulateACCcountby2inputendsenteredofcheckingetc.temporarilyasoneoperationoften,comefrompersonwhostore1operationisitisitmakeoperationtogoontocounttemporarily,operationresultandloopbackACCwithanotherone.Inaddition,ACCisoftenregardedasthetransferstationofdatatransmissionon8051inside.Thesameasgeneralmicroprocessor,itisthebusiestregister.HelprememberingthatagreeingwithAexpressesintheorder.Thecontrollerincludestheprocedurecounter,theorderisdepositted,theorderdecipher,theoscillatorandtimingcircuit,etc.Theprocedurecounterismadeupofcounterof8fortwo,amountsto16.Itisabyteaddresscounteroftheprocedureinfact,thecontentisthenextIAthatwillcarriedoutinPC.Thecontentwhichchangesitcanchangethedirectionthattheprocedurecarriesout.Shakethecircuitin8051one-chipcomputers,onlyneedouterquartzcrystalandfrequencytofinelytunetheelectriccapacity,itsfrequencyrangeisits12MHZof1.2MHZ.Thispulsesignal,as8051basicbeatsofworking,namelytheminimumunitoftime8051isthesameasothercomputers,theworkinharmonyunderthecontrolofthebasicbeat,justlikeanorchestraaccordingtothebeatplaythatiscommanded.ThereareROM(procedurememory,canonlyread)andRAM

第2頁in8051slices(datamemory,canisitcanwrite)twotoread,theyhaveeachindependentmemoryaddressspace,disposewaytobethesamewithgeneralmemoryofcomputer.Procedure8051memoryand8751sliceprocedurememorycapacity4KB,addressbeginfrom0000H,usedforpreservingtheprocedureandformconstant.Data8051-87518031ofmemorydatamemory128B,addressfalse00FH,useformiddleresulttodepositoperation,thedataarestoredtemporarilyandthedataarebufferedetc..InRAMofthis128B,thereisunitof32bytesesthatcanbeappointedasthejobregister,thisandgeneralmicroprocessorisdifferent,8051sliceRAMandjobregisterrankoneformationthesametoarrangethelocation.ItisnotverythesamethatthememoryofMCS-51seriesone-chipcomputerandgeneralcomputerdisposesthewayinaddition.Generalcomputerforfirstaddressspace,ROMandRAMcanarrangeindifferentspacewithintherangeofthisaddressatwill,namelytheaddressesofROMandRAM,withdistributingdifferentaddressspaceinaformation.Whilevisitingthememory,correspondingandonlyanaddressMemoryunit,canROM,itcanbeRAMtoo,andbyvisitingtheordersimilarly.ThiskindofmemorystructureiscalledthestructureofPrinceton.8051memoriesaredividedintoprocedurememoryspaceanddatamemoryspaceonthephysicsstructure,therearefourmemoryspacesinall:Theprocedurestoresinoneanddatamemoryspaceoutsidedatamemoryandoneinprocedurememoryspaceandoneoutsideone,thestructureformsofthiskindofproceduredeviceanddatamemoryseparatedformdatamemory,calledHarvardstructure.Butusetheanglefromusers,8051memoryaddressspaceisdividedintothreekinds:(1)Intheslice,arrangeblocksofFFFFH,0000Hoflocation,inunisonoutsidetheslice(use16addresses).(2)Thedatamemoryaddressspaceoutsideoneof64KB,theaddressisarrangedfrom0000H64KBFFFFH(with16addresses)tootothelocation.(3)Datamemoryaddressspaceof256B(use8addresses).Threeabove-mentionedmemoryspaceaddressesoverlap,fordistinguishinganddesigningtheordersymbolofdifferentdatatransmissionintheinstructionsystemof8051:CPUvisitslice,ROMorderspendMOVC,visitblockRAMorderusesMOVXoutsidetheslice,RAMorderusesMOVtovisitinslice.8051one-chipcomputerhavefour8walkabreastI/Oport,callP0,P1,P2andP3.Eachportis8accuratetwo-waymouths,accountsfor32pinsaltogether.EveryoneI/Olinecanbeusedasintroductionandexportedindependently.Eachportincludesalatch(namelyspecialfunctionregister),oneexportsthedriverandaintroductionbuffer.Makedatacanlatchwhenoutputting,datacanbufferwhenmakingintroduction,butfourfunctionofpasswaytheseself-same.Expandamongthesystemofmemoryoutsidehavingslice,fourportthesemayserveasaccuratetwo-waymouthofI/Oincommonuse.Expandamongthesystemofmemoryoutsidehavingslice,P2mouthseehigh8addressoff;P0mouthisatwo-waybus,sendtheintroductionof8lowaddressesanddata/exportintimesharingOutputgrade,P3ofmouth,P1ofP1,connectwithinside

haveloadresistanceofdrawing,everyoneoftheycandrive

4ModelLSTTLloadtooutput.Aswhileinputtingthemouth,

anyTTLorNMOScircuitcandriveP1of8051one-chipcomputers

asP3mouthinanormalway.Becausedrawresistanceonoutput

gradeofthemhave,canopenawaycollectortooor

drain-sourceresistanceisiturgetoopenaway,donotneed

tohavetheresistanceofdrawingouterly.Mouthsareall

accuratetwo-waymouthstoo.Whentheconductisinput,must

writethecorrespondingportlatchwith1first.Asto80C51

one-chipcomputer,portcanonlyoffermilliampereofoutput

electriccurrents,isitoutputmouthgowhenurgingone

ordinarybasingoftransistortoregardas,shouldcontacta

第4頁resistanceamongtheportandtransistorbase,inordertotheelectricitywhilerestrainingthehighlevelfromexportingP1~P3Beingrestoredtothethroneistheoperationofinitializingofanone-chipcomputer.ItsmainfunctionistoturnPCinto0000Hinitially,maketheone-chipcomputerbegintoholdtheconductprocedurefromunit0000H.Exceptthattheonesthatenterthesystemareinitializednormally,asbecauseprocedureoperateitmakemistakesoroperatetherearen'tmistake,inordertoextricateoneselffromapredicament,needtobepressedandrestoredtothethronethekeyrestartingtoo.Itisaninputendwhichisrestoredtothethronethesignalin8051ChinaRSTpin.Restoretothethronesignalhighleveleffective,shouldsustain24shakecycle(namely2machinecycles)theaboveitseffectivetimes.If6offrequencyofutilizationbrillianttoshake,restoretothethronesignaldurationshouldexceed4delicatetofinishrestoringtothethroneandoperating.Producethelogicpictureofcircuitwhichisrestoredtothethronethesignal:Restoretothethronethecircuitandincludetwopartsoutsideinthechipentirely.Outsidethatcircuitproducetorestoretothethronesignal(RST)handovertoSchmitt'strigger,restoretothethronecircuitsampletooutput,SchmittoftriggerconstantlyineachS5P2,machineofcycleinhavingonemore,thenjustgotandrestoredtothethroneandoperatedthenecessarysignalinsidly.Restoretothethroneresistanceofcircuitgenerally,electriccapacityparametersuitablefor6brillianttoshake,canisitrestoretothethronesignalhighleveldurationgreaterthan2machinecyclestoguarantee.Beingrestoredtothethroneinthecircuitissimple,itsfunctionisveryimportant.Piecesofone-chipcomputersystemcouldnormalrunning,shouldfirstcheckitcanrestoretothethronenotsucceeding.Checkingandcanpopone'sheadandmonitorthepinwiththeoscillographtentatively,pushandisrestoredtothethronethekey,thewaveformthatobservesandhasenoughrangeisexported(instantaneous),canalsothroughisitrestoretothethronecircuitgroupholdingvaluecarryontheexperimenttochange.注：文獻(xiàn)來源中文譯文：51系列單片機(jī)的功能和構(gòu)造51系列單片機(jī)是Intel公司設(shè)計的單片機(jī)產(chǎn)品。這家公司于1976年推出8位MCS-48系列之后又在1980年推出了MCS-51系列單片機(jī)。它屬于這一類型很多行一個芯片的電腦芯片都如8051、8031、8751、80c51bh,80c31bh等，其根本組成、性能和根本教學(xué)制度,都是一樣的.8051通常是51系列的代表。每個單片機(jī)系統(tǒng)是由以下幾個方面構(gòu)成：(1)18微處理器(CPU).(2)片中內(nèi)數(shù)據(jù)存儲器RAM(128B/256B)中如果結(jié)果不在操作過程中,結(jié)果也要顯示出來(3)存儲器存儲程序/可擦寫可編程只讀存儲器(4KB/8KB),用于保存程序和數(shù)據(jù)，初步形成片.但并不存儲器/可擦寫可編程只讀存儲器在一些人的電腦芯片，如8031、8032、80c等.〔4)四個8路運(yùn)行的I/O口，p0,p1,p2,p3，每個口既可用作輸入也可用作出口(5)兩個定時/計數(shù)器,每個計時器/計數(shù)器可設(shè)立不同計數(shù)方式,用來計數(shù)外部事件,可以設(shè)置定時方式也可以和根據(jù)計算結(jié)果或定時控制實(shí)現(xiàn)控制計算(6)五個中斷控制系統(tǒng).(7)一個全雙工串行UART(異步接收世界/發(fā)送(UART)),它是實(shí)現(xiàn)一個計算機(jī)芯片和一個計算機(jī)芯片之間通訊的一種串口.(8)振蕩器和時鐘產(chǎn)生電路，需要考慮石英晶體微調(diào)能力，允許震蕩平率位12MHZ,上述每個局部都是通過片內(nèi)數(shù)據(jù)總線連接。其中CPU是計算機(jī)芯片的核心,他是計算機(jī)的指揮中心,由算數(shù)單元和控制單元組成算術(shù)單元可進(jìn)展8位算術(shù)運(yùn)算和邏輯運(yùn)算，ALU單元是一種運(yùn)算器，18個存儲設(shè)備，暫存設(shè)備進(jìn)展存儲協(xié)調(diào)，PSW積累了兩個輸入端等檢查時作為一個操作由人來操縱存儲，另有一個操縱的結(jié)果回環(huán)協(xié)調(diào)。此外，協(xié)調(diào)往往是作為對8051的數(shù)據(jù)傳輸運(yùn)轉(zhuǎn)站考慮。作為一般的微處理器，他是最繁忙的。振蕩器和定時器是由2個8位計數(shù)器組成，總位數(shù)為16位。這是一個字節(jié)的地址，其實(shí)是程序計數(shù)器，將在個人電腦內(nèi)部有運(yùn)行，從而改變程序的運(yùn)行順序。在8051的電路中，只需增加外部石英晶體和頻率微調(diào)電容，這就保證計算機(jī)各部件的工作就像管弦樂隊和諧工作。在8051中有ROM（程序存儲器，只能讀取）和RAM（數(shù)據(jù)存儲器，可讀可寫），他們有各自獨(dú)立的內(nèi)存地址空間，也有一樣的處理方式。8051和8751的程序存儲器的存儲容量為4KB,地址從0000H開場,在使用過程中其中數(shù)據(jù)不變。8051,8751,8031數(shù)據(jù)存儲器的內(nèi)存為128B，默認(rèn)地址是00FH,用于保存中間數(shù)據(jù)和緩存。在這128B的內(nèi)存中，有32byteses,被稱作工作存放器，和常用的微處理器不同的是,8051的RAM是按功能來劃分模塊的。MCS-51系列單片機(jī)和和一般電腦的處理方式不同。一般電腦會自動分配地址空間，ROM和RAM的計算機(jī)可以安排在不同的空間內(nèi)，地址范圍會根據(jù)ROM和RAM的位置分配不同的地址空間。在訪問的內(nèi)存,不管是ROM和RAM，只有一個地址對應(yīng)一個內(nèi)存單元，都