電子科大-數(shù)字電路-最好老師的課件1

電子科大數(shù)字電路最好老師的課件12課程簡(jiǎn)介

“數(shù)字邏輯設(shè)計(jì)及應(yīng)用”課程歷來(lái)是我校的重要專業(yè)基礎(chǔ)課程之一，是研究數(shù)字系統(tǒng)設(shè)計(jì)的入門課程。通過(guò)本課程的學(xué)習(xí)，使學(xué)生掌握數(shù)字邏輯電路的基本理論和基本分析方法，為學(xué)習(xí)后續(xù)課程準(zhǔn)備必要的電路知識(shí)。本課程在培養(yǎng)學(xué)生嚴(yán)肅認(rèn)真的科學(xué)作風(fēng)和抽象思維能力、分析計(jì)算能力、總結(jié)歸納能力等方面起重要作用。在本課程中，將介紹數(shù)字邏輯電路的分析設(shè)計(jì)方法和基本的系統(tǒng)設(shè)計(jì)技巧；培養(yǎng)同學(xué)綜合運(yùn)用知識(shí)分析解決問(wèn)題的能力和在工程性設(shè)計(jì)方面的基本素養(yǎng)。通過(guò)實(shí)驗(yàn)和課外上機(jī)實(shí)驗(yàn)的方式，使同學(xué)深入了解和掌握數(shù)字邏輯電路的設(shè)計(jì)分析方法和電路的運(yùn)用過(guò)程。DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)3課程安排：64學(xué)時(shí)教材：數(shù)字設(shè)計(jì)—原理與實(shí)踐（第4版影印版）JohnF.Wakerly高等教育出版社2007參考書：1.數(shù)字設(shè)計(jì)—原理與實(shí)踐（第4版）JohnF.Wakerly林生等譯機(jī)械工業(yè)出版社20072.數(shù)字電子技術(shù)基礎(chǔ)（第4版）閻石等編高等教育出版社DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)4內(nèi)容安排：32次課內(nèi)容講解27次，習(xí)題講解3次，單元測(cè)驗(yàn)2次第1，2章3次引言，數(shù)制與編碼第3章3次數(shù)字電路器件基礎(chǔ)第4，6章12次組合電路分析與設(shè)計(jì)第7，8章12次時(shí)序電路分析與設(shè)計(jì)第9章1次存儲(chǔ)器和可編程器件補(bǔ)充內(nèi)容1次DAC和ADCDigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)5習(xí)題每次課2—4題（基本采用教材習(xí)題）；每章結(jié)束上交，批改后將進(jìn)行針對(duì)性講解，并給出參考解答；每課一題每次內(nèi)容講解的課上布置，自備一頁(yè)紙完成，要求當(dāng)堂完成上交；只檢查，不返回；課程設(shè)計(jì)綜合性考查，組合電路和時(shí)序電路各一次，要求兩周內(nèi)完成后上交；DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)6教學(xué)考核方式平時(shí)作業(yè)及隨堂考核成績(jī)：10分(6/4)課程設(shè)計(jì)：15分期中考試：15分期末考試：60分DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)7Chapter1Introduction(引言)1.1AboutDigitalDesign(關(guān)于“數(shù)字設(shè)計(jì)”)

Anothername“LogicDesign”.ThegoalofdesignistoBuildSystem.DigitalDesignisengineering,andengineeringmeans“ProblemSolving”.Only5%-10%istheCreativepartofDesign.Muchoftherestisjust“TurningtheCrank”.ImportantThemesinDigitalDesign（P2)DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)81.2AnalogversusDigital

(模擬與數(shù)字)模擬量：其變化在時(shí)間或數(shù)值上是連續(xù)的數(shù)字量：其變化在時(shí)間和數(shù)量上都是離散的數(shù)值大小是某一個(gè)最小數(shù)量單位的整數(shù)倍DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)9原始信號(hào)衰減放大模擬信號(hào)在傳輸過(guò)程中失真數(shù)字信號(hào)仍然可以保持0、11.2AnalogversusDigital

(模擬與數(shù)字)DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)101.2AnalogversusDigital

(模擬與數(shù)字)DigitalCircuitsoverAnalogOnes(數(shù)字系統(tǒng)及其優(yōu)越性)ReproducibilityofResults[結(jié)果再現(xiàn)性（穩(wěn)定可靠、精度更高）]Easeofdesign,Flexibility,andFunctionality(易于設(shè)計(jì)，靈活性和功能性)Programmability[可編程性（具有“智能”）]Speed,Economy,andSteadilyAdvancingTechnology(快速、經(jīng)濟(jì)性、穩(wěn)步發(fā)展的技術(shù))DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)111.2AnalogversusDigital

(模擬與數(shù)字)DevelopmentofDigitalElectronicAspects(數(shù)字電子技術(shù)的發(fā)展)VacuumTube,Transistor,andIntegratedCircuit[電子管、晶體管、集成電路（IC）]Large-Scale/VeryLarge-ScaleIntegration[大∕超大規(guī)模集成電路（LSI/VLSI）]ApplicationsofDigitalElectronicAspects(數(shù)字電子技術(shù)的應(yīng)用)(P3-4)DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)121.3DigitalDevices

(數(shù)字器件)Gates（門電路）：

——Themostbasicdigitaldevices(ANDGate,ORGate,andNOTGateorInverter)[最基本的數(shù)字器件（與、或、非門或反相器]Flip-flops（觸發(fā)器）：

——Adevicethatstoreseither0or1(一種能存儲(chǔ)0或1的器件)P7Figure1-1DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)131.3DigitalDevices

(數(shù)字器件)Figure1-1DigitalDevices(a)ANDGate(b)ORGate(c)NOTGateorInverterDigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)141.4ElectronicAspectsofDigitalDesign(數(shù)字設(shè)計(jì)的電子技術(shù))HowtorealizeLogic0and1inaRealcircuit?(邏輯上的0和1在物理上如何實(shí)現(xiàn)？)Whatistherangeofanalogvaluewitheachlogicvalue(0or1)[什么電平范圍對(duì)應(yīng)邏輯0（或1）？]Howtoproduceandfigureoutthesignalinaproperrange?(如何正確產(chǎn)生和識(shí)別處于適當(dāng)范圍的信號(hào)？)TheassociationbetweenDigitalandAnalog(數(shù)字與模擬之間的關(guān)系)DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)151.5SoftwareAspectsofDigitalDesign(數(shù)字設(shè)計(jì)的軟件技術(shù))Softwaretoolshelptoimprovethedesigner’sproductivity,thecorrectnessandqualitydesigns.SeveralSoftwareTools(軟件工具有助于提高設(shè)計(jì)的效率、正確性和質(zhì)量。)(幾種軟件工具P9）Pspise,multisim,電路仿真MaxPlus,QuatusII,VHDL仿真protel,powerPCB，制版軟件DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)161.6IntegratedCircuits

（集成電路，IC）Wafer(單晶硅片）－》Die(模片）DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)171.6IntegratedCircuits

（集成電路，IC）Wafer(單晶硅片）－》Die(模片）DualIn-line-pinPackage(DIP,雙列直插式封裝)(P13)DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)181.6IntegratedCircuits

（集成電路，IC）Wafer(單晶硅片）－》Die(模片）DualIn-line-pinPackage(DIP,雙列直插式封裝)(P13)Small-ScaleIntegration(SSI，小規(guī)模集成):1-20GatesMedium-ScaleIntegration(MSI，中規(guī)模集成):20-200GatesLarge-ScaleIntegration(LSI，大規(guī)模集成):200-200,000GatesVeryLarge-ScaleIntegration(VLSI，超大規(guī)模集成):Over1,000,000TransistorsDigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)19DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)幾種7400系列SSIIC的引腳圖201.7ProgrammableLogicDevices

(可編程邏輯器件)ProgrammableLogicArray(PLA,可編程邏輯陣列)ProgrammableArrayLogic(PAL,可編程陣列邏輯)ProgrammableLogicDevice(PLD,可編程邏輯器件)ComplexPLD(CPLD,復(fù)雜可編程邏輯器件)Field-ProgrammableGateArray(FPGA,現(xiàn)場(chǎng)可編程門陣列）DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)211.7ProgrammableLogicDevices

(可編程邏輯器件)大型可編程邏輯元件的擴(kuò)展方法DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)221.8Application-SpecificICs

[專用集成電路（ASIC）]Semi-CustomIC(半定制IC)Non-RecurringEngineering(NRE)Cost(非再現(xiàn)工程成本）:$10,000-$500,000CustomIC(全定制IC）NRECost:Over$500,000DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)231.9Printed-CircuitBoards

(PCB,印制電路板)Printed-WiringBoards(PWB,印制線路板)Surface-MountTechnology(SMT,表面安裝技術(shù))Multi-ChipModule(MCM,多芯片模塊）DigitalLogicDesignandApplication(數(shù)字邏輯設(shè)計(jì)及應(yīng)用)241.10