數(shù)字集成電路：引論

1數(shù)字集成電路

-電路、系統(tǒng)與設(shè)計引論2本書的內(nèi)容數(shù)字集成電路簡介.CMOSdevicesandmanufacturingtechnology.CMOSinvertersandgates.Propagationdelay(傳播延時),noisemargins,andpowerdissipation.Sequentialcircuits.Arithmetic,interconnect,andmemories.Programmablelogicarrays.Designmethodologies.你要學(xué)習(xí)什么知識？Understanding,designing,andoptimizingdigitalcircuitswithrespecttodifferentqualitymetrics:cost,speed,powerdissipation,andreliability3數(shù)字集成電路引論:數(shù)字集成電路中的設(shè)計問題CMOS反相器組合邏輯門的設(shè)計時序邏輯門設(shè)計方法R,L,C的互聯(lián)問題時序問題設(shè)計運算功能塊存儲器和陣列結(jié)構(gòu)設(shè)計4簡介數(shù)字IC設(shè)計和以前相比有什么不同?未來有什么變化?5第一臺計算機圖1.1世界上已知的第一個自動計算器Babbage的DifferenceEngineI（1832年）的工作部件（摘自［Swade93］，由倫敦科學(xué)博物館提供）6ENIAC–第一臺電子計算機(1946)7晶體管革命FirsttransistorBellLabs,19488第一個集成電路Bipolarlogic1960’sECL3-inputGateMotorola19669

Intel4004微處理器19711000transistors1MHzoperation10IntelPentium(IV)微處理器11摩爾定律1965年,戈登.摩爾指出每個新芯片大體上包含其前任兩倍的容量，每個芯片的產(chǎn)生都是在前一個芯片產(chǎn)生后的18~24個月內(nèi)。他預(yù)測半導(dǎo)體工藝的效率將會每18個月翻一番。12摩爾定律Electronics,April19,1965.13復(fù)雜性革命14晶體管數(shù)量Courtesy,Intel15摩爾法則在微處理器上的應(yīng)用40048008808080858086286386486Pentium?procP60.0010.010.1110100100019701980199020002010YearTransistors(MT)2Xgrowthin1.96years!TransistorsonLeadMicroprocessorsdoubleevery2yearsCourtesy,Intel16尺寸增長40048008808080858086286386486Pentium?procP611010019701980199020002010YearDiesize(mm)~7%growthperyear~2Xgrowthin10yearsDiesizegrowsby14%tosatisfyMoore’sLawCourtesy,Intel17頻率Courtesy,Intel18功耗P6Pentium?proc486386286808680858080800840040.1110100197119741978198519922000YearPower(Watts)LeadMicroprocessorspowercontinuestoincreaseCourtesy,Intel19功耗將會成為首要問題5KW18KW1.5KW500W40048008808080858086286386486Pentium?proc0.111010010001000010000019711974197819851992200020042008YearPower(Watts)PowerdeliveryanddissipationwillbeprohibitiveCourtesy,Intel20功耗密度40048008808080858086286386486Pentium?procP611010010001000019701980199020002010YearPowerDensity(W/cm2)HotPlateNuclearReactorRocketNozzlePowerdensitytoohightokeepjunctionsatlowtempCourtesy,Intel21生產(chǎn)趨勢1101001,00010,000100,0001,000,00010,000,000200319811983198519871989199119931995199719992001200520072009101001,00010,000100,0001,000,00010,000,000100,000,000LogicTr./ChipTr./StaffMonth.xxxxxxx21%/Yr.compoundProductivitygrowthratex58%/Yr.compoundedComplexitygrowthrate10,0001,0001001010.10.010.001LogicTransistorperChip(M)0.010.11101001,00010,000100,000Productivity(K)Trans./Staff-Mo.Source:SematechComplexityoutpacesdesignproductivityComplexityCourtesy,ITRSRoadmap22為什么要縮小尺寸?Technologyshrinksby0.7/generationWitheverygenerationcanintegrate2xmorefunctionsperchip;chipcostdoesnotincreasesignificantlyCostofafunctiondecreasesby2xBut…Howtodesignchipswithmoreandmorefunctions?Designengineeringpopulationdoesnotdoubleeverytwoyears…Hence,aneedformoreefficientdesignmethodsExploitdifferentlevelsofabstraction23設(shè)計中的抽象層次24設(shè)計要求數(shù)字設(shè)計的質(zhì)量評價成本可靠性可測量性速度(延遲,工作頻率)功耗、能耗性能25集成電路的成本

固定成本設(shè)計時間、人力間接成本

可變成本硅處理,封裝,測試按體積按片面積26固定成本在增加27固定成本SingledieWaferFromhttp://Goingupto12”(30cm)28單個晶體管成本0.00000010.0000010.000010.00010.0010.010.1119821985198819911994199720002003200620092012cost:￠-per-transistorFabricationcapitalcostpertransistor(Moore’slaw)29成品率30缺陷aisapproximately331一些例子(1994)ChipMetallayersLinewidthWafercostDef./cm2Areamm2Dies/waferYieldDiecost386DX20.90$9001.04336071%$4486DX230.80$12001.08118154%$12PowerPC60140.80$17001.312111528%$53HPPA710030.80$13001.01966627%$73DECAlpha30.70$15001.22345319%$149SuperSparc30.70$17001.62564813%$272Pentium30.80$15001.5296409%$417321.3.2功能性和穩(wěn)定性為什么一個制造出來的電路所測得的行為特性通常都會與預(yù)期的響應(yīng)有差別？原因1：制造過程導(dǎo)致的差異每個生產(chǎn)批次之間、甚至同一圓片或芯片上器件的尺寸和參數(shù)都會有所不同。原因2：芯片上或芯片外存在的干擾噪聲。如電源噪聲、并排放置導(dǎo)線間的串?dāng)_噪聲33數(shù)字集成電路中的噪聲i(t)

電感耦合

電容耦合電源線和地線噪聲v(t)VDD34串?dāng)_噪聲Crosstalkvs.Technology0.16mCMOS0.12mCMOS0.35mCMOS0.25mCMOSPulsedSignalBlacklinequietRedlinespulsedGlitchesstrengthvstechnology35

電壓傳輸特性V(x)V(y)VOHVOLVM

VOHVOLfV(y)=V(x)SwitchingThresholdNominalVoltageLevelsVOH=f(VOL)VOL=f(VOH)VM=f(VM)36邏輯電平映射至電壓范圍VILVIHVin斜率=-1斜率=-1VOLVOHVout“0”VOLVILVIHVOH不確定區(qū)“1”37噪聲容限NoisemarginhighNoisemarginlowVIH

VIL不確定區(qū)"1""0"VOH

VOLNMHNML門輸出門輸入38再生性條件39再生性條件40扇入與扇出

41理想傳輸門Ri=￥Ro=0Fanout=￥NMH=NML=VDD/2

g

=

VinVout42老式反相器43傳播延時44環(huán)振45一階RC網(wǎng)絡(luò)voutvinCRtp=ln(2)t=0.69RCImportantmodel–matchesdelayofinverter

46功耗Instantaneouspower:

p(t)=v(t)i(t)=V