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1、Product SpecificationPart Name:OEL Display ModuleCustomer Part ID:Allvision Part ID:QG-2832TSWFG04Ver:AAllvision technology Inc.Http:/Notes:1. Please contact Allvision technology Inc. before assigning your product based on this module specification2. The information contained here
2、in is presented merely to indicate the characteristics and performance of our products. No responsibility is assumed by Allvision technology Inc. for any intellectual property claims or other problems that may result from application based on the module described herein.From: Allvision technology In
3、c.Approved byCustomer:Approved byAllvision technology Inc.Ver:ARevised HistoryiPart NumberRevisionRevision ContentRevised onQG-2832TSWFG04ANew20140606Allvision technology Inc.Ver:AContentsRevision History Contents1.Basic Specifications1.41.5Display Specifications Me
4、chanical SpecificationsActive Area / Memory Mapping & Pixel Construction Mechanical DrawingPin Definition2.3.Absolute Maximum Ratings Optics & Electrical CharacteristicsOptics Characteristics DC Characteristics AC Characteristics.23.3.34-wire SPI Interface Characteristics4-wire SPI
5、Interface with Internal Charge Pump 4-wire SPI Interface with External VCC4.Functional Specification4.14.2CommandsPower down and Power up Sequence4.2.1 Power up Sequence4.2.2 Power down Sequence Reset CircuitActual Application Example4.4.1 VCC Supplied Externally4.4.2 VCC Generated by Internal DC/DC
6、 Circuit4.34.45.Reliability5.1 Contents of Reliability Tests5.2 Failure Check StandardOutgoing Quality Control Specifications6.3Environment Required Sampling PlanCriteria & Acceptable Quality Level.26.3.3Cosmetic Check (Display Off) in Non-Active Area Cosmetic Check (Display Off) in
7、Active Area Pattern Check (Display On) in Active Area7.8.Package SpecificationsPrecautions When Using These OEL Display Modules8.48.5Handling Precautions Storage Precautions Designing PrecautionsPrecautions when disposing of the OEL display modules Other PrecautionsWarranty Noticeiihttp:/ww
8、1. Basic Specifications1.1Display Specifications1) Display Mode:2) Display Color:3) Drive Duty:Passive Matrix Monochrome (White) 1/32 Duty1.2Mechanical Specifications1)2)3)4)5)6)7)Outline Drawing: Number of Pixels: Panel Size:Active Area: Pixel Pitch: Pixel Size: Weight:According to
9、 the annexed outline drawing 128 3230.0 11.5 1.2 (mm)22.384 5.584 (mm)0.175 0.175 (mm)0.159 0.159 (mm) TBD1.3Active Area / Memory Mapping & Pixel ConstructionP0.175x128-0.016=22.3840.1750.159 ASegment 127( Column 1 )Segment 0( Column 128 )Common 0( Row 32 )Common 62( Row 1 )Detail A Scale (10:1)http
10、:/1P0.175x32-0.016=5.5840.1750.159ItemDateRemark20140604Original DrawingA30 0.2 (Panel Size)16.3 0.226.6 0.2 (Cap Size)25.9 (Polarizer)0.35 0.3(1.1)(2.1)24.384 (V/A)22.384 (A/A)6.8 0.25.8 0.2105P0.175x128-0.016=22.384VC 1 5 VCOMHIREActive Area 0.91 ASDSCLD/C128 x 32 PixelsRESCVDVS
11、VBCC1C C2 Segment 127( Column 1 )Segment 0( Column 128 )Common 62( Row 32 )Common 0( Row 1 )3M #1318B9x6.5x0.063mm1.8 0.29x6.5x0.06mmRemove Tape t=0.15mm MaxPolarizer t=0.2mmContact Side0.1750.159GlueContact SideDetail A Scale (10:1)Notes:1. Color: White2. Driver IC: SSD1306Customer Approval Signatu
12、reDrawing NumberRev.Allvision technology Inc.3. FPC Number: QT1306P224. Interface: 4 wire SPI5. General Tolerance: 0.30AQG-2832TSWFG04Unless Otherwise SpecifiedMaterialQG-2832TSWFG04 Folding Type OEL Display Module Pixel Number: 128 x 32, Monochrome, COG PackageUnitmmTitleSoda Lime / PolyimideGenera
13、l RoughnessToleranceDrawnE.E.Panel / E.P.M.ByDimension 0.3HONGScaleSheetSizeAngle 1Date201406041:11 of 1A31.4Mechanical Drawing0.1590.175P0.175x32-0.016=5.58411.25 0.2P 0.65x(15-1)=9.1 0.050.1 0.03W=0.35 0.039.25 0.10.175(0.86)6 0.3(2.1)(1.1)0.5 0.51.2 0.15.584 (A/A)7.584 (V/A)8.8 (Polarizer)11.5 0.
14、2 (Cap Size)11.5 0.2 (Panel Size)21PinSymbol1C2P2C2N3C1P4C1N5VBAT6VSS7VDD8CS#9RES#10D/C#11SCLK12SDIN13IREF14VCOMH15VCC1.5Pin Definition1.5 Pin Definition (Continued)3Pin NumberSymbolI/OFunctionInterface (Continued)1112SCLKSDINII/OSerial Clock Input S
15、ingalThe transmission if information in the bus is following a clock signal. Each transmission of data bit is taken place during a single clock period of this pin.Serial Data Input SignalThis pins acts as a communication channel. The input data through SDIN are latch at the rising edge of SCLK in fh
16、e sequence of MSB first and converted to 8-bit parallel data and handled at the rising edge of last serial clock.SDIN is identified to display data or command by D/C bit data at the rising of first SCLK.8CSIChip SelectThis pin is the chip select input. The chip is enabled for MCU communication only
17、when CS# is pulled low.10D/CIData/Command ControlWhen the pin is pulled high and serial interface mode is selected, the data at SDIN will be interpreted as data. When it is pulled low, the data at SDIN will be transferred to the command register.ReservePin NumberSymbolI/OFunctionPower Supply7615VDD
18、VSSVCCP PPPower Supply for LogicThis is a voltage supply pin. It must be connected to external source.Ground of Logic CircuitThis is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground.Power Supply for OEL PanelThis is the most positive voltage supply pin
19、 of the chip. A stabilization capacitor should be connected between this pin and VSS when the converter is used. It must be connected to external source when the converter is not used.Driver1314IREFVCOMHIOCurrent Reference for Brightness AdjustmentThis pin is segment current reference pin. A resisto
20、r should be connected between this pin and VSS. Set the current at 12.5mA maximum.Voltage Output High Level for COM SignalThis pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and VSS.DC/DC Converter53 / 41 / 2VBATC1P / C1N C2P
21、/ C2NPIPower Supply for DC/DC Converter CircuitThis is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to VDD when the converter is not used.Positive Terminal of the Flying Inverti
22、ng Capacitor Negative Terminal of the Flying Boost CapacitorThe charge-pump capacitors are required between the terminals. They must be floated when the converter is not used.Interface9RES#IPower Reset for Controller and DriverThis pin is reset signal input. When the pin is low, initialization of th
23、e chip is executed. Keep this pin pull high during normal operation.2. Absolute Maximum RatingsNote 1: All the above voltages are on the basis of “VSS = 0V”.Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur. Also, for normal operat
24、ions, it is desirable to use this module under the conditions according to Section 3. “Optics & Electrical Characteristics”. If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate.Note 3: The defined temperature ranges
25、 do not include the polarizer. temperature of the polarizer should be 80C.Note 4: VCC = 8.0V, Ta = 25C, 50% Checkerboard.Software configuration follows Section 4.4 Initialization.The maximum withstoodEnd of lifetime is specified as 50% of initial brightness reached. The average operating lifetime at
26、 room temperature is estimated by the accelerated operation at high temperature conditions.4ParameterSymbolMinMaxUnitNotesSupply Voltage for LogicSupply Voltage for DisplaySupply Voltage for DC/DC(Internal DC/DC Enable) Operating Temperature Storage Temperature Life Time (12
27、0 cd/m2) Life Time (80 cd/m2)Life Time (60 cd/m2)VDD VCCVbatTOP TSTG-0.30-0.3-40-4010,00030,00050,0004164.38585-V VVCC hour hourhour1, 21, 21, 234443. Optics& Electrical Characteristics3.1 Optics Characteristics* Optical measurement taken at VDD = 2.8V, VCC = 8V. Software configuration follows Secti
28、on 4.4 Initialization.3.2 DC CharacteristicsNote 5 & 6: Brightness (Lbr) and Supply Voltage for Display (VCC) are subject to the change of the panelcharacteristics and the customers request.Note 7:Note 8:VDD = 2.8V, VCC = 7.25V, 100% Display Area Turn on.VDD = 2.8V, VCC = 7.25V, 100% Display Area Tu
29、rn on.* Software configuration follows Section 4.4 Initialization.5CharacteristicsSymbolConditionsMinTypMaxUnitSupply Voltage for LogicSupply Voltage for Display (Supplied Externally) Supply Voltage for DC/DCSupply Voltage for Display (Generated by Internal DC/DC)High Level
30、Input Low Level Input High Level Output Low Level OutputOperating Current for VDDOperating Current for VCC (VCC Supplied Externally)Operating Current for VBAT (VCC Generated by Internal DC/DC)Sleep Mode Current for VDD Sleep Mode Current for VCCVDD VCC VBAT VCCVIH VIL VOH VOL IDDICCIBAT IDD, SLEEPIC
31、C, SLEEPNote 5 (Internal DC/DC Disable) Internal DC/DC EnableNote 6 (Internal DC/DC Enable)IOUT = 100A, 3.3MHz IOUT = 100A, 3.3MHz IOUT = 100A, 3.3MHz IOUT = 100A, 3.3MHzNote 7Note 81.656.43.570.8 VDD00.9 VDD0-2.8- 7.25- 1801023.0123.39.04.27.5VDD 0.2VDD VDD 0.1VDD3001629.0510V V V VV V V VAmAmAA AC
32、haracteristicsSymbolConditionsMinTypMaxUnitBrightness(VCC Supplied Externally)Brightness(VCC Generated by Internal DC/DC)C.I.E. (White)Dark Room Contrast Viewing AngleLbrLbr(x)(y) CRNote 5Note 6C.I.E. 19311501500.280.31-180-0.320.352000:1Free-0.360.39-cd/m2cd/m2degree3.3 AC Characteristics3.3.1Seria
33、l Interface Timing Characteristics: (4-wire SPI)* (VDD - VSS = 1.65V to 3.3V, Ta = 25C)6SymbolDescriptionMinMaxUnittcycle tAS tAH tCSS tCSH tDSW tDHW tCLKL tCLKHtRtFClock Cycle Time Address Setup Time Address Hold Time Chip Select Setup Time Chip Select Hold Time Write Data
34、Setup Time Write Data Hold Time Clock Low TimeClock High Time Rise TimeFall Time500300300240120300300200200- 3030ns ns ns ns ns ns ns ns ns nsns3.3.24 wire SPI Interface with Internal Charge PumpRecommended Components:C1,: C2:C3:C4:C5: C6,C7: R3: R2, R1: Q1:Q2:Notes:VDD:VBAT_in:0.1F / 6.3V, X5R4.7F
35、/ 6.3V, X5R2.2F/ 16V, X7R4.7F / 16V, X7R0.1F / 16V, X7R1F / 16V, X7R2M, R1 = (Voltage at IREF - VSS) / IREF47k FDN338P FDN335N1.653.3V, it should be equal to MPU I/O voltage. 3.54.2V7SDSD C2N C1N C6C7 CAPC2P CAPC1P VBAT_INR1J?Q2Q1GPIOGVBATVDDR2C1C2 IREF VCOMHVCCCON15R3C3C4C5
36、C2PC2NC1PC1NVBATVSSVDDCSRESDCSCLKSDINIREFVCOMHVCC1234567891011121314153.3.34 wire SPI Interface with ExternalVCCRecommended Components:0.1F / 6.3V, X5R4.7F / 6.3V, X5R2.2F/ 16V, X7R4.7F / 16V, X7R0.1F / 16V, X7R2M, R1 = (Voltage at IREF - VSS) / IREF47k FDN338P FDN335NC1,: C2:C3:C4:C5:R3: R2, R1: Q1
37、:Q2:Notes:VDD:VCC_in:1.653.3V, it should be equal to MPU I/O voltage. 77.5V8SDSDVCC_INR1J?Q2GPIOGQ1VCCVBAT VSSVDDVDDR2CSC1C2RESDC SCLKSDIN IREFIREFVCOMH VCOMHVCC VCCCON15 R3C3C4C51234567891011121314154.Functional Specification4.1CommandsRefer to the Technical Manual for the
38、SSD13064.2Power down and Power up SequenceTo protect OEL panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off. It gives the OEL panel enough time to complete the action of charge
39、and discharge before/after the operation.4.2.1 Power up Sequence:VDD on.5.6.Power up VDDSend Display off command InitializationClear Screen Power up VCC/ VBAT Delay 100ms(When VCC is stable)Send Display on commandVCCVDDVSS/Ground7.Display off4.2.2 Power down Sequence:1.2.3.Send Display off co
40、mmand Power down VCC / VBAT Delay 100msVCC/VBAT(When/VCCVBATis reach0 and panel isVDDVSS/Groundcompletely discharges) Power down VDD4.Note 13:1)Since an ESD protection circuit is connected betweenandinside the driver IC, becomes lower than VDD whenever VDD is ON and VCC is OFF.VCC / VBAT should be k
41、ept float (disable) when it is OFF.Power Pins (VDD, VCC, VBAT) can never be pulled to ground under any circumstance. VDD should not be power down before VCC / VBAT power down.VDDVCCVCC2)3)4)4.3Reset CircuitWhen RES# input is low, the chip is initialized with the following status:1.2.3.Display is OFF
42、 12864 Display ModeNormal segment and display data column and row address mapping (SEG0 mapped to column address 00h and COM0 mapped to row address 00h)Shift register data clear in serial interface Display start line is set at display RAM address 0 Column address counter is set at 0Normal scan direc
43、tion of the COM outputs Contrast control register is set at 7FhNormal display mode (Equivalent to A4h command).8.9.9VCC / VBAT offVDD offVCC/ VBAT onDisplay o4.4Actual Application ExampleCommand usage and explanation of an actual example4.4.1 VCC Supplied ExternallySe
44、t Display Offset 0xD3, 0x00VDD/VCC off StateSet Display Start Line 0x40Set Charge Pump 0x8D, 0x10Display Data SentSet Contrast Control 0x81, 0xCFIf the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function.http
45、:/20Set VCOMH Deselect Level 0xDB, 0x40Set Multiplex Ratio 0xA8, 0x1FSet Pre-Charge Period 0xD9, 0x1FSet Display Clock Divide Ratio/Oscillator Frequency 0xD5, 0x80Initial Settings ConfigurationSet COM Pins Hardware Configuration 0xDA, 0x00Set Display Off 0xAE(100ms Delay Recommend
46、ed)Set COM Output Scan Direction 0xC8Initialized State (Parameters as Default)Set Display On 0xAFSet Segment Re-Map 0Xa1Set RES# as High(3s Delay Minimum)Power up VCC & Stabilized (Delay Recommended)Power Stabilized (Delay Recommended)Power up VDD (RES# as Low State)Clear ScreenSet Entire Display On
47、/Off 0xA4Power down VCC (100ms DelayRecommended)Normal OperationVDD/VCC off StatePower down VDDNormal OperationSleep ModeSleep ModeNormal OperationExternal setting void sh1106()RES=0;delay(1000); RES=1;delay(1000);write_i(0xAE);/*display off*/write_i(0x00); write_i(0x10);/*set lower column address*/
48、*set higher column address*/write_i(0x00);/*set display start line*/write_i(0xB0);/*set page address*/21(100ms Delay Recommended)Power up VCC & Stabilized (Delay Recommended)Set Display On 0xAFSet Display Off 0xAEPower down VCCSet Display Off 0xAEwrite_i(0x81); write_i(0xCF)
49、;/*contract control*/*128*/write_i(0xA1);/*set segment remap*/write_i(0xA6);/*normal / reverse*/write_i(0xA8); write_i(0x1F);/*multiplex ratio*/*duty = 1/32*/write_i(0xC8);/*Com scan direction*/write_i(0xD3); write_i(0x00);/*set display offset*/write_i(0xD5); write_i(0x80);/*set osc division*/write_i(0xD9); write_i(0x1f);/*set pre-charge period*/write_i(0xDA); write_i(0x00);/*set COM pins*/write_i(0xdb); write_i(0x40);/*set vcomh*/write_i(0x8d); write_i(0x10);/*set charge pump enable*/write_i(0xAF);/*display ON*/void write_i(unsigned
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