外文翻譯---利用梳狀濾波器設(shè)計(jì)多速率濾波器

1、附錄AMultirate Filter Designs Using Comb FiltersSHUN1 CHU, MEMBER, IEEE, AND C. SIDNEY BURRUS, FELLOW, IEEEAbstract-Results on multistage multirate digital filter design indicate most of the stages can be designed to control aliasing with only slight regard for the passband which is controlled by a si

2、ngle stage compensator. Because of this, the aliasing controlling stages can be made very simple. This paper considers comb filter structures for decimators and interpolators in multistage structures. Design procedures are developed and examples shown that have a very low multiplication rate, very f

3、ew filter coefficients, low storage requirements, and a simple structure. IntroductionMultirate filters are members of a class which has different sampling rates in various stages of the filtering operation. This class of filters includes decimators, interpolators, and narrow-band low-pass filters i

4、mplemented with decimation, low-pass filtering, and interpolation. A multistage implementation of these filters has the sample rate changed in several steps where each step is a combined filtering and sample rate change operation. Crochiere and Rabiner 1-4 gave the standard multistage design method

5、for these filters which has each stage as a low-pass filter where one optimally chooses the decimation(or interpolation) ratio at each stage. A design method was presented in 5 which uses a different design criterion for each stage. It only requires that each stage have enough aliasing attenuation b

6、ut has no passband specifications.Using the design described in 5 with no passband specifications for each stage allows simple filters to be employed and gives a satisfactory frequency response. Let H(z) and D be the transfer function and decimation ratio of one stage of a multistage decimator. We p

7、ropose to design H(z) such that H(z) = f(z)g(zD). In the implementation, by the commutative rule 5, the transfer function g(zD) can be implemented at the lower rate (after decimation) as g(z). This implementation reduces the filter order, storage requirement, and the arithmetic.In this paper, to sim

8、plify arithmetic, further requirements are put on H(z) to allow only simple integer coefficients. This is feasible because there are no passband specifications on the frequency response. A cascade of comb filters is a particular case of these filters where the coefficients are only 1or-1 and, theref

9、ore, no multiplications are needed. Hogenauer 6 had also used a cascade of comb filters as a one-stage decimator or interpolator but with a limited frequency-response characteristic. Here the cascade of comb filters is used as one stage of a multistage multirate filter with just the right frequency

10、response. More comb filter structures are easily derived using the commutative rule.The FIR filter optimizing procedure used in this paper minimizes the Chebyshev norm of the approximation error and this is done using the Remez exchange algorithm. The IIR filter optimizing procedure used minimizes t

11、he lp error norm which approaches the Chebyshev norm when p is large.The New Multistage Multirate Digital Filter Design MethodIn a paper for limited range DFT computation using decimation 7, Cooley and Winograd pointed out that the passband response of a decimator can be neglected and be taken care

12、of after decimation. A multistage multirate digital filter design method which has no passband specification but using passband and stopband gain difference as an aliasing attenuation criterion for each stage is described in 5. The design method and equations used in that paper which are needed for

13、the comb filter structure are outlined in this section.The commutative rule introduced in 5 states that the filter structures in Fig. l(a) and (b) are equivalent. It means that a filter can commute with a rate changing switch provided that the filter has its transfer function changed from H(z) to H(

14、zD) or vice versa. Fig. 1 illustrates the case for decimation, and it is also true for interpolation. This rule is very useful in finding equivalent multirate filter structures and in deriving the transfer function of a multistage multirate filter.For example, Fig. 2(a) shows the filter structure of

15、 a multistage decimator where frk, k = 0, 1, . . . , K, is the sampling rate at each stage, and a one-stage equivalent decimator shown in Fig. 2(b) is found by repeatedly applying the commutative rule to move the latter stages forward. From the one-stage equivalent, it is clear that the transfer fun

16、ction and frequency response of the multistage decimator are (1)and (2)where D = D1D2 . . . Dk. The filtering function of Hc(z) does not involve a sampling rate change. It is used to compensate the passband frequency responses of previous stages, and hence, is called the compensator.Each decimation

17、stage is designed successively. At the time of designing the i th stage filter, all the previous i-1 stages have already been designed and the transfer functions known. The requirement on Hi(z) is that the composite frequency response HDi (w) of the first stage to the i th stage have enough aliasing

18、 attenuation where (3)referenced to fr(i- 1) = 1. Enough aliasing attenuation means that those frequency components which will alias into the passband at the current decimation process will have adequate attenuation with respect to the corresponding passband components. Fig. 3 shows an example frequ

19、ency response of HDi (w) which has an aliasing attenuation exceeding 60 dB. In Fig. 3, the passband response is repeated in the stopbands but has been moved down by 60dB. They are used as the atttenuation bounds for the stopbands. If the stopband response is below these bounds, it will have enough a

20、liasing attenuation.The overall filter frequency response is Hc(w)HDK( w/DK) referenced to frK = 1. The design of the compensator transfer function is to make the overall frequency response approximate one in the passband. The frequency-response error in the passband is (4)for To give attenuation to

21、 the first band that will alias to the transition band, it is required that for , or equivalently,for . The frequency bandcan be considered as the stopband of the compensator and the frequency-response error is (5)for . Equations (4) and (5) can be combined to give an error function of (6)and , whic

22、h is the error weighting of the stopband with respect to the passband. The optimal HC(z) is obtained by minimizing the error norm |E| of (6). The solution depends on the definition of the norm.The multistage interpolator design is the same as the multistage decimator design but with the filter struc

23、ture reversed.The multirate low-pass filter structure is a multistage decimator followed by a multistage interpolator and, in between, there is a compensator operated at the lowest sampling rate with no rate change. If the aliasing attenuation requirement for the decimator is the same as the imaging

24、 attenuation requirement for the interpolator, the design of the multistage decimator part and that of the interpolator part can be the same. The overall frequency response is (9)where (10)Hi(w) is the frequency response of each decimator (or interpolator) stage and “mod” means a modulo operation. T

25、he frequency response of (9) is the output baseband response due to the whole input in terms of the input frequency as in the case of decimator. It is also the output response due to the baseband input in terms of the output frequency as in the case of interpolator.In the multirate low-pass filter d

26、esign, each decimation or interpolation stage design is the same as that in a multistage decimator design. The compensator is to give the desired frequency response in the baseband where the baseband is the frequency band that never aliases. Its design is to minimize |E| of (6) with the weighting an

27、d desired functions given byIn the case where there is not a full decimation, i.e., referenced to frK =1, there is a stopband for the compensator design. The transition region can also be viewed as the stopband of the compensator with requirement to limit the transition region aliasing.Comb filter s

28、tructures as decimators or interpolatorsThis section exploits some simple efficient filter structures which can be used in the decimation or interpolation stages of the multistage multirate filter. The requirement on these filters is that they have enough aliasing attenuation such as shown in the ex

29、ample frequency response of Fig. 3. Since the operation and structure of an interpolator are the duals of a decimator, most explanation in this section will be for the decimator case only. Extension to the interpolator case is simple and straightforward.Let H(z) and D be the transfer function and de

30、cimation ratio for one stage of a multistage decimator. The filter structure is shown in Fig. 4(a). One method to make the filter efficient is to design H(z) such that it has the form (13)and the factor g(zD) can be implemented at the lower rate as g(z) as shown in Fig. 4(b). By this implementation,

31、 a high-order H(z) can be implemented at the low rate as a low-order filter. The arithmetic rate, number of filter coefficients, and number of registers used are, therefore, reduced. Further improvement in arithmetic rate can be achieved by simplifying the filter coefficients of f(z) and g(z) in (13

32、) to be simple integers and using additions instead of multiplications.One example of this kind of filter is a cascade of comb filters. We will show some filter structures first and discuss the filter operations in the next section.A comb filter of length D is an FIR filter with all D coefficients e

33、qual to one. The transfer function of this comb filter is (14)A comb filter with length D followed by decimation with a ratio D is shown in Fig. 5(a). The commutative rule can be applied to the numerator to get the structure of Fig. 5(b).The new comb decimator structure needs two registers, one addi

34、tion at the high rate, and one addition at the low rate regardless of the decimation ratio D, i.e., the filter length.The comb interpolator structure is shown in Fig. 5(c). It is the reverse of the decimator structure with the sampler replaced by a zero padder. The realization of the transfer functi

35、on l/(1-z-l) is an accumulator. Since the accumulator has D-1 out of every D inputs as zero, it can take advantage of this to accumulate only once for every D inputs. This is equivalent to operating the accumulator at the lower rate and each output is used D times at the higher rate. When the accumu

36、lator is moved to the lower rate stage, it cancels the (1- z-1) section and leaves a sample and hold switch alone as a comb interpolator, as shown in Fig. 5(d). To distinguish the sample and hold switch from the sampling switch of the decimator and to indicate the sampling rate increase after a samp

37、le and hold switch, the sample and hold switch is represented by a normally closed switch. The commutative rule can be applied across a sample and hold switch since it applies when there is a rate change.A single comb filter generally will not give enough stopband attenuation, however, cascaded comb

38、 filters can often meet requirements. Cascading M length-D comb filters will have a transfer function (15)Fig. 6(a) shows a comb decimator with M length-D comb filters in cascade where all the: accumulators are cascaded before the sampler and all the (1-z-1) sections are cascaded after the sampler.

39、When the reverse of the structure of Fig. 6(a) is used as an interpolator, one of the comb filters can be realized as a sample and hold switch. This interpolator structure is shown in Fig. 6(b). In a multistage decimator design, a latter stage usually needs more comb filters in cascade to give adequ

40、ate stopband attenuation because of the relatively wider stopband(s) and narrower transition region. Fig. 7(a) shows an equivalent three-stage comb decimator structure. The first, second, and the third stages have three, four, and five length-D1, length-D2, and length-D3, comb filters in cascade, re

41、spectively. Fig. 7(b) shows the corresponding equivalent comb interpolator structure using sample and hold switches. These equivalent structures are obtained by applying the commutative rule. Because of the propagation of the (l-z-l) section, some (l/(1-z-l) sections and (l- z-1)sections have cancel

42、ed each other. This multistage comb filter structure is called a merged structure.附錄B利用梳狀濾波器設(shè)計(jì)多速率濾波器摘要-多級(jí)多速率數(shù)字濾波器設(shè)計(jì)成果表明大多數(shù)階段可以被用來控制抗鋸齒，只有輕微的通頻帶由一個(gè)單一的階段補(bǔ)償。正因?yàn)槿绱?，抗鋸齒控制階段可以很簡(jiǎn)單。本文認(rèn)為，梳狀濾波器結(jié)構(gòu)可以設(shè)計(jì)成decimators和interpolators多級(jí)結(jié)構(gòu)。設(shè)計(jì)程序的開發(fā)和事例表明，有繁殖率非常低，只有極少數(shù)濾波器系數(shù)，低存儲(chǔ)需求，以及簡(jiǎn)單的結(jié)構(gòu)。緒論多速率濾波器的成員，其中一類在各個(gè)階段的過濾操作具有不同的采樣率。

43、這一級(jí)別的過濾器包括decimators，interpolators，和窄帶低通濾波器實(shí)施抽取，低通濾波和插值。一個(gè)多執(zhí)行這些過濾器的采樣率改變了若干步驟，每個(gè)步驟是合并過濾和采樣率的變化作業(yè)。Crochiere和Rabiner 1-4的標(biāo)準(zhǔn)多了設(shè)計(jì)方法，這些過濾器而每個(gè)階段作為一個(gè)低通濾波器在一個(gè)最佳的選擇抽?。ɑ騼?nèi)插法）的比例在每一階段。一種設(shè)計(jì)方法是在5采用不同的設(shè)計(jì)標(biāo)準(zhǔn)，每一個(gè)階段。它不僅要求每個(gè)階段有足夠的抗鋸齒衰減，但沒有通規(guī)格。使用中所描述的設(shè)計(jì)5沒有通規(guī)格的每一個(gè)階段可以簡(jiǎn)單的過濾器，采用并給出了一個(gè)令人滿意的頻率響應(yīng)。設(shè)H(z)和D是傳遞函數(shù)和抽取一個(gè)階段比一個(gè)多decima

44、tor。我們建議設(shè)計(jì)的H(z)等認(rèn)為H(z)= F(z)*g(zD)。在執(zhí)行時(shí)，由交換規(guī)則5，轉(zhuǎn)移函數(shù)g(zD)可以實(shí)現(xiàn)在較低的利率（后抽?。間(z)的。這降低了過濾器執(zhí)行命令，存儲(chǔ)要求，算術(shù)。本文簡(jiǎn)化算法，提出了進(jìn)一步要求的H(z)的，只允許簡(jiǎn)單的整數(shù)系數(shù)。這是可行的，因?yàn)闆]有通規(guī)格的頻率響應(yīng)。一連串梳狀濾波器是一種特定情況下，這些過濾器的系數(shù)只有1或者-1 ，因此，沒有乘法是必要的。 Hogenauer 6也采用了級(jí)聯(lián)梳狀濾波器作為一期decimator或插值，但有限的頻率響應(yīng)特性。在這里，級(jí)聯(lián)梳狀濾波器是用來作為一個(gè)階段的多級(jí)多速率濾波器的權(quán)利與公正的頻率響應(yīng)。梳狀濾波器結(jié)構(gòu)更容易產(chǎn)生

45、利用交換規(guī)則。FIR濾波器的優(yōu)化程序，本文件中使用的切比雪夫準(zhǔn)則最小的逼近誤差，這是使用雷米茲交換算法。IIR濾波器的優(yōu)化程序，最大限度地減少使用規(guī)范低壓錯(cuò)誤做法的切比雪夫時(shí)， p是規(guī)范。新型多級(jí)多速率數(shù)字濾波器的設(shè)計(jì)方法 在一份文件中對(duì)有限范圍的DFT計(jì)算使用抽取7 ，利和維諾格拉德指出通響應(yīng)decimator可以忽略不計(jì)，并得到照顧后抽取。多級(jí)多速率數(shù)字濾波器的設(shè)計(jì)方法，沒有通規(guī)范，但使用通和阻增益差異作為走樣衰減標(biāo)準(zhǔn)的每個(gè)階段中所描述5 。的設(shè)計(jì)方法和公式中所用文件，該文件所需要的梳狀濾波器結(jié)構(gòu)本節(jié)概述。 交換規(guī)則的介紹 5 指出，過濾器結(jié)構(gòu)圖。1(a)和(b)是相同的。這意味著，一個(gè)過

46、濾器可以改判率變化與交換機(jī)的過濾提供了其傳遞函數(shù)的變化從H (z)至H(zD)，反之亦然。圖1顯示的情況抽取，也是真正的插值。這條規(guī)則是非常有用的在尋找相當(dāng)于多過濾器的結(jié)構(gòu)和所產(chǎn)生的傳遞函數(shù)的多級(jí)多速率濾波器。例如，圖2(a)顯示了過濾器結(jié)構(gòu)的多級(jí)decimator。圖中,frk= 0，1，K，是采樣率在每一個(gè)階段，和一階段相當(dāng)于decimator顯示圖2(b)發(fā)現(xiàn)的反復(fù)運(yùn)用移動(dòng)交換規(guī)則后期向前發(fā)展。從一期當(dāng)量，可以清楚地看到，傳遞函數(shù)和頻率響應(yīng)的是多級(jí)decimator。 (1) (2)其中D = D1,D2, Dk。過濾功能HC(z)的不涉及采樣率的變化。它是用來補(bǔ)償通頻率響應(yīng)前階段，因此

47、，所謂的補(bǔ)償。每個(gè)階段的目的是抽取先后。當(dāng)時(shí)設(shè)計(jì)的I階段過濾器，所有以前的i-1階段已經(jīng)設(shè)計(jì)和傳遞函數(shù)眾所周知的。要求高科技Hi(z)的是，在綜合頻率響應(yīng)HDi(W)的第一階段至I次階段有足夠的混淆在衰減 (3)參照fr（i-1）= 1 。足夠的抗鋸齒衰減意味著這些高頻成分將別名納入通目前抽取過程將有足夠的衰減對(duì)相應(yīng)的通元件。圖3顯示一個(gè)例子頻率響應(yīng)的發(fā)展行動(dòng)HDi(w)，其中有一個(gè)別名衰減超過60分貝。圖3通響應(yīng)中重復(fù)stopbands，但已被移至下跌六零分貝。它們被用來作為atttenuation和stopbands的邊界。如果阻響應(yīng)低于這些跨越，它將有足夠的抗鋸齒衰減。 總過濾器的頻率響

48、應(yīng)是Hc(w)HDK( w/DK)。參照frK = 1 。設(shè)計(jì)補(bǔ)償傳遞函數(shù)是使總的頻率響應(yīng)近似一個(gè)在通頻帶。頻率響應(yīng)誤差是 (4)對(duì)于為了讓第一波段衰減，化名過渡帶，要求對(duì)于當(dāng)于對(duì)于。頻帶可視為阻的補(bǔ)償和頻率響應(yīng)誤差 (5)對(duì)于 方程(4)和(5)可以合并成一個(gè)錯(cuò)誤功能 (6) 。多級(jí)插補(bǔ)設(shè)計(jì)是一樣的設(shè)計(jì)，但多decimator的過濾器結(jié)構(gòu)扭轉(zhuǎn)。在多低通濾波器的結(jié)構(gòu)是一個(gè)多decimator隨后多插值，并在之間，有一種補(bǔ)償操作的最低采樣率沒有變動(dòng)。如果走樣衰減要求decimator是一樣的成像衰減要求插補(bǔ)，設(shè)計(jì)的多級(jí)decimator的一部分，并且部分的插值可以是相同的?？偟念l率響應(yīng)是 (9)

49、 (10) Hi(w)是頻率響應(yīng)每個(gè)decimator （或插值）的階段， “絕對(duì)值”是指模作業(yè)。頻率響應(yīng)的(9)是輸出的基帶響應(yīng)由于整個(gè)投入方面的輸入頻率，如decimator。這也是輸出響應(yīng)由于基投入方面的輸出頻率，如插值。在多低通濾波器的設(shè)計(jì)，每個(gè)抽取或插值舞臺(tái)設(shè)計(jì)是一樣的，在一個(gè)多decimator設(shè)計(jì)。補(bǔ)償是使所期望的頻率響應(yīng)的基帶的基帶是頻段從未別名。其設(shè)計(jì)是為了盡量減少|(zhì) |E| |的(6)的加權(quán)和期望的職能。在沒有整數(shù)倍取樣率降低的情況下，不存在一個(gè)完整的抽取，即參照frK = 1 ，有阻的補(bǔ)償設(shè)計(jì)。過渡地區(qū)也可以被視為阻的補(bǔ)償要求，以限制過渡區(qū)走樣。梳狀濾波器結(jié)構(gòu)用于deci

50、mators或細(xì)分器 本節(jié)利用一些簡(jiǎn)單有效的過濾器結(jié)構(gòu)，用于抽取或內(nèi)插階段的多級(jí)多速率濾波器。對(duì)這些過濾器的要求是，它們有足夠的抗鋸齒衰減，如范例中頻率響應(yīng)圖所示。由于操作和結(jié)構(gòu)插值是decimator的雙排氣管系統(tǒng)，本節(jié)的大多數(shù)解釋將只是decimator的案例。插值的擴(kuò)展案例將是很簡(jiǎn)單和直接的。 設(shè)H(z)和D是一個(gè)多級(jí)decimator的做為一個(gè)階段的傳遞函數(shù)和抽取比例。該過濾器的結(jié)構(gòu)如圖所示。一種方法是制作高效的過濾器將H(z)設(shè)計(jì)成如下形式：系數(shù)可以以低速率應(yīng)用于，如圖4所示。根據(jù)這一實(shí)施，一個(gè)高階的H(z)可以以低速率應(yīng)用于低階的濾波器。因此，算術(shù)率，濾波器系數(shù)和一些寄存器的使用會(huì)隨之減少。通過簡(jiǎn)化公式(13)中的濾波器系數(shù)f(z)和g(z)，可以達(dá)到進(jìn)一步改善算術(shù)率的目的。使用簡(jiǎn)單的整數(shù)和補(bǔ)充替代乘法器。這種濾波器的一個(gè)例子是一種級(jí)聯(lián)式梳狀濾波器。首先我們展示一些濾波器的結(jié)構(gòu)，在下一章討論濾波器的操作。梳狀濾波器的長(zhǎng)度D是一個(gè)FIR濾波器的所有D系數(shù)的和。梳狀濾波器的傳遞函數(shù)如下： 梳狀濾波器的長(zhǎng)度D，其次是抽取如圖5(