874381030一個可用于PET和SPECT鏡像的高速率的USB數據采集系統(tǒng)的應用中英文翻譯

1、我們在以靈活高效的usb數據采集系統(tǒng)的研制伽馬射線成像探測器方面取得了實質性的進展。該硬件由安裝在usb接口的載波板上的16通道數據采集模塊組成。一，二，和四模塊單元是經過該良的。 usb數據采集率增加至超過30 mb/秒并且一個16通道結構可以達到觸發(fā)率超過700千赫。該設備還裝備了幾個高分辨率單伽馬射線探測器和兩個高效率pet探測器。該探測器采用hamamatsu h8500，h9500 ，burle 85002-800 pspmts等多種配置。同步額外采集單元擴展了系統(tǒng)通道。一個java客戶機-服務器系統(tǒng)被改良后通過超過千兆的以太網連接到采集計算機上。一個kmax工具是用來在采集數據時處

2、理和顯示圖像的。 c和java的功能發(fā)展可以幫助開發(fā)和診斷。i.簡介一種新型高速的以usb為基礎的數據采集系統(tǒng)先前被加工后裝備在由杰弗遜實驗室檢測和影像小組1設計的伽瑪射線成像探測器上。它成功地展示了多種探測器和結構。即便在保持很高的觸發(fā)利率的前提下可擴展性從16到128通道都可以成功完成。我們還成功地裝備了幾個配有hamamatsu h8500和h9500位置靈敏光電倍增激光器（pspmts）的低速率高分辨率單伽馬射線的探測器。我們還裝備了一臺配有h8500 pspmts的pem/pet探測器和一臺配有burle 85002-800 pspmts的心臟pet探測器。我們在數據采集和處理架構放

3、面取得了重大的實質性進展。為了能高速率應用，我們開發(fā)了一個java客戶機-服務器系統(tǒng)。對于低速率時，為了能實時影像處理，我們開發(fā)了kmax jave擴展部分來與數據采集單位直接通信。c和java的功效發(fā)展有助于數據采集系統(tǒng)硬件的開發(fā)和診斷。我們成功地裝備了不同的pspmts，不同閃爍器，不同的pspmt電阻耦合器，這些都是使用相同的數據采集結構。原始圖像由所有的裝配有這樣系統(tǒng)的探測器所展示。該數據采集系統(tǒng)可由兩個同步64通道單元擴展為128通道，并且在軟件上融合了實時追蹤系統(tǒng)。這種技術將使我們能夠將其擴大到任意數目單位。它還將使我們能夠在實時同步數據采集系統(tǒng)中囊括不包含ad轉換的裝置，比如時間

4、數字轉換器（tdcs ） ，數字輸入/輸出接口等等。他們各自的實時追蹤實例將合并成一個單一的混合實例結構。ii.硬件每個數據采集單元的16通道數據采集模塊通過高速usb接口安裝在一個載板上。每個通道是一個獨立的采集單元，該單元由傳統(tǒng)的模擬脈沖加工，fpga模擬控制，和fpga數字處理組成。經過數據采集與處理，通道數據組合成實例數據塊以便載板將其讀取。每個實例將被標注上一個10納秒的時間標簽。該時間標簽是用來通過幾個數據采集單位重組實例分布的。它也可以被用來做動態(tài)研究。a. 載板該64通道載板可以承受多達四組16通道的模塊。它從模塊中讀取實例，并組合他們以便由usb主機電腦讀取。16和32通道單

5、位有一個和兩個模塊，獨立的，但在其他方面完全相同。這樣的64通道單位的體系結構由圖1所示。64，32和16通道單位的成品封裝照片分別如圖2-4所示。該載板將時間信號在數據采集模塊和數據采集單位之間進行分配。它可以看作為時間的掌管者，也可以看作是服從者。作為掌管者，它提供了自己和外部單位的時鐘和復位信號。作為一個服從者，它接收外部機構的時間信號和并將時間信號轉播給其他的服從者。載板將提供公用設備，比如一個可編程脈沖發(fā)生器，觸發(fā)計數器，速率計數器，用戶可訪問電可擦除只讀存儲器。它有兩個8位供電的雙向ttl輸入/輸出端口，這兩端口個可與外部設備通信，如電平轉換器，模數轉換器，數模轉換器，等等。其中一

6、個端口通常被設置為輸入一個外部ttl觸發(fā)和輸出一個積分門監(jiān)控。該系統(tǒng)通常被設置為執(zhí)行全部觸發(fā)的同步采集工作。采集器是被一個載板上的信號觸發(fā)的。觸發(fā)源可以是任何一個輸入通道，一個外部的ttl信號，或一個內部脈沖發(fā)生器。該觸發(fā)由一個不可重復觸發(fā)的脈沖承擔，然后同時轉發(fā)給所有模塊。 當所有模塊報告接收到該觸發(fā)后，載板指示這些模塊接收實例。否則，實例將被清除。由于使用了手動觸發(fā)，靈活實例緩沖，和觸發(fā)脈沖加工，我們可以在任何觸發(fā)率和模式下完美地組合實例。b. 數據采集模塊圖5描述了16通道數據采集模塊其中的一個頻道。模擬部分包括一個具有領先地位的附帶12位入端數模轉換器的鑒識器，一條8階50納秒模擬延遲

7、線路，一個附帶12位輸入偏差數模轉換器的電壓門控積分器，以及一個12位的2.5兆赫可觸發(fā)特別模數轉換器。所有模擬功能是被fpga通過單一通道或在通道之間控制的，fpga允許可編程模擬控制結構。fpga的數字化處理過程可以對單一通道或實例主要部分本身執(zhí)行。信道處理可以包括鑒識窗口控制，分析結論讀出，偏差和補償校正，脈寬測量，柱狀圖等。實例處理可以包括實例組合，計算，緩沖，總和管理，鑒識窗口，禁止，等等。實用功能可以包括可編程觸發(fā)模式，動態(tài)偏移校正等。實例可以被一個數字計算機上的高分辨率的實時記錄設備紀錄。目前實例組合通常采用10納秒實時紀錄，而5納秒也已經成功地通過試驗，不僅如此，更高分辨率的實

8、時紀錄也是完全可能的。在目前的配置中，數字處理系統(tǒng)包括零點抑制，可編程觸發(fā)源，和40位10納秒觸發(fā)實時紀錄器。所有的通道都是同時觸發(fā)和獲取數據的。原始和共同的觸發(fā)器以及觸發(fā)利率都要依靠載板。如果不需要積分的話，那么積分器就失效了，而且模數轉換器會在編程選通脈沖寬度后取樣。該選通脈沖因此可以作為一個可編程的取樣延遲。由于硬件通常是優(yōu)化組合的，那么即使是一個小小的硬件改動（每個通道的任何一個電阻）都需要優(yōu)化取樣。c.可測量性該數據采集系統(tǒng)具有高度的可擴展性。一個需要很少通道的系統(tǒng)可以通過一個數據采集單元和一個讀計算機來達到一個很高的觸發(fā)率。對于許多的高觸發(fā)率通道來說，幾個單元可以通過一個時間分配系

9、統(tǒng)而同時工作并且每個單元會被分派到它自己的采集計算機。通過一些單元或計算機分配的實例會利用軟件通過實時紀錄系統(tǒng)重新組合。d觸發(fā)率對于磁盤的持續(xù)usb數據傳輸速率可以增至每秒30兆字節(jié)。 這樣可以使16通道的持續(xù)觸發(fā)率增加至超過700千赫，32個頻道增加至超過350千赫，64頻道增加至超過175千赫。觸發(fā)率超過125千赫的情況下已達到128通道pet探測器。由于頻率主要是受usb帶寬的限制， 那么零點抑制將允許觸發(fā)率上升到通常所允許的最高為1兆赫的轉化率。最高頻率是由積分，取樣和存儲所需時間總和所決定的。采用流水線技術，更高頻率是有可能實現的，但目前此技術尚未落實。iii軟件我們開發(fā)了幾個采集與

10、處理的結構。在所有情況下，高功效的核心采集功能在c語言環(huán)境下完成的。而應用中的具體任務是通過java語言編寫的。我們開發(fā)了三個不同的軟件平臺。kmax是用于探測器的開發(fā)和低頻率實時成像。一個java客戶機/服務器系統(tǒng)是為分布式高速率多單元系統(tǒng)而開發(fā)。還有一個綜合了c和java功能的平臺是為數據采集系統(tǒng)的發(fā)展和診斷而設計的。a.kmaxjava到kmax的延展部分的開發(fā)是為了能與數據采集系統(tǒng)硬件中的kmax銜接。kmax采集原始數據， 計算質心，校正，并實時顯示原始的和校正后的圖像。我們實現了64通道50千赫觸發(fā)率。kmax是一個很方便的用于開發(fā)和描述適中觸發(fā)率的探測器的工具。這種結構如圖六所示

11、。b.java一個java客戶機/服務器系統(tǒng)是為需求高頻率多渠道的探測器而開發(fā)的。每個數據采集單元都連接到一個數據采集電腦。該數據采集電腦（服務器）通過千兆以太網連接到實例源 （客戶）計算機，這些計算機都從服務器上融合了單獨的實時記錄實例?？蛻舳丝刂扑蟹掌鞴δ埽缬布渲煤筒杉瘏?。圖12描述了這樣一個pet應用結構。該數據采集服務器可以在采集期間或者或者采集后進行圖像校正。而處理過的數據發(fā)送給客戶端，原始數據都存儲在服務器上，如果需要的話也可以發(fā)送到客戶端。合并后的客戶數據發(fā)送給計算機進行圖像重建。我們希望數據采集，處理和在各個系統(tǒng)之間傳輸可以同時發(fā)生，并且盡可能最小地影響采集速率?？蛻?/p>

12、機-服務器軟件可以存儲在單一的計算機上。這樣可以在觸發(fā)率低時由一臺電腦來管理多個附加的數據采集單元。c.c和java部分一個由c和java合成部分是為數據采集系統(tǒng)的硬件而開發(fā)的。這些執(zhí)行了簡單的采集，硬件和驅動功能測量，分析實例緩沖器，并檢測了所有的硬件功能。 這些都用于硬件診斷和原始數據采集。附錄bimplementation of a high-rate usb dataacquisition system for pet and spect imagingabstractwe made substantial progress with a flexible high-rate usb

13、data acquisition system developed for gamma-ray imaging detectors. hardware consists of 16-channel data acquisition modules installed on usb carrier boards. one， two， and four-module units were developed. usb data rate was increased to over 30 mb/s and a 16-channel configuration achieved a trigger r

14、ate of over 700 khz. several high-resolution single-gamma detectors and two high-rate pet detectors were instrumented. the detectors use various configurations of hamamatsu h8500， h9500， and burle 85002-800 pspmts. system channels were expanded by synchronizing additional acquisition units. a java c

15、lient-server system was developed to link acquisition computers over gigabit ethernet. a kmax tool was developed to process and display images during acquisition. c and java utilities were developed to assist development and diagnostics.i. introductiona new high-speed usb-based data acquisition syst

16、em was previously developed to instrument the gamma-ray imaging detectors designed by the jefferson lab detector and imaging group 1. it was successfully demonstrated on a variety of detectors and configurations. scalability from 16 to 128 channels was achieved while preserving high trigger rates. w

17、e successfully instrumented several low-rate high-resolution single-gamma detectors that use hamamatsu h8500 and h9500 position-sensitive photomultipliers (pspmts). we also instrumented a high-rate pem/pet detector that uses h8500 pspmts and a cardiac pet detector with burle 85002-800 pspmts.we made

18、 substantial progress with the daq acquisition and processing architecture. for high-rate applications， we developed a java client-server system. for low-rate， real-time imaging， we developed kmax java extensions to communicate directly with daq units. c and java utilities were developed to assist d

19、aq hardware development and diagnostics.we successfully instrumented different pspmts， different scintillators， and different pspmt resistive coupling， with the same daq configuration. raw images from all detectors instrumented to date with this system are presented.the daq system was expanded to 12

20、8 channels using two synchronized 64-channel units and merged time-stamped events in software. this technique will allow us to expand to an arbitrary number of units. it will also allow us to include non-adc devices such as time-to-digital converters (tdcs)， digital 1/0， etc. in the time-synchronize

21、d daq system. their respective time-stamped events would be merged into a single hybrid event structure.ii. hardwareeach daq unit consists of 16-channel daq modules installed on a carrier board with a high-speed usb interface. each channel is an independent acquisition unit consisting of traditional

22、 analog pulse processing， fpga analog control， and fpga digital processing. after sampling and processing， channel data are assembled into event blocks for readout by the carrier board. each event is tagged with a 10ns time stamp. the time stamp is used to reassemble events distributed across severa

23、l daq units. it can also be used for dynamic studies.a. carrier boardthe 64-channel carrier board accepts up to four 16-channel modules. it reads events from the modules and assembles them for readout by the usb host computer. the 16 and 32 channel units have one and two modules， respectively but ar

24、e otherwise identical. the architecture of the 64-channel unit is show in fig. 1. photographs of the production 64， 32， and 16 channel units with enclosures are shown in fig. 2-4 respectively.the carrier provides timing distribution to the daq modules and between daq units. it can act as a timing ma

25、ster or slave. as a master， it provides clock and reset to itself and to external units. as a slave， it receives external timing and retransmits the timing to other slaves.the carrier provides utilities such as a programmable pulse generator， trigger counters， rate counters， and user-accessible eepr

26、om. it has two 8-bit powered ttl i/0 ports for bidirectional communication with external devices such as level translators， adcs， dacs， etc. one port is currently configured to input an external ttl trigger and output an integrator gate monitor.the system is currently configured to perform simultane

27、ous acquisition on a global trigger. acquisition is triggered by a signal from the carrier board. the trigger source can be any input channel， an external ttl signal， or the internal pulse generator. the trigger is processed by a non-retriggerable pulse stretcher then transmitted to all modules simu

28、ltaneously. when all modules report that the trigger was accepted， the carrier instructs the modules to accept the event. otherwise， the event is cleared. by using trigger handshaking， flexible event buffering， and trigger pulse processing， events can be assembled flawlessly for any trigger rate or

29、pattern.b. daq moduleone channel of the 16-channel daq module is described in fig. 5. the analog portion consists of a leading-edge discriminator with 12-bit threshold dac， an 8-stage 50ns analog delay line， a gated voltage integrator with 12-bit input offset dac， and a 12-bit 2.5 mhz triggerable sa

30、r adc. all analog functions are controlled through the fpga which permits programmable analog control configurations within a channel and between channels.fpga digital processing can be performed on a channel or event basis. channel processing may include charge window discrimination， sparsified rea

31、dout， offset and gain correction， pulse width measurement， histogramming， etc. event processing may include event assembly， counting， buffering， charge sum， window discrimination， veto， etc. utility functions may include programmable trigger pattern， dynamic offset correction， etc.events can be tagg

32、ed with a high-resolution time stamp derived from a digital counter. while a 10ns time stamp is currently used for event assembly， 5ns has been successfully tested and higher resolutions are possible. in the present configuration， digital processing includes zero-suppression， programmable trigger so

33、urce， and a 40-bit 10ns trigger time stamp. all channels are triggered and acquired simultaneously. raw and accepted triggers and trigger rates are counted on the carrier board. if integration is not required， the integrator can be disabled and the adc will sample after the programmed gate width. th

34、e gate width would therefore serve as a programmable sampling delay. since the hardware is normally optimized for integration， a small hardware change (one resistor per channel) is required to optimized for sampling.c. scalabilitythe dac system is highly scalable. a system requiring few channels can

35、 achieve a high trigger rate with one daq unit and one readout computer. for many high-rate channels several units can be synchronized through a common timing distribution system and each unit assigned its own acquisition computer. events distributed across several units/computers are reassembled in

36、 software using event time stamps.d. trigger ratessustained usb data rate to disk was increased to 30 mb/s. this increased sustained trigger rates to over 700 khz for 16 channels， over 350 khz for 32 channels， and over 175 khz for 64 channels. trigger rates exceeding 125 khz have been achieved for a

37、 128-channel pet detector.since the rate is primarily limited by usb bandwidth， zero-suppression would permit trigger rates up to the currently allowable maximum conversion rate of 1 mhz. the maximum rate is determined by the sum of time required to perform integration， sampling， and storage. higher

38、 rates are possible using pipelining techniques not currently implemented.iii. softwareseveral acquisition and processing configurations were developed. in all cases， high-performance core acquisition functions are performed in c. application specific tasks are performed in java. three different sof

39、tware platforms were developed. kmax is used for detector development and low-rate real-time imaging. a java client/server system was developed for distributed high-rate multi-unit systems. a collection of c and java utilities were developed for daq development and diagnostics.a. kmaxjava extensions

40、 to kmax 2 were developed to interface kmax to the daq hardware. kmax acquires raw data， calculates centroids， applies corrections， and displays raw and corrected images in real time. we achieved trigger rates up to 50 khz for 64 channels. kmax is a convenient tool for development and characterization of detectors at a moderate trigger rate. fig. 6 diagrams this architecture.b. javaa java client/server