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1、江蘇科技大學(xué)電子信息學(xué)院數(shù)字電子技術(shù)實(shí)驗(yàn)課 程 設(shè) 計(jì) 報 告指導(dǎo)老師 : 李紹鵬學(xué) 院: 電子信息學(xué)院班 級: 11403022學(xué)生(學(xué)號): 孫磊(1140302219)目 錄課題一 數(shù)字電子鐘課題二 交通燈控制邏輯電路設(shè)計(jì)(注:由于Quartusii 9.0不支持中文輸入,但支持中文復(fù)制,所以以下代碼文字說明均為后期制作)課題一 數(shù)字電子鐘任務(wù):用文本法設(shè)計(jì)一個能顯示時、分、秒的數(shù)字電子鐘要求:1.設(shè)計(jì)由20mhz有源晶振電路產(chǎn)生標(biāo)準(zhǔn)信號的單元電路; 2.時為0023六十進(jìn)制計(jì)數(shù)器,分、秒為0059六十進(jìn)制計(jì)數(shù)器; 3.能夠顯示出時、分、秒; 4.具有清零,調(diào)節(jié)分鐘的功能; 5.模擬鐘擺
2、功能; 6.具有整點(diǎn)報時功能,整點(diǎn)報時的同時聲響電路發(fā)出叫聲; 7.對時、分、秒單元電路進(jìn)行仿真并記錄。本文利用Verilog HDL語言自頂向下的設(shè)計(jì)方法設(shè)計(jì)多功能數(shù)字鐘,并通過仿真和下載,實(shí)現(xiàn)其基本功能。1 頂層文件 module top(CLK,SET,EN,RE, /CLK=20M HZ SET調(diào)節(jié)分鐘LED_5,OUT,QH1,QH0,QM1,QM0,QS1,QS0); input CLK,SET,RE,EN; output OUT; /OUT報時 output 3:0 QH1,QH0,QM1,QM0,QS1,QS0; output 4:0 LED_5; wire clk1khz,c
3、lk250hz,clk1hz,m1,b2,b3,b4; wire 5:0 s1,m2,h3;/-分頻- Div u1(CLK,EN,RE,14'd6384,clk1khz); Div u2(clk1khz,EN,RE,14'd16382,clk250hz); Div u3(clk1khz,EN,RE,14'd15884,clk1hz); /-秒s1計(jì)數(shù) ,產(chǎn)生分進(jìn)位m1- counter u4(clk1hz,EN,RE,6'd59,m1,s1); BCDturn u5(s1,QS1,QS0); /-分m2計(jì)數(shù),產(chǎn)生時進(jìn)位b3- counter u6(b2,EN,
4、RE,6'd59,b3,m2); BCDturn u7(m2,QM1,QM0); /-時h3計(jì)數(shù),產(chǎn)生進(jìn)位b4- counter u8(b3,EN,RE,6'd23,b4,h3); BCDturn u9(h3,QH1,QH0); /-模擬鐘擺- led_ u10(CLK,LED_5); /-整點(diǎn)報時- baoshi u11(QM1,QM0,QS1,QS0,OUT);/-b2調(diào)節(jié)分鐘- assign b2=SET?SET:m1; endmodule2 分頻模塊module Div(CLK,EN,RE,d,Q); /給d賦初始值 input CLK,EN,RE; input 13:
5、0 d; output Q; reg FULL,Q; reg 13:0 c; always(posedge CLK ) begin if(RE) begin c<=d; FULL<=0; end else if(EN) begin if(c=141'b1) begin c<=d; FULL<=1; end else begin c<=c+1; FULL<=0; end end end always(posedge FULL) /得到占空比50%的分頻信號 begin Q<=Q; endendmodule3 計(jì)數(shù)模塊module counter(
6、CLK,EN,RE,C,FULL,Q); /EN=1時進(jìn)行計(jì)數(shù),RE=1時清零 input CLK,EN,RE; /C表示N進(jìn)制,Q為計(jì)數(shù)結(jié)果 input 5:0 C; output 5:0Q; output FULL; reg 5:0Q; reg FULL; always(posedge CLK) begin if(RE) begin Q<=0; FULL<=0; end else if(EN) begin if(Q=C) begin Q<=0; FULL<=1; end else begin Q<=Q+1; FULL<=0; end end end en
7、dmodule4 BCD譯碼模塊/由于計(jì)數(shù)使用的二進(jìn)制,在輸出時便需要進(jìn)行譯碼,轉(zhuǎn)換成大眾所熟悉的十進(jìn)制表示module BCDturn(indec,qh,ql); input 5:0 indec; output 3:0 qh,ql; reg 3:0 qh,ql; always(indec) begin case(indec)6'd0:begin qh3:0<='b0000;ql3:0<='b0000;end6'd1:begin qh3:0<='b0000;ql3:0<='b0001;end6'd2:begin q
8、h3:0<='b0000;ql3:0<='b0010;end6'd3:begin qh3:0<='b0000;ql3:0<='b0011;end6'd4:begin qh3:0<='b0000;ql3:0<='b0100;end6'd5:begin qh3:0<='b0000;ql3:0<='b0101;end6'd6:begin qh3:0<='b0000;ql3:0<='b0110;end6'd7:begin q
9、h3:0<='b0000;ql3:0<='b0111;end6'd8:begin qh3:0<='b0000;ql3:0<='b1000;end6'd9:begin qh3:0<='b0000;ql3:0<='b1001;end6'd10:begin qh3:0<='b0001;ql3:0<='b0000;end6'd11:begin qh3:0<='b0001;ql3:0<='b0001;end6'd12:begi
10、n qh3:0<='b0001;ql3:0<='b0010;end6'd13:begin qh3:0<='b0001;ql3:0<='b0011;end6'd14:begin qh3:0<='b0001;ql3:0<='b0100;end6'd15:begin qh3:0<='b0001;ql3:0<='b0101;end6'd16:begin qh3:0<='b0001;ql3:0<='b0110;end6'd17
11、:begin qh3:0<='b0001;ql3:0<='b0111;end6'd18:begin qh3:0<='b0001;ql3:0<='b1000;end6'd19:begin qh3:0<='b0001;ql3:0<='b1001;end6'd20:begin qh3:0<='b0010;ql3:0<='b0000;end6'd21:begin qh3:0<='b0010;ql3:0<='b0001;end6
12、9;d22:begin qh3:0<='b0010;ql3:0<='b0010;end6'd23:begin qh3:0<='b0010;ql3:0<='b0011;end6'd24:begin qh3:0<='b0010;ql3:0<='b0100;end6'd25:begin qh3:0<='b0010;ql3:0<='b0101;end6'd26:begin qh3:0<='b0010;ql3:0<='b0110;en
13、d6'd27:begin qh3:0<='b0010;ql3:0<='b0111;end6'd28:begin qh3:0<='b0010;ql3:0<='b1000;end6'd29:begin qh3:0<='b0010;ql3:0<='b1001;end6'd30:begin qh3:0<='b0011;ql3:0<='b0000;end6'd31:begin qh3:0<='b0011;ql3:0<='b00
14、01;end6'd32:begin qh3:0<='b0011;ql3:0<='b0010;end6'd33:begin qh3:0<='b0011;ql3:0<='b0011;end6'd34:begin qh3:0<='b0011;ql3:0<='b0100;end6'd35:begin qh3:0<='b0011;ql3:0<='b0101;end6'd36:begin qh3:0<='b0011;ql3:0<=
15、9;b0110;end6'd37:begin qh3:0<='b0011;ql3:0<='b0111;end6'd38:begin qh3:0<='b0011;ql3:0<='b1000;end6'd39:begin qh3:0<='b0011;ql3:0<='b1001;end6'd40:begin qh3:0<='b0100;ql3:0<='b0000;end6'd41:begin qh3:0<='b0100;ql3:0<
16、;='b0001;end6'd42:begin qh3:0<='b0100;ql3:0<='b0010;end6'd43:begin qh3:0<='b0100;ql3:0<='b0011;end6'd44:begin qh3:0<='b0100;ql3:0<='b0100;end6'd45:begin qh3:0<='b0100;ql3:0<='b0101;end6'd46:begin qh3:0<='b0100;ql3
17、:0<='b0110;end6'd47:begin qh3:0<='b0100;ql3:0<='b0111;end6'd48:begin qh3:0<='b0100;ql3:0<='b1000;end6'd49:begin qh3:0<='b0100;ql3:0<='b1001;end6'd50:begin qh3:0<='b0101;ql3:0<='b0000;end6'd51:begin qh3:0<='b010
18、1;ql3:0<='b0001;end6'd52:begin qh3:0<='b0101;ql3:0<='b0010;end6'd53:begin qh3:0<='b0101;ql3:0<='b0011;end6'd54:begin qh3:0<='b0101;ql3:0<='b0100;end6'd55:begin qh3:0<='b0101;ql3:0<='b0101;end6'd56:begin qh3:0<='
19、;b0101;ql3:0<='b0110;end6'd57:begin qh3:0<='b0101;ql3:0<='b0111;end6'd58:begin qh3:0<='b0101;ql3:0<='b1000;end6'd59:begin qh3:0<='b0101;ql3:0<='b1001;enddefault:begin qh3:0<='bx;ql3:0<='bx;endendcaseendEndmodule5 模擬鐘擺模塊/該模塊對2
20、0mhz的clk進(jìn)行的分頻,所得到的8hz(clk_8hz)用作5個LED的時鐘脈沖module led_(clk,ledout);input clk;output4:0ledout;reg4:0ledout;reg12:0count0;reg clk_2khz,clk_8hz;reg6:0count4;reg2:0cnt1;always(posedge clk)beginif(count0='d5000) /5000begin clk_2khz<=clk_2khz;count0<=0;endelsebegincount0<=count0+1;endendalways
21、(posedge clk_2khz)beginif(count4='d125) /125beginclk_8hz<=clk_8hz;count4<=0;endelsebegincount4<=count4+1;endendalways(posedge clk_8hz)beginif(cnt1='d7)begincnt1<='d0;endelsebegincnt1<=cnt1+1;endendalways(cnt1)begincase(cnt1)3'd0:ledout4:0<=5'b10000;3'd1:ledo
22、ut4:0<=5'b01000;3'd2:ledout4:0<=5'b00100;3'd3:ledout4:0<=5'b00010;3'd4:ledout4:0<=5'b00001;3'd5:ledout4:0<=5'b00010;3'd6:ledout4:0<=5'b00100;3'd7:ledout4:0<=5'b01000;endcaseendendmodule6 整點(diǎn)報時模塊/該模塊在49:52,49:54,49:56,49:5800:00這
23、6個秒段產(chǎn)生高電平,用作報時module baoshi(qmh,qml,qsh,qsl,OUT); input3:0 qmh,qml,qsh,qsl; output OUT; reg OUT;always( qmh or qml or qsh or qsl)begin if(qmh=4'd5&&qml=4'd9&&qsh=4'd5&&qsl=4'd2)OUT<=1;else if(qmh=4'd5&&qml=4'd9&&qsh=4'd5&&
24、;qsl=4'd4)OUT<=1;else if(qmh=4'd5&&qml=4'd9&&qsh=4'd5&&qsl=4'd6)OUT<=1;else if(qmh=4'd5&&qml=4'd9&&qsh=4'd5&&qsl=4'd8)OUT<=1;else if(qmh=4'd5&&qml=4'd9&&qsh=4'd5&&qsl=4
25、9;d9)OUT<=1;else if(qmh=4'd0&&qml=4'd0&&qsh=4'd0&&qsl=4'd0)OUT<=1;else OUT<=0;endendmodule邏輯功能仿真結(jié)果:調(diào)節(jié)分鐘:模擬鐘擺:通過以上仿真,在實(shí)驗(yàn)板上進(jìn)行測試,管腳鎖定:實(shí)驗(yàn)最終測試運(yùn)行良好,并通過驗(yàn)收。課題二 交通燈控制邏輯電路設(shè)計(jì)任務(wù):用CPLD設(shè)計(jì)路口交通燈控制器要求:1.滿足如下時序要求:南北方向紅燈亮,東西方向綠燈亮;南北方向綠燈亮,東西方向紅燈亮; 2.每一方向的紅(綠)黃燈總共維持30秒; 3
26、.十字路口要有時間顯示,具體為:當(dāng)某一方向綠燈亮?xí)r,置顯示器為30秒,然后以每秒減一計(jì)數(shù)方式工作,直至減到數(shù)為4秒時,紅綠燈熄滅,黃燈開始間隙閃耀4秒,減到零時,紅綠燈交換,一次工作循環(huán)結(jié)束,進(jìn)入下一步另一方向的工作循環(huán); 4.紅綠黃燈均采用發(fā)光二極管; 5.設(shè)計(jì)由晶振電路產(chǎn)生1Hz標(biāo)準(zhǔn)秒信號的單元電路; 6.要求對整體電路進(jìn)行仿真,觀察并記錄下仿真波形; 7.東西方向或南北方向的綠燈亮變?yōu)榧t燈亮,中間需插入黃燈閃耀4秒過渡,而從紅燈亮變?yōu)榫G燈亮,不需要黃燈過渡,直接由紅燈變?yōu)榫G燈。文本文件:module traffic(qh,ql,clk,clr,enmergy,ra,ya,ga,rb,yb
27、,gb);output ra,ya,ga,rb,yb,gb; /東西方向紅(ra)黃(ya)綠(ga);南北方向紅(rb)黃(yb)output3:0 qh,ql; /綠(gb) input clk,clr,enmergy; /enmergy 緊急信號,該信號有效時,所有交通燈皆顯紅燈reg1:0state,next_state;parameter state0=2'b00,state1=2'b01,state2=2'b10,state3=2'b11;reg clk_1khz,clk_1hz,clk_2hz;reg3:0 qh,ql;reg r1,r2,g1,g
28、2,y1,y2;reg ra,ya,ga,rb,yb,gb;reg13:0count1;reg8:0count2,count3;reg a;reg4:0timer;always(posedge clk)beginif(count1=14'd10000) /10000beginclk_1khz<=clk_1khz;count1<=0;endelsebegincount1<=count1+1;endendalways(posedge clk_1khz)beginif(count2=9'd500) /500beginclk_1hz<=clk_1hz;count
29、2<=0;endelsebegincount2<=count2+1;endif(count3='d250) /250beginclk_2hz<=clk_2hz;count3<=0;endelsebegincount3<=count3+1;endendalways(posedge clk_1hz)beginif(clr)beginr1<=0;y1<=0;g1<=0;r2<=0;y2<=0;g2<=0;endelsebeginstate=next_state;case(state)state0:beginif(!enmerg
30、y)beginif(!a)begintimer<=5'd30;a<=1;r1<=0;y1<=0;g1<=1;r2<=1;y2<=0;g2<=0;endelsebeginif(timer=1)beginnext_state<=state1;a<=0;timer<=0;endelsetimer<=timer-1;endendendstate1:beginif(!enmergy)beginif(!a)begintimer<=5'd4;a<=1;r1<=0;y1<=1;g1<=0;r2
31、<=1;y2<=0;g2<=0;endelsebeginif(timer=1)beginnext_state<=state2;a<=0;timer<=0;endelsetimer<=timer-1;endendendstate2:beginif(!enmergy)beginif(!a)begintimer<=5'd25;a<=1;r1<=1;y1<=0;g1<=0;r2<=0;y2<=0;g2<=1;endelsebeginif(timer=1)beginnext_state<=state3
32、;a<=0;timer<=0;endelsetimer<=timer-1;endendendstate3:beginif(!enmergy)beginif(!a)begintimer<=5'd4;a<=1;r1<=1;y1<=0;g1<=0;r2<=0;y2<=1;g2<=0;endelsebeginif(timer=1)beginnext_state<=state0;a<=0;timer<=0;endelsetimer<=timer-1;endendendendcaseendendalways(
33、enmergy,clk_1hz,r1,r1,g1,g1,y1,y2)beginif(enmergy)beginra<=r1|enmergy;rb<=r2|enmergy;ga<=g1&&enmergy;gb<=g2&&enmergy;ya<=y1&&enmergy;yb<=y2&&enmergy;endelsebeginra<=r1;rb<=r2;ga<=g1;gb<=g2;ya<=y1;yb<=y2;endendalways (timer)begincase
34、(timer)5'd0:begin qh3:0<=4'b0000;ql3:0<='b0000;end5'd1:begin qh3:0<=4'b0000;ql3:0<='b0001;end5'd2:begin qh3:0<=4'b0000;ql3:0<='b0010;end5'd3:begin qh3:0<=4'b0000;ql3:0<='b0011;end5'd4:begin qh3:0<=4'b0000;ql3:0<=
35、39;b0100;end5'd5:begin qh3:0<=4'b0000;ql3:0<='b0101;end5'd6:begin qh3:0<=4'b0000;ql3:0<='b0110;end5'd7:begin qh3:0<=4'b0000;ql3:0<='b0111;end5'd8:begin qh3:0<=4'b0000;ql3:0<='b1000;end5'd9:begin qh3:0<=4'b0000;ql3:0<='b1001;end5'd10:begin qh3:0<='b0001;ql3:0<='b0000;end5'd11:begin qh3:0<='b0001;ql3:0<='b0001;end5'd12:begin qh3:0<='b0001;ql3:0<='b0010;end5'd13:begin qh3:0<='b0001;ql3:0<='b0011;end5'd14:begin qh3:0<='b0001;q
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