嵌入式項(xiàng)目決賽加密數(shù)據(jù)-1液晶控制器ili9325

1、ILI9325a-Si TFT LCD Single Chip Driver240RGBx320 Resolution and 262K colorDatasheetVersion: V0.43 Document No.: ILI9325DS_V0.43.pdfILI TECHNOLOGY CORP.4F, No. 2, Tech. 5th Rd., Hsinchu Science Park, 300, R.O.C.Tel.886-3-5670095; Fax.886-3-5670096a-Si TFT LCD Single Chip Driver 24

2、0RGBx320 Resolution and 262K colorILI9325Table of ContentsSectionPage.5.6.7.Introduction.7Features7Block Diagram9Pin Descriptions10Pad Arrangement and Coordination14Block Description21System Interface.Interface Specifications23Input Interfaces...i80/18-bit Syst

3、em Interface25i80/16-bit System Interface26i80/9-bit System Interface27i80/8-bit System Interface2.7.5.Serial Peripheral Interface (SPI)28VSYNC Interface33RGB Input Interface3....5.6.RGB Interface38RGB Interface Timing39Moving Picture Mode416-bit RGB Interface421

4、6-bit RGB Interface4318-bit RGB Interface437.6.Interface Timing468.Register Descriptions478.1.Registers Access478.2.truction Descriptions50........11.Index (IR)52Driver Output Control (R01h)52LCD Driving Wave Control (R02h)54Entry Mode (R03h)5

5、4Resizing Control Register (R04h)56Display Control 1 (R07h)57Display Control 2 (R08h)58Display Control 3 (R09h)59Display Control 4 (R0Ah)60RGB Display Interface Control 1 (R0Ch)61Frame Marker Position (R0Dh)62The information contained herein is the exclusive property of ILI Technology Corp. and shal

6、l not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 2 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI932..2

7、...5.RGB Display Interface Control 2 (R0Fh)62Power Control 1 (R10h)63Power Control 2 (R11h)64Power Control 3 (R12h)65Power Control 4 (R13h)65GRAM Horizontal/Vertical Address Set (R20h, R21h)66Write Data to GRAM (R

8、22h)66Read Data from GRAM (R22h)66Power Control 7 (R29h)68Frame Rate and Color Control (R2Bh)69Gamma Control (R30h R3Dh)70Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h)70Gate Scan Control (R60h, R61h, R6Ah)71Partial Image 1 Display Position (R80h)74Partial Image 1 RAM Start/En

9、d Address (R81h, R82h)74Partial Image 2 Display Position (R83h)74Partial Image 2 RAM Start/End Address (R84h, R85h)74Panel Interface Control 1 (R90h)75Panel Interface Control 2 (R92h)75Panel Interface Control 4 (R95h)75Panel Interface Control 5 (R97h)76OTP VCM Programming Control (RA1h)76OTP VCM Sta

10、tus and Enable (RA2h)77OTP Programming ID Key (RA5h)779. OTP Programming Flow7810. GRAM Address Map & Read/Write7911. Window Address Function8512. Gamma Correction8613. Application9....Configuration of Power Supply Circuit91Display ON/OFF Sequence93Standby and Sl

11、eep Mode94Power Supply Configuration95Voltage Generation96Applied Voltage to the TFT panel97Partial Display Function97Resizing Function9814. Electrical Characteristics10114.1. Absolute Maximum Ratings101The information contained herein is the exclusive property of ILI Technology Corp. and shall not

12、be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 3 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI9325.14.4.DC Characteristics102Reset Timing Characteristics102AC Characterist

13、ics104.4.3.i80-System Interface Timing Characteristics102Serial Data Transfer Interface Timing Characteristics103RGB Interface Timing Characteristics10415. Revision History106The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distribut

14、ed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 4 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI9325FiguresFIGURE1 SYSTEM INTERFACE AND RGBINTERFACE CONNECTION24FIGURE2 18-BIT SYSTEM INTERFACE D

15、ATA FORMAT25FIGURE3 16-BIT SYSTEM INTERFACE DATA FORMAT26FIGURE4 9-BIT SYSTEM INTERFACE DATA FORMAT27FIGURE5 8-BIT SYSTEM INTERFACE DATA FORMAT28FIGURE6 DATA TRANSFER SYNCHRONIZATION IN 8/9-BITSYSTEM INTERFACE28FIGURE 7 DATA FORMAT OF SPI INTERFACE30FIGURE8 DATA TRANSMISSION THROUGH SERIAL PERIPHERA

16、L INTERFACE (SPI)31FIGURE9 DATA TRANSMISSION THROUGH SERIAL PERIPHERAL INTERFACE (SPI), TRI=”1” AND DFM=”10”)32FIGURE10 DATA TRANSMISSION THROUGHVSYNC INTERFACE)33FIGURE11 MOVING PICTURE DATA TRANSMISSION THROUGHVSYNC INTERFACE33FIGURE12 OPERATION THROUGH VSYNC INTERFACE34FIGURE13 TRANSITION FLOW BE

17、TWEEN VSYNC AND INTERNAL CLOCK OPERATION MODES36FIGURE14 RGB INTERFACEDATA FORMAT37FIGURE15 GRAM ACCESS AREA BYRGB INTERFACE38FIGURE16 TIMING CHART OF SIGNALS IN 18-/16-BIT RGBINTERFACE MODE39FIGURE17 TIMING CHART OF SIGNALS IN 6-BIT RGBINTERFACE MODE40FIGURE18 EXAMPLE OF UPDATE THE STILL AND MOVING

18、 PICTURE41FIGURE19 INTERNAL CLOCK OPERATION/RGBINTERFACE MODE SWITCHING44FIGURE20 GRAM ACCESS BETWEEN SYSTEM INTERFACE ANDRGB INTERFACE45FIGURE21 RELATIONSHIP BETWEEN RGB I/F SIGNALS AND LCD DRIVING SIGNALS FOR PANEL46FIGURE22 REGISTER SETTING WITH SERIAL PERIPHERAL INTERFACE (SPI)47FIGURE23 REGISTE

19、R SETTING WITH I80 SYSTEM INTERFACE48FIGURE 24 REGISTER READ/WRITE TIMING OF I80 SYSTEM INTERFACE49FIGURE25 GRAM ACCESSDIRECTION SETTING55FIGURE28 16-BIT MPU SYSTEM INTERFACEDATA FORMAT56FIGURE29 8-BIT MPU SYSTEM INTERFACEDATA FORMAT56FIGURE 30 DATA READ FROM GRAM THROUGH READ DATA REGISTER IN 18-/1

20、6-/9-/8-BIT INTERFACE MODE67FIGURE 31 GRAM DATA READ BACKFLOW CHART68FIGURE 32 GRAMACCESS RANGE CONFIGURATION71FIGURE33 GRAM READ/WRITE TIMING OFI80-SYSTEM INTERFACE79FIGURE34 I80-SYSTEM INTERFACE WITH 18-/16-/9-BIT DATA BUS (SS=”0”, BGR=”0”)81FIGURE35 I80-SYSTEM INTERFACE WITH 8-BIT DATA BUS (SS=”0

21、”, BGR=”0”)82FIGURE 36 I80-SYSTEM INTERFACE WITH 18-/9-BIT DATA BUS (SS=”1”, BGR=”1”)84FIGURE 37 GRAM ACCESSWINDOW MAP85FIGURE 38 GRAYSCALE VOLTAGE GENERATION86FIGURE 39 GRAYSCALE VOLTAGE ADJUSTMENT87FIGURE 40 GAMMA CURVE ADJUSTMENT88The information contained herein is the exclusive property of ILI

22、Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 5 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI9325FIGURE 41 RELATIONSHIP BETWEEN SOURCE OUTPUT AND VC

23、OM90FIGURE 42 RELATIONSHIP BETWEEN GRAM DATA ANDOUTPUT LEVEL90FIGURE 43 POWER SUPPLY CIRCUIT BLOCK91FIGURE 44 DISPLAY ON/OFF REGISTER SETTING SEQUENCE93FIGURE 45 STANDBY/SLEEP MODE REGISTER SETTING SEQUENCE94FIGURE 46 POWER SUPPLY ON/OFF SEQUENCE95FIGURE 47 VOLTAGE CONFIGURATION DIAGRAM96FIGURE 48 V

24、OLTAGE OUTPUT TO TFT LCD PANEL97FIGURE 49 PARTIAL DISPLAY EXAMPLE98FIGURE 50 DATA TRANSFER IN RESIZING99FIGURE 51 RESIZING EXAMPLE99FIGURE 52 I80-SYSTEM BUS TIMING103FIGURE 53 SPI SYSTEMBUS TIMING104FIGURE54 RGB INTERFACE TIMING105The information contained herein is the exclusive property of ILI Tec

25、hnology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 6 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI93251.IntroductionILI9325 is a 262,144-color one-chip SoC

26、driver for a-TFT liquid crystal display with resolution of 240RGBx320dots, comprising a 720-channel source driver, a 320-channel gate driver, 172,800 bytes RAM for graphic data of 240RGBx320 dots, and power supply circuit.ILI9325 has four kinds of system interfaces which are i80-system MPU interface

27、 (8-/9-/16-/18-bit bus width),VSYNC interface (system interface + VSYNC, internal clock, DB17:0), serial data transfer interface (SPI) and RGB 6-/16-/18-bit interface (DOTCLK, VSYNC, HSYNC, ENABLE, DB17:0).In RGB interface and VSYNC interface mode, the combined use of high-speed RAM write function a

28、nd widow address function enables to display a moving picture at a position specified by a user and still pictures in other areas on the screen simultaneously, which makes it possible to transfer display the refresh data only tominimize data transfers and power consumption.ILI9325 can operate with 1

29、.65V I/O interface voltage, and an incorporated voltage follower circuit to generate voltage levels for driving an LCD. The ILI9325 also supports a function to display in 8 colors and a sleep mode, allowing for precise power control by software and these features make the ILI9325 an ideal LCD driver

30、 for medium or small size portable products such as digital cellular phones, smart phone, PDA and PMP wherelong battery life is a major concern.2.FeaturesSingle chip solution for a liquid crystal QVGA TFT LCD display240RGBx320-dot resolution capable with real 262,144 display colorSupport MVA (Multi-

31、domain Vertical Alignment) wide view displayIncorporate 720-channel source driver and 320-channel gate driverInternal 172,800 bytes graphic RAMHigh-speed RAM burst write functionSystem interfacesi80 system interface with 8-/ 9-/16-/18-bit bus width Serial Peripheral Interface (SPI)RGB interface with

32、 6-/16-/18-bit bus width (VSYNC, HSYNC, DOTCLK, ENABLE, DB17:0)VSYNC interface (System interface + VSYNC)Internal oscillator and hardware resetResizing function (1/2, 1/4)Reversible source/gate driver shift directionWindow address function to specify a rectangular area for internal GRAM accessAbunda

33、nt functions for color display control -correction function enabling display in 262,144 colors Line-unit vertical scrolling functionThe information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without pr

34、ior written permission of ILI Technology Corp.Page 7 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI9325Partial drive function, enabling partially driving an LCD panel at positions specified by user Incorporate step-up circuits for stepping up a liquid crys

35、tal drive voltage level up to 6 times(x6)Power saving functionsuuu8-color mode standby modesleep modeuLow -power consumption architecture Low operating power supplies: IOVcc = 1.65V 3.3 V (interface I/O) Vci = 2.5V 3.3 V (analog) LCD Voltage drive:uSource/VCOM power supply voltage DDVDH - GND = 4.5V

36、 6.0 VCL GND = -2.0V -3.0V VCI VCL 6.0V Gate driver output voltage VGH - GND = 10V 20V VGL GND = -5V -15V VGH VGL 32V VCOM driver output voltage VCOMH = 3.0V (DDVDH-0.2)V VCOML = (VCL+0.5)V 0V VCOMH-VCOML 6.0Vua-TFT LCD storage capacitor: Cst onlyThe information contained herein is the exclusive pro

37、perty of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 8 of 107Version: 0.43a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI93253.Block DiagramIOVCC IM3:0 nRESETnCS n

38、WR/SCLnRD RS SDI SDO DB17:0 HSYNC VSYNC DOTCLK ENABLE TEST1 TEST2TEST3 TS8:0S720:1 VVREG1OUTVGS VCC VDDDGNDDUMMY2027DUMMY115G320:1Timing ControllerRC-OSC.VCI VCI1Charge-pump Power CircuitVCOM GND The information contained herein is the exclusive property of ILI Technology Corp. and shall not be dist

39、ributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 9 of 107Version: 0.43C11+ C11- DDVDH C12+ C12- C13+ C13-VCLC21+ C21- C22+ C22- VGH VGL VCOMHVCOMLVCOM Generator LCD Gate Driver Regulator 6 3 0 Grayscale Reference Voltage Read Latch 72

40、 Graphics RAM (GRAM) Write Latch 72Graphics Operation 18 Address Counter (AC) Control Register (CR) LCD Source Driver Index Register (IR) 8 MPU I/F 18-bit 16-bit 9-bit 8-bit SPI I/F RGB I/F 18-bit 16-bit 6-bit VSYNC I/F 18 18 18 a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI

41、93254.Pin DescriptionsThe information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.Page 10 of 107Version: 0.43Pin NameI/OTypeDescriptionsInput Inte

42、rfaceIM3, IM2, IM1, IM0/IDIIOVccSelect the MPU system interface modeWhen the serial peripheral interface is selected, IM0 pin is used for the device code ID setting.nCSIMPUIOVccA chip select signal.Low: the ILI9325 is selected and accessibleHigh: the ILI9325 is not selected and not accessible Fix to

43、 the GND level when not in use.RSIMPUIOVccA register select signal.Low: select an index or status register High: select a control registerFix to either IOVcc or GND level when not in use.nWR/SCLIMPUIOVccA write strobe signal and enables an operation to write data when the signal is low.Fix to either

44、 IOVcc or GND level when not in use.SPI Mode:Synchronizing clock signalPI mode.nRDIMPUIOVccA read strobe signal and enables an operation to read out data when the signal is low.Fix to either IOVcc or GND level when not in use.nRESETIMPUIOVccA reset pin.Initializes the ILI9325 with a low input. Be su

45、re to execute a power-on reset after supplying power.SDIIMPUIOVccSPI interface input pin.The data is latched on the rising edge of the SCL signal.SDOOMPUIOVccSPI interface output pin.The data is outputted on the falling edge of the SCL signal.Let SDO as floating when not used.DB17:0I/OMPUIOVccAn 18-

46、bit parallel bi-directional data bus for MPU system interface mode8-bit I/F: DB17:10 is used. 9-bit I/F: DB17:9 is used.16-bit I/F: DB17:10 and DB8:1 is used. 18-bit I/F: DB17:0 is used.18-bit parallel bi-directional data bus for RGB interface operation 6-bit RGB I/F: DB17:12 are used.IM3IM2IM1IM0MP

47、U-Interface ModeDB Pin in use0000Setting invalid0001Setting invalid0010i80-system 16-bit interfaceDB17:10, DB8:10011i80-system 8-bit interfaceDB17:10010IDSerial Peripheral Interface (SPI)SDI, SDO011*Setting invalid1000Setting invalid1001Setting invalid1010i80-system 18-bit interfaceDB17:01011i80-sys

48、tem 9-bit interfaceDB17:911*Setting invalida-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K colorILI9325The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written pe

49、rmission of ILI Technology Corp.Page 11 of 107Version: 0.43Pin NameI/OTypeDescriptions16-bit RGB I/F: DB17:13 and DB11:1 are used. 18-bit RGB I/F: DB17:0 are used.Unused pmust be fixed to GND level.ENABLEIMPUIOVccData ENEABLE signal for RGB interface operation.Low: Select (access enabled) High: Not

50、select (access inhibited)The EPL bit inverts the polarity of the ENABLE signal.Fix to either IOVcc or GND level when not in use.DOTCLKIMPUIOVccDot clock signal for RGB interface operation.DPL = “0”: Input data on the rising edge of DOTCLK DPL = “1”: Input data on the falling edge of DOTCLKFix to the

51、 GND level when not in useVSYNCIMPUIOVccFrame synchronizing signal for RGB interface operation.VSPL = “0”: Active low. VSPL = “1”: Active high.Fix to the GND level when not in use.HSYNCIMPUIOVccLine synchronizing signal for RGB interface operation.HSPL = “0”: Active low. HSPL = “1”: Active high.Fix

52、to the GND level when not in useFMARKOMPUIOVccOutput a frame head pulse signal.The FMARK signal is used when writing RAM dataynchronization with frame. Leave the pin open when not in use.LCD Driving signalsS720S1OLCDSource output voltage signals applied to liquid crystal.To change the shift direction of signal outputs, use the SS bit.SS = “0”, the data in the RAM address “h00000” is output from S1. SS = “1”, the data in the RAM address “h00000” is output from S720. S1, S4, S7, display red (R), S2, S5, S8, . display green (G), and S3, S6, S9, . display blue (B) (SS = 0).G320G1OLCDGate line ou