Course Outline

1、Digital Circuits3-1卡諾圖卡諾圖卡諾圖是化簡(jiǎn)布林表示式的方法。卡諾圖是化簡(jiǎn)布林表示式的方法。目的是減少數(shù)位系統(tǒng)中邏輯閘數(shù)目目的是減少數(shù)位系統(tǒng)中邏輯閘數(shù)目。Gate-level minimizationDigital Circuits3-2BBAF簡(jiǎn)化BAFDigital Circuits3-3BAFBAAF用最少數(shù)目的邏輯閘建構(gòu)下列布林函數(shù)ABBAF一個(gè)2輸入的NAND gate需要 2個(gè)Inverter和一個(gè)2輸入的OR gate ?Digital Circuits3-4CBACBAF上式還能再簡(jiǎn)化嗎?CBAF布林代數(shù)運(yùn)算容易嗎?Digital Circuits3-5n寫出

2、F1及F2的真值表CBACBAF1CBAF2Digital Circuits3-6CBACBABABCBABABACBABACBACBAF)()()(Digital Circuits3-7CBACBAF1寫出F1的標(biāo)準(zhǔn)SOP表示式)7 , 5 , 3 , 2 , 1 ()()()(1mCBAABCCBABCACBACBACBAABCCBABCACBACBAACBBACCBACBACBAFDigital Circuits3-8CBAF2寫出F2的標(biāo)準(zhǔn)SOP表示式)7 , 5 , 3 , 2 , 1 ()()()()(1mABCCBACBABCACBAABCCBABCACBABCACBACBBAC

3、BBABCACBAACCABCACBACAACCBACBAFDigital Circuits3-9CBACBAF1寫出F1的標(biāo)準(zhǔn)POS表示式)()()6 , 4 , 0()7 , 5 , 3 , 2 , 1 ()()()(1CBACBACBAMmCBAABCCBABCACBACBACBAABCCBABCACBACBAACBBACCBACBACBAFDigital Circuits3-10CBAF2寫出F2的標(biāo)準(zhǔn)POS表示式)0 , 4 , 6()()()()()()()()()(1MCBACBACBACBABCABCACBACBABCABCACBAABBCACBCACBAFDigital Ci

4、rcuits3-11以布林代數(shù)簡(jiǎn)化，常發(fā)生未達(dá)最簡(jiǎn)式CBACBACBABACBAAABACBAABACBAACBAF)()()(CBAACBAFCBACAABAACCABAACCBAACCBBBAACCBBACBAACBAF)()()()(Digital Circuits3-12nGate-level minimization refers to the design task of finding an optimal gate-level implementation of Boolean functions describing a digital circuit.Digital Cir

5、cuits3-13The Map MethodnThe complexity of the digital logic gates nthe complexity of the algebraic expressionnLogic minimizationnalgebraic approaches: lack specific rulesnthe Karnaugh mapna simple straight forward procedurena pictorial form of a truth tablenapplicable if the # of variables F: produc

6、t of sumsnApproach #2: dualityncombinations of maxterms (it was minterms)nM0M1 = (A+B+C+D)(A+B+C+D)= (A+B+C)+(DD)= A+B+CCDAB0001111000M0M1M3M201M4M5M7M611M12M13M15M1410M8M9M11M10Digital Circuits3-34nExample 3-8nF = S(0,1,2,5,8,9,10)nF = AB+CD+BDnApply DeMorgans theorem; F=(A+B)(C+D)(B+D)nOr think in

7、 terms of maxtermsDigital Circuits3-35nGate implementation of the function of Example 3-8Digital Circuits3-36nConsider the function defined in Table 3.2.( , , )(1,3,4,6)F x y z In sum-of-minterm:( , , )(0,2,5,7)F x y z In sum-of-maxterm:Taking the complement of F( , , )()()F x y zxzxzDigital Circuit

8、s3-37nConsider the function defined in Table 3.2.( , , )F x y zx zxzCombine the 1s:( , , )F x y zxzx z Combine the 0s :Digital Circuits3-383-6 Dont-Care ConditionsnThe value of a function is not specified for certain combinations of variablesnBCD; 1010-1111: dont carenThe dont care conditions can be

9、 utilized in logic minimizationncan be implemented as 0 or 1nExample 3-9nF (w,x,y,z) = S(1,3,7,11,15)nd(w,x,y,z) = S(0,2,5)Digital Circuits3-39nF = yz + wx; F = yz + wznF = S(0,1,2,3,7,11,15) ; F = S(1,3,5,7,11,15)neither expression is acceptablenAlso apply to products of sumDigital Circuits3-40nTwo graphic symbols for a NAND gateDigital Circuits3-41Two-level