汽車電子技術單片機至第七次課

鐵內容 P101~P111一UnsinedcharbPortA=PORTATSCR1&=if((bits&0x10)!=0)if(bits&0x10)if(bits&(1<<4))while((bits&0x80)!=0x80)PORTA|=(1<<PORTA&=~1<<

bitsPORTB^=0x80;PORTB=~PORTB;if((PORTA&0x81)==0)#defineEnableSCIReInt()SCICR2|=#defineDisableSCIReInt()SCICR2&=Memcpy((void*)0x2011void*)0x2000 name:size:位域(便于寄存器操作name:size:MSBBITACCRDIRDATALSBDDR211141structunsignedcharDDR2:1;unsignedcharDATA:4;unsignedcharDIR:1;unsignedcharCCR:1;unsignedcharBITA:1;}MyIOport.DDR2=1;MyIOport.DDR2=1;unionunsignedintWIO;struct{unsignedcharDDR2:1;unsignedcharDATA:4;unsignedcharDIR:1;unsignedcharCCR:1;unsignedcharBITA:1;}IO.IO.WIO0x01;IO.MyIOport.DDR2=變量的特殊定義int*p;inta=0,b=3;p=(int*)(0x08);*p=#definePORTA PORTA=b;a=intPORTA﹫0x08PORTA=b;a={int{inta=a=0x55;a=0x66;a=}{inta=a=}語句，只剩下{volatile{volatileinta=a=0x55;a=0x66;a=}{volatileinta=a=0x55;a=0x66;a=}{unsigned unsignedinta,a=//假設此時TCTL的發(fā)生改變TCTLb=TCTL;//b=}原因：b只從中變量a{volatileunsignedunsignedinta,a=//假設此時TCTL的發(fā)生改變TCTLb=TCTL;//b=}原因：volatile#pragma#pragma#pragma#pragma#pragma#pragma##ramaDATA_SEGOS_EXTINT8UuTask01[64];OS_EXTINT8UuTask02[256];OS_EXTINT8UuTask03[64];OS_EXTINT8UuTask04[256];OS_EXTINT8UuTask05[64];OS_EXTINT8UuTask06[64];OS_EXTINT8UuTask07[256];OS_EXTINT8UuTask08[256];OS_EXTINT8UuTask09[256];CONST_SEG其它:自行閱 第四章4.3.6節(jié)與4.4CW_HC12_v5.1_SPECIAL.exe點擊CreateNew選 設定projectname與其路徑選擇C

ati添加附加文件，如沒有，則點擊” 選擇N 即不使用”處理 選擇ANSI

ProjectSetting:Libs:

來源:手冊Fig1-來源:手冊Fig1-來源:手冊Table2-1 {unsignedchar//端口A的第6DDRA_DDRA61DDRAPORTAPA60DDRA_DDRA60DDRAa=PORTA_PA6;//0:引腳是低電平//1:}DDRA(1:引腳配置為輸出，0PORTA:數據寄存器(1:代表高電平,0邏輯限值 0.65xVdd(5V)= 0.35xVdd(5V)={u