國(guó)立華學(xué)材料科學(xué)工程學(xué)系

1、 the nanocrystal memoryprofessor tai-borprofessor tai-bor wu wudepartment of materials science and engineering,department of materials science and engineering, national tsing hua national tsing hua university university吳泰伯吳泰伯 教授教授國(guó)立清華大學(xué)材料科學(xué)工程學(xué)系國(guó)立清華大學(xué)材料科學(xué)工程學(xué)系electroceramic thin films lab. 427rnthu. m

2、sen1. nonvolatile memory introductionn2. pt nanocrystal self-assembled fabricationn3. characterization of pt nanocrystal memoryn 4. summaryelectroceramic thin films lab. 427rnthu. mse1. introduction semiconductor memorynsolid-state memories are also called semiconductor memories.na non-volatile memo

3、ry does not lose its information contents when the power is turned off.na volatile memory loses its information contents when the power source is removed. electroceramic thin films lab. 427rnthu. msesemiconductor memorynon-volatile memory (nvm)volatile memoryflash memory, feram, mram, cram (chalcoge

4、nide random access memory), single electron memorydram, sram1. introduction flash non-volatile memorynapplication : mobile phone, digital camera, mp3, pda, etc.nshortcoming : (1) high programming voltage (2) lower writing speed (3) poor retention and enduranceelectroceramic thin films lab. 427rnthu.

5、 mseflash memoryfloating gate memorynanocrystalmemorysonos memoryconventional memoryemerging memorymosfet characteristicsn+n+gate+p type si on (depletion)gaten+ n+p type si+off (accumulation)gate voltage, vgsdarin currentbasic operation principlenstorage of chargesn+n+p -sub-gatedrainsourceqtsensevo

6、ltageprogrammederasedgate voltage, vgsdarin current1. introduction floating gate memoryncharge transfer : (1) hot-electron injection (2) f -n tunneling nfor the case of floating gate devices, a single defect can discharge the stored memory charge of the devices due to the conductive properties of th

7、e floating polysilicon gate10-20 nmcontrol gateonodrainfloating gateoxidesource8-15 nm5-7 nm23-42 nm90 nmelectroceramic thin films lab. 427rnthu. mse1. introduction sonos memorynsonos is a multi-dielectric device consisting of an oxide-nitride-oxide (ono) sandwich.nboth positive and negative charges

8、 can be stored in discrete deep traps in the silicon nitride (sin) layer.nbecause for sonos, a single defect will not cause the discharge as the stored charge lies in isolated sites within the silicon nitride dielectric.electroceramic thin films lab. 427rnthu. msegatesourcedrainsio2 2 nmsio2 4 nmsi3

9、n4 5 nmimproved retention and endurance1. introduction - nanocrystal memorynaligned discrete nanocrystals as floating gatenstored electrons in nanocrystals screen channel charge vt nreplacing poly-si gate with nanocrystals improved memory device : (1) thinner tunnel oxide (2) low operation voltage (

10、3) faster programming speed (4) superior retention and endurance (5) high-density integrationelectroceramic thin films lab. 427rnthu. msedrainsourcegategate oxidetunnel oxidenanocrystals2-4 nm5-8 nm3-4 nm90 nm10-16 nm1. introductionncomparsion of nc memory with floating gate and sonos deviceselectro

11、ceramic thin films lab. 427rnthu. msee-(a)(b)(c)poly-si continuous float gatenatural discrete-electron-traps : sonos, sohosartificial discrete-electron-traps : ncs flash memory1. introduction single electron memoryelectroceramic thin films lab. 427rnthu. msein addition, for the case of small (10 nm)

12、 and uniform in size nanocrystals, quantum confinement and single-electron charging effect due to the reduced density of states and coulomb blockade effect offer the possibility of quantized shift of the transistor threshold voltage at room temperature. illustration of screening effect of a single e

13、lectron in a silicon nanodot with (a) nanodot charged (written), (b) nanodot uncharged (erased). (source : t. futatsugi et al, fujitsu, 1998) 1. introduction single electron memory to nanocrystal memoryelectroceramic thin films lab. 427rnthu. msecurrent-voltage characteristics of a diode with embedd

14、ed sn nanodots showing a coulomb blockade region and coulomb staircases. (source : t. futatsugi et al, fujitsu, 1998) average electron number in silicon dots as a function of gate voltage. inset is a mos diode structure assumed for the calculation. even when dot size is distributed, electron number

15、is almost kept constant by the coulomb blockade. 1. introduction semiconductor vs. metal ncsfor semiconductor ncs si and ge ncsnmost of the researches are focused on the fabrication of two-dimensional array of semiconductor nanocrystals in mos structure by different processes, and significant charge

16、 storage effects were observed through the counterclockwise hysteresis behavior in the high-frequency capacitance-voltage ( c-v ) relation attributed to electron or hole injection from substrate into the embedded nanocrystals.electroceramic thin films lab. 427rnthu. mseelectroceramic thin films lab.

17、 427rnthu. mse1. introduction semiconductor vs. metal ncsp-si substrateef ev ec ei eptsieaueagesigategate oxidetunnel oxidesemiconductor or metal ncsdeff (the effective potential well depth)deff, ag = 0.41 ev (between ec,sub and eag)deff, au = 0.88 ev (between ec,sub and eau)deff, pt = 0.90 ev (betw

18、een ec,sub and eptsi)ref. 1 : c. lee, a. gorur-seetharam and e. c. kan, tech. dig. int. electron devices meet., 557(2003).ref. 2 : y. shi, k. saito, h. ishikuro, and t. hiramoto, j. appl. phys. 84, 2358(1998). 1. introduction overview of ncs flash memory electroceramic thin films lab. 427rnthu. mse1

19、996si-ncs in sio2 matrix1998ge-ncs in sio2 matrix2002metal (au)-ncs in sio2 matrix2003si-ncs in hfo2 matrixsandip tiwari et al,ibmiedm 1996z liu et al,cornelltedy-c king et al,uc berkeleyiedm 1998j. j. lee et al,ut austinvlsi 20032.experiment flow chartelectroceramic thin films lab. 427rnthu. mse2.

20、experiment-schematic figure of mos deviceelectroceramic thin films lab. 427rnthu. mse1. it is known that the oxidized phase of noble metals, such as ptox, is chemically unstable, and can be easily reduced back to metallic state.2. a simple and reliable self-assembly process of pt nanocrystal formati

21、on from the reduction of a ultra thin ptox layer embedded in sio2 is developed.gategate oxide s-sio2pt nanocrystalstunnel oxide t-sio224nm2.55.0nmp-si 3. cross section tem images of pt nanocrystals for different annealing timeelectroceramic thin films lab. 427rnthu. msethe effects of annealing time

22、on the distribution, shape and size of pt nanocrystals (a) 05 min, (b) 25 min and (c) 50 min.(a)(b)(c)3. - plane view tem imageselectroceramic thin films lab. 427rnthu. mse(a)(b)(c)plane view tem images of pt nanocrystals in sio2 matrix for different annealing time (a) 05 min, (b) 25 min and (c) 50

23、min 3.- spatial densities of self-assembly pt nanocrystals for different annealing timeelectroceramic thin films lab. 427rnthu. mseannealing timedensity (nanocrystals/cm2)50m2.06*101225m2.16*101205m0.78*1012electroceramic thin films lab. 427rnthu. mse3.- hrem image of isolated pt nanocrystals hrem l

24、attice image of pt nanocrystal in the sio2 matrix3.- schematics of the mos device, applied positive or negative gate voltage electroceramic thin films lab. 427rnthu. msegategate oxide s-sio2pt nanocrystals24nm2.5 and 5.0 nmp-si +-+tunnel oxide t-sio2+electrondetrapping+inversion conditionaccumulatio

25、n conditiongategate oxide s-sio2pt nanocrystals24nm2.5 and 5.0 nmp-si +-tunnel oxide t-sio2electrontrapping3. - capacitance-voltage (c-v) curveselectroceramic thin films lab. 427rnthu. msethe effects of various annealing time on the charge storage in the devices with 2.5 nm-thick tunnel oxide -8 -7

26、-6 -5 -4 -3 -2 -1 0123456785101520253035gate voltage(v)capacitance(pf) 05 min 25 min 50 min pure sio23. estimated densities of stored charge electroceramic thin films lab. 427rnthu. msedifferent annealing timevfb(hysteresis)qs (e-/cm2)direction of hysteresis05 m2.48 v2.19 1012counterclockwise25 m5.4

27、4 v4.86 1012counterclockwise50 m6.48 v5.81 1012counterclockwise3.- band diagram under inversion conditionelectroceramic thin films lab. 427rnthu. msemetalgategateoxideeceiefevnanocrystalstunnel oxideinversion layer of electronsdepletion layerp-sivg0electron trapping from the channel into the nanocry

28、stal3.- band diagram under accumulation conditionelectroceramic thin films lab. 427rnthu. msetunnel oxidemetalgategateoxideeceiefevnanocrystalsaccumulation layer of holesp-sivg0electron detrapping from the nanocrystal into the channel-8-7-6-5-4-3-2-1012345678-2.0-1.8-1.6-1.4-1.2-1.0-0.8-0.6-0.4-0.20

29、.00.20.40.60.81.01.21.41.61.8 50mn(e-/nanocrystal)vg injected hole injected electron-8-7-6-5-4-3-2-1012345678-2.0-1.8-1.6-1.4-1.2-1.0-0.8-0.6-0.4-0.20.00.20.40.60.81.01.21.41.61.8 25mn(e-/nanocrystal)vg injected hole injected electronelectroceramic thin films lab. 427rnthu. mse3. - effect of gate voltage on the n (number of stored charge)-8-7-6-5-4-3-2-1012345678-2.0-1.8-1.6-1.4-1.2-1.0-0.8-0.6-0.4-0.20.00.20.40.60.81.01.21.41.61.8 5mn(e-/nanocrystal)vg injected hole injected electron3. - charge retention