arduino starter kit初級實驗套件相關(guān)元器件-adc0831,3238英文手冊

ADC0831/ADC0832/ADC0834/ADC08388-BitADC0831/ADC0832/ADC0834/ADC08388-BitSerialI/OA/DConverterswithMultiplexerJulyJuly8-BitSerialI/OA/DConverterswithMultiplexerGeneralTheADC0831seriesare8-bitsuccessiveapproximationA/DconverterswithaserialI/Oandconfigurableinputmultiplex-erswithupto8channels.TheserialI/OisconfiguredtocomplywiththeNSCMICROWIRE?serialdataexchangestandardforeasyinterfacetotheCOPS?familyofproces-sors,andcaninterfacewithstandardshiftregistersorμPs.The2-,4-or8-channelmultiplexersaresoftwareconfiguredforsingle-endedordifferentialinputsaswellaschannelas-Thedifferentialogvoltageinputallowsincreasingcommon-moderejectionandoffsetting ogzeronOperatesratiometricallyorwith5VDCvoltagenNozeroorfull-scaleadjustn2-,4-or8-channelmultiplexeroptionswithaddresslogicnShuntregulatorallowsoperationwithhighvoltagesn0Vto5Vinputrangewithsingle5VpowersupplynRemoteoperationwithserialdigitaldatalinknTTL/MOSinput/outputn0.3"standardwidth,8-,14-or20-pinDIPn20PinMoldedChipCarrierPackage(ADC0838only)nSurface-MountPackagevoltagevalue.Inaddition,thevoltagereferenceinputcanbeadjustedtoallowencodinganysmallerogvoltagespantothefull8bitsofresolution.nNSCMICROWIREcompatible—directinterfacetoCOPSfamilyprocessorsnEasyinterfacetoallmicroprocessors,oroperatesKeynnTotalUnadjustedErrornSingleSupplynLownConversion8±?LSBand±151532TypicalTRI-STATEisaregisteredtrademarkofNationalSemiconductorCorporation.COPSandMICROWIREaretrademarksofNationalSemiconductorCorporation.?1999NationalSemiconductor ADC08388-ChannelMux(WMandADC08344-ChannelMUX(WMandDual-In-LinePackageCOMinternallyconnectedtoAGNDTopViewTopCOMinternallyconnectedtoGND.VREFinternallyconnectedtoVCC.TopViewTopTopADC08322-ChannelMUXSmallOutlinePackage(WM)ADC0831SingleDifferentialDual-In-LinePackageADC0831SingleDifferentialInputSmallOutlinePackage(WM)TopTopTopADC08388-ChannelMUXMoldedChipCarrier(PCC)Package(V)OrderingPartogUnadjusted1Molded0?Cto0?Cto20?Cto+70?C0?Cto4Molded0?CtoMolded0?Cto0?Cto8PCC0?CtoPCC0?Cto0?Cto0?Cto+70?CSeeNSPackageNumberM14B,M20B,N08E,N14A,N20Aor umRatings(Notes1, LeadTemperature(Soldering10IfMilitary/Aerospacespecifieddevicesare Dual-In-LinePackage pleasecontacttheNationalSemiconductorSales MoldedChipCarrierDistributorsforavailabilityand VaporPhase(60 CurrentintoV+(Note 15 Infrared(15 SupplyVoltage,VCC(Note ESDSusceptibility(Note OperatingRatings(Notes1,Logic ?0.3VtoVCC+ogInputs ?0.3VtoVCC+0.3V SupplyVoltage,VCC 4.5VDCto6.3VDCInputCurrentperPin(Note ±5 ±20mA ?40?Cto+85?CStorageTemperature ?65?Cto+150?C Package atTA=25?C(BoardMount) 0?CtoConverterandMultiplexerElectricalCharacteristicsThefollowingspecificationsapplyforVCC=V+=VREF=5V,VREFVCC+0.1V,TA=Tj=25?C,andfCLK=250kHzunlessotherwisespecified.BoldfacelimitsapplyfromTMINtoTMAX.CIWMBCV,CCV,CCWM,andCCN(Note(Note(Note(Note(Note(NoteCONVERTERANDMULTIPLEXERTotalUnadjustedV=5.00(NoteMinimumInput(NoteumInput(NoteInputRange(Note8)VVVInputRange(Note8)GNDGNDVDCCommon-ModeChangein15mAintoerrorfromtointernaloperation(Note111V,15mAintodiodeV(atV)(NotePowerSupplyI,OffChannelOnCurrent(NoteOffOnOffCIWMBCV,CCV,CCWM,andCCN(Note(Note(Note(Note(Note(NoteI,OnChannelLeakageCurrent(Note9)OnOffOnOffConverterandMultiplexerElectricalCharacteristicsThefollowingspecificationsapplyforVCC=V+=VREF=5V,VREFVCC+0.1V,TA=Tj=25?C,andfCLK=250kHzunlessotherwisespecified.BoldfacelimitsapplyfromTMINtoTMAX.(Continued)CONVERTERANDMULTIPLEXERDIGITALANDDCV,Logical“1”VoltageVV,Logical“0”VoltageVI,Logical“1”Current111I,Logical“0”CurrentV,Logical“1”O(jiān)utputVoltage(Min)I=?360μAI=?10μAV,Logical“0”VoltageI=1.6VI,TRI-STATECurrent3I,OutputCurrentI,OutputSinkCurrentI,SupplyCurrent(Max)ADC0831,ADC0834,IncludesACThefollowingspecificationsapplyforVCC=5V,tr=tf=20nsand25?Cunlessotherwise(Note(Note(NotefCLK,Clock tC,ConversionNotincludingMUXAddressing8ClockDuty (Note %%tSET-UP,CSFallingEdgeorDataInputValidtoCLKRisingtHOLD,DataInputafterCLKRisingACCharacteristicsThefollowingspecificationsapplyforVCC=5V,tr=tf=20nsand25?Cunlessotherwise(Note(Note(Notetpd1,tpd0—CLKCL=100EdgetoOutputData(NoteDataLSBt1H,t0H,—RisingEdgeofCStoDataOutputandSARSCL=10pF,(seeTRI-STATE?TestCL=100pf,CIN,Capacitanceof5COUT,Capacitanceof5Note1:Absolute umRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.DCandACelectricalspecificationsdonotapplywhenoperatingthedevicebeyonditsspecifiedoperatingconditions.Note2:AllvoltagesaremeasuredwithrespecttothegroundNote3:Internalzenerdiodes(6.3to8.5V)areconnectedfromV+toGNDandVCCtoGND.ThezeneratV+canoperateasashuntregulatorandisconnectedtoVCCviaaconventionaldiode.SincethezenervoltageequalstheA/D’sbreakdownvoltage,thediodeinsuresthatVCCwillbebelowbreakdownwhenthedeviceispoweredfromV+.FunctionalityisthereforeguaranteedforV+operationeventhoughtheresultantvoltageatVCCmayexceedthespecifiedAbsoluteMaxof6.5V.Itis mendedthataresistorbeusedtolimitthemaxcurrentintoV+.(SeeFigure3inFunctionalDescriptionSection6.0)Note4:Whentheinputvoltage(VIN)atanypinexceedsthepowersupplyrails(VIN<V?orVIN>V+)theabsolutevalueofcurrentatthatpinshouldbelimitedto5mAorless.The20mApackageinputcurrentlimitsthenumberofpinsthatcanexceedthepowersupplyboundarieswitha5mAcurrentlimittofour.Note5:Humanbodymodel,100pFdischargedthrougha1.5kNote6:Totalunadjustederrorincludesoffset,full-scale,linearity,andmultiplexerNote7:CannotbetestedforNote8:ForVIN(?)VIN(+)thedigitaloutputcodewillbe00000000.Twoon-chipdiodesaretiedtoeachoginput(seeBlockDiagram)whichwillforwardconductforoginputvoltagesonediodedropbelowgroundoronediodedropgreaterthantheVCCsupply.Becareful,duringtestingatlowVCClevels(4.5V),ashighleveloginputs(5V)cancausethisinputdiodetoconduct—especiallyatelevatedtemperatures,andcauseerrorsforoginputsnearfull-scale.Thespecallows50mVforwardbiasofeitherdiode.ThismeansthataslongastheogVINorVREFdoesnotexceedthesupplyvoltagebymorethan50mV,theoutputcodewillbecorrect.Toachieveanabsolute0VDCto5VDCinputvoltagerangewillthereforerequireaminimumsupplyvoltageof4.950VDCovertemperaturevaria-tions,initialtoleranceandloading.Note9:LeakagecurrentismeasuredwiththeclocknotNote10:A40%to60%clockdutycyclerangeinsuresproperoperationatallclockfrequencies.Inthecasethatanavailableclockhasadutycycleoutsideoftheselimits,theminimum,timetheclockishighortheminimumtimetheclockislowmustbeatleast1μs.The umtimetheclockcanbehighis60μs.Theclockcanbestoppedwhenlowsolongastheoginputvoltageremainsstable.Note11:Sincedata,MSBfirst,istheoutputofthecomparatorusedinthesuccessiveapproximationloop,anadditionaldelayisbuiltin(seeBlockDiagram)toallowforcomparatorresponsetime.Note12:Typicalsareat25?CandrepresentmostlikelyparametricNote13:TestedlimitsareguaranteedtoNational’sAOQL(AverageOutgoingQualityNote14:Guaranteedbutnot100%productiontested.TheselimitsarenotusedtocalculateoutgoingqualityTypicalPerformancevsVREFVoltage

LinearityErrorvsVREF

TypicalTypicalPerformanceCharacteristicsLinearityErrorvsPowerSupplyCurrentvsTemperature(ADC0838,ADC0831,ADC0834)Note:ForADC0832addvsfCLKLeakageCurrentTestTRI-STATETRI-STATETestCircuitsandTimingDataInputDataOutputADC0831StartConversionTimingTimingDiagramsADC0831*LSBfirstoutputnotavailableonADC0832ADC0834ADC0838ADC0838*Makesureclockedge#18clocksintheLSBbeforeSEistakenTimingDiagramsa“0”andSELECT1isforcedtoa“1”.FunctionalThedesignoftheseconvertersutilizesasample-datacom-paratorstructurewhichprovidesforadifferentialogin-puttobeconvertedbyasuccessiveapproximationroutine.Theactualvoltageconvertedisalwaysthedifferencebe-tweenanassigned“+”inputterminalanda“?”inputterminal.Thepolarityofeachinputterminalofthepairbeingcon-vertedindicateswhichlinetheconverterexpectstobethemostpositive.Iftheassigned“+”inputislessthanthe“?”in-puttheconverterrespondswithanallzerosoutputcode.Auniqueinputmultiplexingschemehasbeenutilizedtopro-videmultiple ogchannelswithsoftware-configurablesingle-ended,differential,oranewpseudo-differentialoptionwhichwillconvertthedifferencebetweenthevoltageatanyoginputandacommonterminal.The ogsignalcon-ditioningrequiredintransducer-baseddataacquisitionsys-temsissignificantlysimplifiedwiththistypeofinputflexibility.OneconverterpackagecannowhandlegroundreferencedinputsandtruedifferentialinputsaswellassignalssomearbitraryreferenceAparticularinputconfigurationisassignedduringtheMUXaddressingsequence,priortothestartofaconversion.TheMUXaddressselectswhichoftheoginputsaretobeenabledandwhetherthisinputissingle-endedordifferential.

Inthedifferentialcase,italsoassignsthepolarityofthechannels.Differentialinputsarerestrictedtoadjacentchan-nelpairs.Forexamplechannel0andchannel1maybese-lectedasadifferentpairbutchannel0or1cannotactdiffer-entiallywithanyotherchannel.Inadditiontoselectingdifferentialmodethesignmayalsobeselected.Channel0maybeselectedasthepositiveinputandchannel1asthenegativeinputorviceversa.Thisprogrammabilityisbestil-lustratedbytheMUXaddressingcodesshowninthefollow-ingtablesforthevariousproductoptions.TheMUXaddressisshiftedintotheconverterviatheDIline.BecausetheADC0831containsonlyonedifferentialinputchannelwithafixedpolarityassignment,itdoesnotrequireThecommoninputlineontheADC0838canbeusedasapseudo-differentialinput.Inthismode,thevoltageonthispinistreatedasthe“?”inputforanyoftheotherinputchannels.Thisvoltagedoesnothavetobeogground;itcanbeanyreferencepotentialwhichiscommontoalloftheinputs.Thisfeatureismostusefulinsingle-supplyapplicationwheretheogcircuitrymaybebiaseduptoapotentialotherthangroundandtheoutputsignalsareallreferredtothisTABLE1.Multiplexer/PackageNumberofogNumberPackageSingle-1182184284FunctionalDescriptionTABLE2.MUXAddressing:Single-EndedMUXMUXogSingle-EndedChannel 0123456710 +–10 +–10 +–10 +–11 +–11 +–11 +–11 +–TABLE3.MUXAddressing:DifferentialMUXMUXogDifferentialChannel-Pair012310012345670000+–0001+–0010+–0011+–0100–+0101–+0110–+0111–+TABLE4.MUXAddressing:ADC0834Single-EndedMUXModeMUXChannel01231100+101+110+111+COMisinternallytiedtoATABLE5.MUXAddressing:ADC0834DifferentialMUXModeMUXChannel01231000+–001+–010–+011–+FunctionalDescriptionTABLE6.MUXAddressing:ADC0832Single-EndedMUXModeMUXChannel0110+11+COMisinternallytiedtoATABLE7.MUXAddressing:ADC0832DifferentialMUXModeMUXChannel0100+–01–+Sincetheinputconfigurationisundersoftwarecontrol,itcanbemodified,asrequired,ateachconversion.Achannelcanbetreatedasasingle-ended,groundreferencedinputforoneconversion;thenitcanbereconfiguredaspartofadif-ferentialchannelforanotherconversion.Figure1illustratestheinputflexibilitywhichcanbeachieved.Theoginputvoltagesforeachchannelcanrangefrom50mVbelowgroundto50mVaboveVCC(typically5V)with-outdegradingconversionaccuracy.THEDIGITALAmostimportantcharacteristicoftheseconvertersistheirserialdatalinkwiththecontrollingprocessor.Usingaserialcommunicationformatofferstwoverysignificantsystemim-provements;itallowsmorefunctiontobeincludedinthe

converterpackagewithnoincreaseinpackagesizeanditcaneliminatethetransmissionoflowlevelogsignalsbylocatingtheconverterrightattheogsensor;transmittinghighlynoiseimmunedigitaldatabacktothehostprocessor.TounderstandtheoperationoftheseconvertersitisbesttorefertotheTimingDiagramsandFunctionalBlockDiagramandtofollowacompleteconversionsequence.Forclarityaseparatediagramisshownofeachdevice.AconversionisinitiatedbyfirstpullingtheCS(chipselect)linelow.Thislinemustbeheldlowfortheentireconversion.TheconverterisnowwaitingforastartbitanditsMUXas-signmentword.Aclockisthengeneratedbytheprocessor(ifnotprovidedcontinuously)andoutputtotheA/Dclockinput.FunctionalFunctionalDescription8Single-8Pseudo-4MixedFIGUREogInputMultiplexerOptionsfortheOneachrisingedgeoftheclockthestatusofthedatain(DI)lineisclockedintotheMUXaddressshiftregister.Thestartbitisthefirstlogic“1”thatappearsonthisline(alllead-ingzerosareignored).Followingthestartbittheconverterexpectsthenext2to4bitstobetheMUXassignmentword.WhenthestartbithasbeenshiftedintothestartlocationoftheMUXregister,theinputchannelhasbeenassignedandaconversionisabouttobegin.Anintervalof?clockpe-riod(wherenothinghappens)isautomaticallyinsertedtoal-lowtheselectedMUXchanneltosettle.TheSARstatuslinegoeshighatthistimetosignalthataconversionisnowinprogressandtheDIlineisdisabled(itnolongeracceptsThedataout(DO)linenowcomesoutofTRI-STATEandprovidesaleadingzeroforthisoneclockperiodofMUXset-tlingtime.Whentheconversionbegins,theoutputoftheSARcom-parator,whichindicateswhethertheoginputisgreaterthan(high)orlessthan(low)eachsuccessivevoltagefromtheinternalresistorladder,appearsattheDOlineoneachfallingedgeoftheclock.Thisdataistheresultoftheconver-sionbeingshiftedout(withtheMSBcomingfirst)andcanbereadbytheprocessorimmediay.After8clockperiodstheconversioniscompleted.TheSARstatuslinereturnslowtoindicatethis?clockcycleIftheprogrammerprefers,thedatacanbeprovidedinanLSBfirstformat[thismakesuseoftheshiftenable(SE)con-trolline].All8bitsoftheresultarestoredinanoutputshiftregister.OndeviceswhichdonotincludetheSEcontrolline,thedata,LSBfirst,isautomaticallyshiftedouttheDOline,aftertheMSBfirstdatastream.TheDOlinethengoeslowandstayslowuntilCSisreturnedhigh.OntheADC0838theSElineisbroughtoutandifheldhigh,thevalueoftheLSBremainsvalidontheDOline.WhenSEisforcedlow,thedataisthenclockedoutLSBfirst.TheADC0831isanexcep-tioninthatitsdataisonlyoutputinMSBfirstformat.AllinternalregistersareclearedwhentheCSlineishigh.Ifanotherconversionisdesired,CSmustmakeahightolowtransitionfollowedbyaddressinformation.TheDIandDOlinescanbetiedtogetherandcontrolledthroughabidirectionalprocessorI/Obitwithonewire.ThisispossiblebecausetheDIinputisonly“l(fā)ooked-at”duringtheMUXaddressingintervalwhiletheDOlineisstillinahighimpedancestate.FunctionalDescriptionREFERENCEThevoltageappliedtothereferenceinputtotheseconvert-ersdefinesthevoltagespanoftheoginput(thediffer-encebetweenVIN(MAX)andVIN(MIN))overwhichthe256possibleoutputcodesapply.Thedevicescanbeusedinei-therratiometricapplicationsorinsystemsrequiringabsoluteaccuracy.Thereferencepinmustbeconnectedtoavoltagesourcecapableofdrivingthereferenceinput typically3.5k.Thispinisthetopofaresistordividerstringusedforthesuccessiveapproximationconversion.Inaratiometricsystem,theoginputvoltageispropor-tionaltothevoltageusedfortheA/Dreference.Thisvoltageistypicallythesystempowersupply,sotheVREFpincanbetiedtoVCC(doneinternallyontheADC0832).ThistechniquerelaxesthestabilityrequirementsofthesystemreferenceastheoginputandA/Dreferencemovetogethermaintain-ingthesameoutputcodeforagiveninputcondition.

Forabsoluteaccuracy,wheretheoginputvariesbe-tweenveryspecificvoltagelimits,thereferencepincanbebiasedwithatimeandtemperaturestablevoltagesource.TheLM385andLM336referencediodesaregoodlowcur-rentdevicestousewiththeseconverters. umvalueofthereferenceislimitedtotheVCCsupplyvoltage.Theminimumvalue,however,canbequitesmall(seeTypicalPerformanceCharacteristics)toallowdi-rectconversionsoftransduceroutputsprovidinglessthana5Voutputspan.Particularcaremustbetakenwithregardtonoisepickup,circuitlayoutandsystemerrorvoltagesourceswhenoperatingwithareducedspanduetotheincreasedsensitivityoftheconverter(1LSBequalsVREF/256).

Absolutewithareduced

FIGURE2.Reference OGThemostimportantfeatureoftheseconvertersisthattheycanbelocatedrightattheogsignalsourceandthroughjustafewwirescancommunicatewithacontrollingproces-sorwithahighlynoiseimmuneserialbitstream.Thisinitselfgreatlyminimizescircuitrytomaintainogsignalaccu-racywhichotherwiseismostsusceptibletonoisepickup.However,afewwordsareinorderwithregardtotheoginputsshouldtheinputbenoisytobeginwithorpossiblyridingonalargecommon-modevoltage.Thedifferentialinputoftheseconvertersactuallyreducestheeffectsofcommon-modeinputnoise,asignalcommontobothselected“+”and“?”inputsforaconversion(60Hzismosttypical).Thetimeintervalbetweensamplingthe“+”in-putandthenthe“?”inputis?ofaclockperiod.Thechangeinthecommon-modevoltageduringthisshorttimeintervalcancauseconversionerrors.Forasinusoidalcommon-modesignalthiserroris:wherefCMisthefrequencyofthecommon-mode

VPEAKisitspeakvoltageandfCLK,istheA/DclockFora60Hzcommon-modesignaltogeneratea?LSBerror(5mV)withtheconverterrunningat250kHz,itspeakvaluewouldhavetobe6.63Vwhichwouldbelargerthanallowedasitexceedsthe umoginputlimits.Duetothesamplingnatureoftheoginputsshortesofcurrententerthe“+”inputandexitthe“?”inputattheclockedgesduringtheactualconversion.Thesecurrentsdecayrapidlyanddonotcauseerrorsastheinternalcom-paratorisstrobedattheendofaclockperiod.Bypassca-pacitorsattheinputswillaveragethesecurrentsandcauseaneffectiveDCcurrenttoflowthroughtheoutputoftheogsignalsource.Bypasscapacitorsshouldnotbeusedifthesource isgreaterthan1k.Thissource limitationisimportantwithregardtotheDCleakagecurrentsofinputmultiplexeraswell.Theworst-caseleakagecurrentof±1μAovertemperaturewillcreatea1mVinputerrorwitha1ksource .AnopampRCactivelowpassfiltercanprovidebothimped-ancebufferingandnoisefilteringshouldahighimpedancesignalsourceberequired.FunctionalDescriptionZeroThezerooftheA/Ddoesnotrequireadjustment.Ifthemini-mumoginputvoltagevalue,VIN(MIN),isnotgroundazerooffsetcanbedone.Theconvertercanbemadetoout-put00000000digitalcodeforthisminimuminputvoltagebybiasinganyVIN(?)inputatthisVIN(MIN)value.ThisutilizesthedifferentialmodeoperationoftheA/D.ThezeroerroroftheA/DconverterrelatestothelocationofthefirstriserofthetransferfunctionandcanbemeasuredbygroundingtheVIN(?)inputandapplyingasmallmagnitudepositivevoltagetotheVIN(+)input.Zeroerroristhediffer-encebetweentheactualDCinputvoltagewhichisneces-sarytojustcauseanoutputdigitalcodetransitionfrom00000000to00000001andtheideal?LSBvalue(?LSB=9.8mVforVREF=5.000VDC).Full-Thefull-scaleadjustmentcanbemadebyapplyingadiffer-entialinputvoltagewhichis1?LSBdownfromthedesiredogfull-scalevoltagerangeandthenadjustingthemag-nitudeoftheVREFinput(orVCCfortheADC0832)foradigi-AdjustingforanArbitraryogInputVoltageIftheogzerovoltageoftheA/Disshiftedawayfromground(forexample,to modateanoginputsignalwhichdoesnotgotoground),thisnewzeroreferenceshouldbeproperlyadjustedfirst.AVIN(+)voltagewhichequalsthisdesiredzeroreferenceplus?LSB(wheretheLSBiscalculatedforthedesired ogspan,using1LSB=ogspan/256)isappliedtoselected“+”inputandthezeroreferencevoltageatthecorresponding“?”inputshouldthenbeadjustedtojustobtainthe00HEXto01HEXcodeThefull-scaleadjustmentshouldbemade[withtheproperVIN(?)voltageapplied]byforcingavoltagetotheVIN(+)in-putwhichisgivenby:VMAX=thehighendof oginput

FIGURE3.AnOn-ChipShuntRegulatorThiszenerisintendedforuseasashuntvoltageregulatortoeliminatetheneedforanyadditionalregulatingcomponents.Thisismostdesirableiftheconverteristoberemoylo-catedfromthesystempowersource.Figure4andFigure5il-lustratetwousefulapplicationsofthison-boardzenerwhenanexternaltransistorcanbeafforded.AnimportantuseoftheinterconnectingdiodebetweenV+andVCCisshowninFigure6andFigure7.Here,thisdiodeisusedasarectifiertoallowtheVCCsupplyfortheconvertertobederivedfromtheclock.ThelowcurrentrequirementsoftheA/Dandtherelativelyhighclockfrequenciesused(typi-callyintherangeof10k–400kHz)allowsusingthesmallvaluefiltercapacitorshowntokeeptherippleontheVCClinetowellunder?ofanLSB.Theshuntzenerregulatorcanalsobeusedinthismode.ThisrequiresaclockvoltageswingwhichisinexcessofVZ.Acurrentlimitforthezenerisneeded,eitherbuiltintotheclockgeneratororaresistorcanbeusedfromtheCLKpintotheV+pin.

VMIN=thelowend(theoffsetzero)ofthe (BotharegroundTheVREF(orVCC)voltageisthenadjustedtoprovideacodechangefromFEHEXtoFFHEX.Thiscompletestheadjust-mentprocedure.6.0POWERAuniquefeatureoftheADC0838andADC0834istheinclu-sionofazenerdiodeconnectedfromtheV+terminaltogroundwhichalsoconnectstotheVCCterminal(whichistheactualconvertersupply)throughasilicondiode,asshowninFigure3.(Note3)FIGURE4.OperatingwithaTemperatureCompensatedReference*4.5VVCCFIGURE6.GeneratingVCCfromtheConverterFIGURE5.UsingtheA/Das*4.5VVCCFIGURE7.RemoteSensing—ClockandPoweron1WireDigitalLinkandSampleControllingSoftwarefortheSeriallyOrientedCOP420andtheBitProgrammableI/OINS8048ApplicationsApplicationsCOPCODING8048CODING ;SELECTA/D(CSCLRAISC1ENABLESSIO’sINPUTANDOUTPUTC=1G0=0(CSCLEARSACCUMULATORLOADSACCUMULATORWITH1EXCHANGESSIOWITHANDSTARTSSKLOADSMUXADDRESSFROMRAMINTOACCUMULATOR—LOADSMUXADDRESSFROMACCUMULATORTOSIOREGISTER8READSHIGHORDERNIBBLE(4BITS)INTOACCUMULATORPUTSHIGHORDERNIBBLEINTORAMCLEARSACCUMULATORC=READSLOWORDERNIBBLEINTOACCUMULATORANDSTOPSSKPUTSLOWORDERNIBBLEINTORAMG0=1(CSDISABLESSIO’sINPUTANDLOOPB, ;BIT A;CYADDRESS;TESTP1,#1LOOPCLRA;PULSESK;BIT;PULSESKB,#8A,P1AA,CC,;A(0)BITAND P1,;PULSEApplicationsApplicationsA“Stand-Alone”Hook-UpforADC0838Forallotherproductstietopinfunctionsasshown.Low-CostRemoteTemperatureApplicationsApplicationsDigitizingaCurrentOperatingwithRatiometric*VIN(?)=0.1515%ofVCCVXDR85%ofApplicationsApplicationsSpanAdjust:Zero-ShiftandSpanAdjust:ApplicationsApplicationsObtainingHigher9-BitControllerperformsaroutinetodeterminewhichinputpolarity(9-bitexample)orwhichchannelpair(10-bitexample)providesanon-zerooutputcode.Thisinformationprovidestheextrabits.10-BitApplicationsApplicat